2024年4月3日发(作者：革欣笑)

MAX32665/MAX32666 USER GUIDE

UG6971; Rev 3; 2/2022

Abstract: This user guide provides application developers information on how to use the memory and peripherals of the

MAX32665/MAX32666 microcontroller. Detailed information for all registers and fields in the device are covered.

Guidance is given for managing all the peripherals, clocks, power and startup for the device family.

MAX32665/MAX32666 User Guide

MAX32665/MAX32666 User Guide

Table of Contents

1.

Overview ----------------------------------------------------------------------------------------------------------------- 29

1.1

2.1

2.2

2.2.1

2.2.2

2.2.3

2.2.4

2.2.5

Block Diagram ---------------------------------------------------------------------------------------------------------------- 30

Instances ----------------------------------------------------------------------------------------------------------------------- 31

Usage --------------------------------------------------------------------------------------------------------------------------- 33

Reset State -------------------------------------------------------------------------------------------------------------------------------- 33

MPU Implementation ------------------------------------------------------------------------------------------------------------------ 33

MPU Protection Fault ------------------------------------------------------------------------------------------------------------------ 33

RPU Protection Fault-------------------------------------------------------------------------------------------------------------------- 33

RPU Fault Handler ----------------------------------------------------------------------------------------------------------------------- 33

2.

Resource Protection Unit (RPU) ------------------------------------------------------------------------------------ 31

2.3

2.4

3.1

3.2

3.3

3.3.1

3.3.2

3.3.3

3.3.4

3.3.5

3.3.6

3.3.7

Registers ----------------------------------------------------------------------------------------------------------------------- 34

Register Details -------------------------------------------------------------------------------------------------------------- 36

Memory, Register Mapping, and Access Overview ----------------------------------------------------------------- 40

Field Access Definitions ---------------------------------------------------------------------------------------------------- 43

Standard Memory Regions ------------------------------------------------------------------------------------------------ 44

Code Space -------------------------------------------------------------------------------------------------------------------------------- 44

SRAM Space ------------------------------------------------------------------------------------------------------------------------------- 44

Peripheral Space ------------------------------------------------------------------------------------------------------------------------- 45

External RAM Space -------------------------------------------------------------------------------------------------------------------- 46

External Device Space ------------------------------------------------------------------------------------------------------------------ 46

System Area (Private Peripheral Bus) ---------------------------------------------------------------------------------------------- 46

System Area (Vendor Defined) ------------------------------------------------------------------------------------------------------- 46

3.

Memory, Register Mapping, and Access ------------------------------------------------------------------------- 40

3.4

3.4.1

3.4.2

3.4.3

3.4.4

3.4.5

3.4.6

3.4.7

Device Memory Instances ------------------------------------------------------------------------------------------------- 46

Main Program Flash Memory -------------------------------------------------------------------------------------------------------- 46

Cache Memories ------------------------------------------------------------------------------------------------------------------------- 47

Information Block Flash Memory---------------------------------------------------------------------------------------------------- 47

System SRAM ----------------------------------------------------------------------------------------------------------------------------- 47

AES Key and Working Space Memory ---------------------------------------------------------------------------------------------- 48

MAA Key and Working Space Memory -------------------------------------------------------------------------------------------- 48

TPU Memory ------------------------------------------------------------------------------------------------------------------------------ 48

3.5 AHB Interfaces --------------------------------------------------------------------------------------------------------------- 48

Analog Devices Page 2 of 556

2024年4月3日发(作者：革欣笑)

MAX32665/MAX32666 USER GUIDE

UG6971; Rev 3; 2/2022

Abstract: This user guide provides application developers information on how to use the memory and peripherals of the

MAX32665/MAX32666 microcontroller. Detailed information for all registers and fields in the device are covered.

Guidance is given for managing all the peripherals, clocks, power and startup for the device family.

MAX32665/MAX32666 User Guide

MAX32665/MAX32666 User Guide

Table of Contents

1.

Overview ----------------------------------------------------------------------------------------------------------------- 29

1.1

2.1

2.2

2.2.1

2.2.2

2.2.3

2.2.4

2.2.5

Block Diagram ---------------------------------------------------------------------------------------------------------------- 30

Instances ----------------------------------------------------------------------------------------------------------------------- 31

Usage --------------------------------------------------------------------------------------------------------------------------- 33

Reset State -------------------------------------------------------------------------------------------------------------------------------- 33

MPU Implementation ------------------------------------------------------------------------------------------------------------------ 33

MPU Protection Fault ------------------------------------------------------------------------------------------------------------------ 33

RPU Protection Fault-------------------------------------------------------------------------------------------------------------------- 33

RPU Fault Handler ----------------------------------------------------------------------------------------------------------------------- 33

2.

Resource Protection Unit (RPU) ------------------------------------------------------------------------------------ 31

2.3

2.4

3.1

3.2

3.3

3.3.1

3.3.2

3.3.3

3.3.4

3.3.5

3.3.6

3.3.7

Registers ----------------------------------------------------------------------------------------------------------------------- 34

Register Details -------------------------------------------------------------------------------------------------------------- 36

Memory, Register Mapping, and Access Overview ----------------------------------------------------------------- 40

Field Access Definitions ---------------------------------------------------------------------------------------------------- 43

Standard Memory Regions ------------------------------------------------------------------------------------------------ 44

Code Space -------------------------------------------------------------------------------------------------------------------------------- 44

SRAM Space ------------------------------------------------------------------------------------------------------------------------------- 44

Peripheral Space ------------------------------------------------------------------------------------------------------------------------- 45

External RAM Space -------------------------------------------------------------------------------------------------------------------- 46

External Device Space ------------------------------------------------------------------------------------------------------------------ 46

System Area (Private Peripheral Bus) ---------------------------------------------------------------------------------------------- 46

System Area (Vendor Defined) ------------------------------------------------------------------------------------------------------- 46

3.

Memory, Register Mapping, and Access ------------------------------------------------------------------------- 40

3.4

3.4.1

3.4.2

3.4.3

3.4.4

3.4.5

3.4.6

3.4.7

Device Memory Instances ------------------------------------------------------------------------------------------------- 46

Main Program Flash Memory -------------------------------------------------------------------------------------------------------- 46

Cache Memories ------------------------------------------------------------------------------------------------------------------------- 47

Information Block Flash Memory---------------------------------------------------------------------------------------------------- 47

System SRAM ----------------------------------------------------------------------------------------------------------------------------- 47

AES Key and Working Space Memory ---------------------------------------------------------------------------------------------- 48

MAA Key and Working Space Memory -------------------------------------------------------------------------------------------- 48

TPU Memory ------------------------------------------------------------------------------------------------------------------------------ 48

3.5 AHB Interfaces --------------------------------------------------------------------------------------------------------------- 48

Analog Devices Page 2 of 556