2024年4月28日发(作者：慈夏云)
Understanding 4M Page Size Extensions
on the Pentium Processor
by
Robert R. Collins
It's been more than three years since Intel first published the
Pentium Family
User's Manual.
The
Manual
omitted discussion of some new, advanced
programming features. Intel originally planned to release this information in its
manuals, but instead, put this information in a document commonly referred to as
"Appendix H" (formally known as the
Supplement to the Pentium Processor User's
Manual )
and required recipients to sign a 15-year nondisclosure agreement (NDA).
This decision has been the focus of a controversy concerning Intel's right to
protect its intellectual property versus the rights of all programmers to have access
to information that will benefit their programs. Another point of contention is the
NDA itself. Intel claims that anybody needing this information will never be denied
it, as long as they sign the NDA. But several stories have circulated regarding
programmers being denied because Intel claims they don't need the information.
This has spawned a community of programmers dedicated to reverse engineering
these features and publishing their findings on Internet news groups and the
World Wide Web. But is all of this necessary?
Intel has promised that the not-yet-released
Pentium Pro Processor Family
Developer's Manual
will contain information on many of these advanced features,
perhaps even a description of 4-MB paging.
Four-MB paging allows the operating system to access very large data
structures without constantly referencing the Translation Lookaside Buffer (TLB),
which is used by the processor to cache virtual-to-physical address translations for
the most recently used pages of memory. This feature is most useful to
operating-system developers who want a single page of memory dedicated to the
OS kernel or a large data structure, such as a video-frame buffer. Information
about 4-MB paging has been publicly documented by Intel - but you need to
know where to look to find it, In order to get a complete description of Pentium's
4-MB pages, you need to read both the
Pentium Family User's Manual, Volume 3
(P/N 241430) and the
i860
TM
XP Microprocessor Data Book
(P/N 240874).
In the Pentium manuals, there are at least nine references to 4-MB pages. This
is a good start to reverse engineering 4-MB pages. These references give you the
necessary clues to write software that unlocks the secrets of page-size extensions
(PSE). However, such an effort is unnecessary. The Intel i860 XP processor
documentation claims the i860 XP is page-level compatible with the Intel 386, Intel
486, and Pentium processors. This compatibility is noteworthy because the i860 XP
also supports 4-MB pages, and its documentation provides a complete description
of the 4-MB paging mechanism (see
i860
TM
XP Microprocessor Data Book,
section
2.4). All that's needed to obtain an Appendix H description of 4-MB pages are a
few references from the Pentium manuals and the description of 4-MB pages from
2024年4月28日发(作者：慈夏云)
Understanding 4M Page Size Extensions
on the Pentium Processor
by
Robert R. Collins
It's been more than three years since Intel first published the
Pentium Family
User's Manual.
The
Manual
omitted discussion of some new, advanced
programming features. Intel originally planned to release this information in its
manuals, but instead, put this information in a document commonly referred to as
"Appendix H" (formally known as the
Supplement to the Pentium Processor User's
Manual )
and required recipients to sign a 15-year nondisclosure agreement (NDA).
This decision has been the focus of a controversy concerning Intel's right to
protect its intellectual property versus the rights of all programmers to have access
to information that will benefit their programs. Another point of contention is the
NDA itself. Intel claims that anybody needing this information will never be denied
it, as long as they sign the NDA. But several stories have circulated regarding
programmers being denied because Intel claims they don't need the information.
This has spawned a community of programmers dedicated to reverse engineering
these features and publishing their findings on Internet news groups and the
World Wide Web. But is all of this necessary?
Intel has promised that the not-yet-released
Pentium Pro Processor Family
Developer's Manual
will contain information on many of these advanced features,
perhaps even a description of 4-MB paging.
Four-MB paging allows the operating system to access very large data
structures without constantly referencing the Translation Lookaside Buffer (TLB),
which is used by the processor to cache virtual-to-physical address translations for
the most recently used pages of memory. This feature is most useful to
operating-system developers who want a single page of memory dedicated to the
OS kernel or a large data structure, such as a video-frame buffer. Information
about 4-MB paging has been publicly documented by Intel - but you need to
know where to look to find it, In order to get a complete description of Pentium's
4-MB pages, you need to read both the
Pentium Family User's Manual, Volume 3
(P/N 241430) and the
i860
TM
XP Microprocessor Data Book
(P/N 240874).
In the Pentium manuals, there are at least nine references to 4-MB pages. This
is a good start to reverse engineering 4-MB pages. These references give you the
necessary clues to write software that unlocks the secrets of page-size extensions
(PSE). However, such an effort is unnecessary. The Intel i860 XP processor
documentation claims the i860 XP is page-level compatible with the Intel 386, Intel
486, and Pentium processors. This compatibility is noteworthy because the i860 XP
also supports 4-MB pages, and its documentation provides a complete description
of the 4-MB paging mechanism (see
i860
TM
XP Microprocessor Data Book,
section
2.4). All that's needed to obtain an Appendix H description of 4-MB pages are a
few references from the Pentium manuals and the description of 4-MB pages from