2024年5月15日发(作者：卯婉仪)

Data Sheet

FEATURES

Low offset voltage: 1 μV

Input offset drift: 0.005 μV/°C

Rail-to-rail input and output swing

5 V/2.7 V single-supply operation

High gain, CMRR, PSRR: 130 dB

Ultralow input bias current: 20 pA

Low supply current: 700 μA/op amp

Overload recovery time: 50 μs

No external capacitors required

APPLICATIONS

Temperature sensors

Pressure sensors

Precision current sensing

Strain gage amplifiers

Medical instrumentation

Thermocouple amplifiers

GENERAL DESCRIPTION

This family of amplifiers has ultralow offset, drift, and bias

current. The AD8551, AD8552, and AD8554 are single, dual,

and quad amplifiers featuring rail-to-rail input and output swings.

All are guaranteed to operate from 2.7 V to 5 V with a single supply.

The AD8551/AD8552/AD8554 provide the benefits previously

found only in expensive auto-zeroing or chopper-stabilized

amplifiers. Using Analog Devices, Inc. topology, these new

zero-drift amplifiers combine low cost with high accuracy. No

external capacitors are required.

With an offset voltage of only 1 μV and drift of 0.005 μV/°C, the

AD8551/AD8552/AD8554 are perfectly suited for applications

in which error sources cannot be tolerated. Temperature,

position and pressure sensors, medical equipment, and strain

gage amplifiers benefit greatly from nearly zero drift over their

operating temperature range. The rail-to-rail input and output

swings provided by the AD8551/AD8552/AD8554 make both

high-side and low-side sensing easy.

The AD8551/AD8552/AD8554 are specified for the extended

industrial/automotive temperature range (−40°C to +125°C).

The AD8551 single amplifier is available in 8-lead MSOP and

8-lead narrow SOIC packages. The AD8552 dual amplifier is

available in 8-lead narrow SOIC and 8-lead TSSOP surface-

mount packages. The AD8554 quad is available in 14-lead

narrow SOIC and 14-lead TSSOP packages.

AD8551/AD8552/AD8554

PIN CONFIGURATIONS

NC

18

NC

–IN A

+IN A

AD8551

V+

OUT A

V–

45

NC

1

0

0

-

1

NC = NO CONNECT

0

1

1

0

Figure 1. 8-Lead MSOP (RM Suffix)

NC

1

8

NC

–IN A

2

+IN A

3

AD8551

7

V+

6

OUT A

V–

4

5

NC

2

0

0

-

1

NC = NO CONNECT

0

1

1

0

Figure 2. 8-Lead SOIC (R Suffix)

OUT A

18

V+

–IN A

+IN A

AD8552

OUT B

3

0

–IN B

0

-

1

V–

45

+IN B

0

1

1

0

Figure 3. 8-Lead TSSOP (RU Suffix)

OUT A

1

8

V+

–IN A

2

+IN A

3

AD8552

7

OUT B

6

–IN B

4

0

V–

4

5

+IN B

0

-

1

0

1

1

0

Figure 4. 8-Lead SOIC (R Suffix)

OUT A

114

OUT D

–IN A–IN D

+IN A

V+

AD8554

+IN D

V–

+IN B

+IN C

5

–IN B–IN C

0

0

-

1

OUT B

78

OUT C

0

1

1

0

Figure 5. 14-Lead TSSOP (RU Suffix)

OUT A

1

14

OUT D

–IN A

2

13

–IN D

+IN A

3

12

+IN D

V+

4

AD8554

11

V–

+IN B

5

10

+IN C

–IN B

6

9

–IN C

6

0

0

-

OUT B

7

8

OUT C

1

0

1

1

0

Figure 6. 14-Lead SOIC (R Suffix)

Data Sheet

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

V

S

= 5 V, V

CM

= 2.5 V, V

O

= 2.5 V, T

A

= 25°C, unless otherwise noted.

Table 1.

Parameter

INPUT CHARACTERISTICS

Offset Voltage

Input Bias Current

AD8551/AD8554

AD8552

AD8552

Input Offset Current

AD8551/AD8554

AD8552

AD8552

Input Voltage Range

Common-Mode Rejection Ratio

Large Signal Voltage Gain

1

Offset Voltage Drift

OUTPUT CHARACTERISTICS

Output Voltage High

Symbol

V

OS

−40°C ≤ T

A

≤ +125°C

I

B

−40°C ≤ T

A

≤ +125°C

−40°C ≤ T

A

≤ +85°C

−40°C ≤ T

A

≤ +125°C

I

OS

−40°C ≤ T

A

≤ +125°C

−40°C ≤ T

A

≤ +85°C

−40°C ≤ T

A

≤ +125°C

CMRR

A

VO

ΔV

OS

/ΔT

V

OH

V

CM

= 0 V to +5 V

−40°C ≤ T

A

≤ +125°C

R

L

= 10 kΩ, V

O

= 0.3 V to 4.7 V

−40°C ≤ T

A

≤ +125°C

−40°C ≤ T

A

≤ +125°C

R

L

= 100 kΩ to GND

R

L

= 100 kΩ to GND @ −40°C to +125°C

R

L

= 10 kΩ to GND

R

L

= 10 kΩ to GND @ −40°C to +125°C

R

L

= 100 kΩ to V+

R

L

= 100 kΩ to V+ @ −40°C to +125°C

R

L

= 10 kΩ to V+

R

L

= 10 kΩ to V+ @ −40°C to +125°C

−40°C to +125°C

Output Current

POWER SUPPLY

Power Supply Rejection Ratio

Supply Current/Amplifier

DYNAMIC PERFORMANCE

Slew Rate

Overload Recovery Time

Gain Bandwidth Product

NOISE PERFORMANCE

Voltage Noise

Voltage Noise Density

Current Noise Density

1

AD8551/AD8552/AD8554

Conditions Min Typ

1

10

1.0

160

2.5

20

150

30

150

Max

5

10

50

1.5

300

4

70

200

150

400

5

Unit

μV

μV

pA

nA

pA

nA

pA

pA

pA

pA

V

dB

dB

dB

dB

μV/°C

V

V

V

V

mV

mV

mV

mV

mA

mA

mA

mA

dB

dB

μA

μA

V/μs

ms

MHz

μV p-p

μV p-p

nV/√Hz

fA/√Hz

0

120

115

125

120

140

130

145

135

0.005

4.998

4.997

4.98

4.975

1

2

10

15

±50

±40

±30

±15

130

130

850

1000

0.4

0.05

1.5

1.0

0.32

42

2

0.04

4.99

4.99

4.95

4.95

Output Voltage Low V

OL

10

10

30

30

Output Short-Circuit Limit Current I

SC

I

O

−40°C to +125°C

PSRR

I

SY

V

S

= 2.7 V to 5.5 V

−40°C ≤ T

A

≤ +125°C

V

O

= 0 V

−40°C ≤ T

A

≤ +125°C

R

L

= 10 kΩ

±25

120

115

975

1075

SR

GBP

e

n

p-p

e

n

p-p

e

n

i

n

0.3

0 Hz to 10 Hz

0 Hz to 1 Hz

f = 1 kHz

f = 10 Hz

Gain testing is dependent upon test bandwidth.

Rev. F | Page 3 of 24

AD8551/AD8552/AD8554

Parameter

INPUT CHARACTERISTICS

Offset Voltage

Input Bias Current

AD8551/AD8554

AD8552

AD8552

Input Offset Current

AD8551/AD8554

AD8552

AD8552

Input Voltage Range

Common-Mode Rejection Ratio

Large Signal Voltage Gain

1

Offset Voltage Drift

Symbol

V

OS

−40°C ≤ T

A

≤ +125°C

I

B

−40°C ≤ T

A

≤ +125°C

−40°C ≤ T

A

≤ +85°C

−40°C ≤ T

A

≤ +125°C

I

OS

−40°C ≤ T

A

≤ +125°C

−40°C ≤ T

A

≤ +85°C

−40°C ≤ T

A

≤ +125°C

CMRR

A

VO

ΔV

OS

/ΔT

V

CM

= 0 V to 2.7 V

−40°C ≤ T

A

≤ +125°C

R

L

= 10 kΩ, V

O

= 0.3 V to 2.4 V

−40°C ≤ T

A

≤ +125°C

−40°C ≤ T

A

≤ +125°C

0

115

110

110

105

10

1.0

160

2.5

10

150

30

150

130

130

140

130

0.005

Conditions Min Typ

1

Data Sheet

Max

5

10

50

1.5

300

4

50

200

150

400

2.7

Unit

μV

μV

pA

nA

pA

nA

pA

pA

pA

pA

V

dB

dB

dB

dB

μV/°C 0.04

Rev. F | Page 4 of 24

AD8551/AD8552/AD8554

FUNCTIONAL DESCRIPTION

The AD8551/AD8552/AD8554 are high precision, rail-to-rail

operational amplifiers that can be run from a single-supply voltage.

Their typical offset voltage of less than 1 μV allows these amplifiers

to be easily configured for high gains without risk of excessive

output voltage errors. The extremely small temperature drift of

5 nV/°C ensures a minimum of offset voltage error over its

entire temperature range of −40°C to +125°C, making the

AD8551/AD8552/AD8554 amplifiers ideal for a variety of

sensitive measurement applications in harsh operating

environments, such as underhood and braking/suspension

systems in automobiles.

The AD8551/AD8552/AD8554 are CMOS amplifiers and

achieve their high degree of precision through auto-zero

stabilization. This autocorrection topology allows the

AD8551/AD8552/AD8554 to maintain its low offset voltage

over a wide temperature range and over its operating lifetime.

Data Sheet

some improvements made over time. The AD8551/AD8552/

AD8554 design offers a number of significant performance

improvements over previous versions while attaining a very

substantial reduction in device cost. This section offers a simplified

explanation of how the AD8551/AD8552/AD8554 are able to

offer extremely low offset voltages and high open-loop gains.

As noted in the Amplifier Architecture section, each AD8551/

AD8552/AD8554 op amp contains two internal amplifiers. One

is used as the primary amplifier, the other as an autocorrection,

or nulling, amplifier. Each amplifier has an associated input

offset voltage that can be modeled as a dc voltage source in

series with the noninverting input. In Figure 50 and Figure 51

these are labeled as V

OSX

, where x denotes the amplifier

associated with the offset: A for the nulling amplifier and B for

the primary amplifier. The open-loop gain for the +IN and −IN

inputs of each amplifier is given as A

X

. Both amplifiers also have

a third voltage input with an associated open-loop gain of B

X

.

There are two modes of operation determined by the action of

two sets of switches in the amplifier: an auto-zero phase and an

amplification phase.

AMPLIFIER ARCHITECTURE

Each AD8551/AD8552/AD8554 op amps consist of two

amplifiers, a main amplifier and a secondary amplifier, used

to correct the offset voltage of the main amplifier. Both consist

of a rail-to-rail input stage, allowing the input common-mode

voltage range to reach both supply rails. The input stage consists

of an NMOS differential pair operating concurrently with a

parallel PMOS differential pair. The outputs from the

differential input stages are combined in another gain stage

whose output is used to drive a rail-to-rail output stage.

The wide voltage swing of the amplifier is achieved by using two

output transistors in a common-source configuration. The output

voltage range is limited by the drain-to-source resistance of

these transistors. As the amplifier is required to source or sink

more output current, the r

DS

of these transistors increases, raising

the voltage drop across these transistors. Simply put, the output

voltage does not swing as close to the rail under heavy output

current conditions as it does with light output current. This is a

characteristic of all rail-to-rail output amplifiers. Figure 12 and

Figure 13 show how close the output voltage can get to the rails

with a given output current. The output of the AD8551/AD8552/

AD8554 is short-circuit protected to approximately 50 mA of

current.

The AD8551/AD8552/AD8554 amplifiers have exceptional gain,

yielding greater than 120 dB of open-loop gain with a load of 2 kΩ.

Because the output transistors are configured in a common-source

configuration, the gain of the output stage, and thus the open-

loop gain of the amplifier, is dependent on the load resistance.

Open-loop gain decreases with smaller load resistances. This is

another characteristic of rail-to-rail output amplifiers.

Auto-Zero Phase

In this phase, all φA switches are closed and all φB switches are

opened. Here, the nulling amplifier is taken out of the gain loop

by shorting its two inputs together. Of course, there is a degree

of offset voltage, shown as V

OSA

, inherent in the nulling amplifier

which maintains a potential difference between the +IN and

−IN inputs. The nulling amplifier feedback loop is closed through

φB

2

and V

OSA

appears at the output of the nulling amp and on

C

M1

, an internal capacitor in the AD8551/AD8552/AD8554.

Mathematically, this is expressed in the time domain as

V

OA

[t] = A

A

V

OSA

[t] − B

A

V

OA

[t]

which can be expressed as

(1)

V

OA



t





A

A

V

OSA



t



1B

A

(2)

This demonstrates that the offset voltage of the nulling amplifier

times a gain factor appears at the output of the nulling amplifier

and, thus, on the C

M1

capacitor.

V

IN+

V

IN–

ФB

ФA

V

OSA

+

A

A

–B

A

ФA

V

OA

A

B

B

B

ФB

C

M2

V

OUT

V

NB

C

M1

0

1

1

0

1

-

0

5

0

BASIC AUTO-ZERO AMPLIFIER THEORY

Autocorrection amplifiers are not a new technology. Various IC

implementations have been available for more than 15 years with

Rev. F | Page 14 of 24

V

NA

Figure 50. Auto-Zero Phase of the AD8551/AD8552/AD8554

AD8551/AD8552/AD8554 Data Sheet

Rev. F | Page 22 of 24

2024年5月15日发(作者：卯婉仪)

Data Sheet

FEATURES

Low offset voltage: 1 μV

Input offset drift: 0.005 μV/°C

Rail-to-rail input and output swing

5 V/2.7 V single-supply operation

High gain, CMRR, PSRR: 130 dB

Ultralow input bias current: 20 pA

Low supply current: 700 μA/op amp

Overload recovery time: 50 μs

No external capacitors required

APPLICATIONS

Temperature sensors

Pressure sensors

Precision current sensing

Strain gage amplifiers

Medical instrumentation

Thermocouple amplifiers

GENERAL DESCRIPTION

This family of amplifiers has ultralow offset, drift, and bias

current. The AD8551, AD8552, and AD8554 are single, dual,

and quad amplifiers featuring rail-to-rail input and output swings.

All are guaranteed to operate from 2.7 V to 5 V with a single supply.

The AD8551/AD8552/AD8554 provide the benefits previously

found only in expensive auto-zeroing or chopper-stabilized

amplifiers. Using Analog Devices, Inc. topology, these new

zero-drift amplifiers combine low cost with high accuracy. No

external capacitors are required.

With an offset voltage of only 1 μV and drift of 0.005 μV/°C, the

AD8551/AD8552/AD8554 are perfectly suited for applications

in which error sources cannot be tolerated. Temperature,

position and pressure sensors, medical equipment, and strain

gage amplifiers benefit greatly from nearly zero drift over their

operating temperature range. The rail-to-rail input and output

swings provided by the AD8551/AD8552/AD8554 make both

high-side and low-side sensing easy.

The AD8551/AD8552/AD8554 are specified for the extended

industrial/automotive temperature range (−40°C to +125°C).

The AD8551 single amplifier is available in 8-lead MSOP and

8-lead narrow SOIC packages. The AD8552 dual amplifier is

available in 8-lead narrow SOIC and 8-lead TSSOP surface-

mount packages. The AD8554 quad is available in 14-lead

narrow SOIC and 14-lead TSSOP packages.

AD8551/AD8552/AD8554

PIN CONFIGURATIONS

NC

18

NC

–IN A

+IN A

AD8551

V+

OUT A

V–

45

NC

1

0

0

-

1

NC = NO CONNECT

0

1

1

0

Figure 1. 8-Lead MSOP (RM Suffix)

NC

1

8

NC

–IN A

2

+IN A

3

AD8551

7

V+

6

OUT A

V–

4

5

NC

2

0

0

-

1

NC = NO CONNECT

0

1

1

0

Figure 2. 8-Lead SOIC (R Suffix)

OUT A

18

V+

–IN A

+IN A

AD8552

OUT B

3

0

–IN B

0

-

1

V–

45

+IN B

0

1

1

0

Figure 3. 8-Lead TSSOP (RU Suffix)

OUT A

1

8

V+

–IN A

2

+IN A

3

AD8552

7

OUT B

6

–IN B

4

0

V–

4

5

+IN B

0

-

1

0

1

1

0

Figure 4. 8-Lead SOIC (R Suffix)

OUT A

114

OUT D

–IN A–IN D

+IN A

V+

AD8554

+IN D

V–

+IN B

+IN C

5

–IN B–IN C

0

0

-

1

OUT B

78

OUT C

0

1

1

0

Figure 5. 14-Lead TSSOP (RU Suffix)

OUT A

1

14

OUT D

–IN A

2

13

–IN D

+IN A

3

12

+IN D

V+

4

AD8554

11

V–

+IN B

5

10

+IN C

–IN B

6

9

–IN C

6

0

0

-

OUT B

7

8

OUT C

1

0

1

1

0

Figure 6. 14-Lead SOIC (R Suffix)

Data Sheet

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

V

S

= 5 V, V

CM

= 2.5 V, V

O

= 2.5 V, T

A

= 25°C, unless otherwise noted.

Table 1.

Parameter

INPUT CHARACTERISTICS

Offset Voltage

Input Bias Current

AD8551/AD8554

AD8552

AD8552

Input Offset Current

AD8551/AD8554

AD8552

AD8552

Input Voltage Range

Common-Mode Rejection Ratio

Large Signal Voltage Gain

1

Offset Voltage Drift

OUTPUT CHARACTERISTICS

Output Voltage High

Symbol

V

OS

−40°C ≤ T

A

≤ +125°C

I

B

−40°C ≤ T

A

≤ +125°C

−40°C ≤ T

A

≤ +85°C

−40°C ≤ T

A

≤ +125°C

I

OS

−40°C ≤ T

A

≤ +125°C

−40°C ≤ T

A

≤ +85°C

−40°C ≤ T

A

≤ +125°C

CMRR

A

VO

ΔV

OS

/ΔT

V

OH

V

CM

= 0 V to +5 V

−40°C ≤ T

A

≤ +125°C

R

L

= 10 kΩ, V

O

= 0.3 V to 4.7 V

−40°C ≤ T

A

≤ +125°C

−40°C ≤ T

A

≤ +125°C

R

L

= 100 kΩ to GND

R

L

= 100 kΩ to GND @ −40°C to +125°C

R

L

= 10 kΩ to GND

R

L

= 10 kΩ to GND @ −40°C to +125°C

R

L

= 100 kΩ to V+

R

L

= 100 kΩ to V+ @ −40°C to +125°C

R

L

= 10 kΩ to V+

R

L

= 10 kΩ to V+ @ −40°C to +125°C

−40°C to +125°C

Output Current

POWER SUPPLY

Power Supply Rejection Ratio

Supply Current/Amplifier

DYNAMIC PERFORMANCE

Slew Rate

Overload Recovery Time

Gain Bandwidth Product

NOISE PERFORMANCE

Voltage Noise

Voltage Noise Density

Current Noise Density

1

AD8551/AD8552/AD8554

Conditions Min Typ

1

10

1.0

160

2.5

20

150

30

150

Max

5

10

50

1.5

300

4

70

200

150

400

5

Unit

μV

μV

pA

nA

pA

nA

pA

pA

pA

pA

V

dB

dB

dB

dB

μV/°C

V

V

V

V

mV

mV

mV

mV

mA

mA

mA

mA

dB

dB

μA

μA

V/μs

ms

MHz

μV p-p

μV p-p

nV/√Hz

fA/√Hz

0

120

115

125

120

140

130

145

135

0.005

4.998

4.997

4.98

4.975

1

2

10

15

±50

±40

±30

±15

130

130

850

1000

0.4

0.05

1.5

1.0

0.32

42

2

0.04

4.99

4.99

4.95

4.95

Output Voltage Low V

OL

10

10

30

30

Output Short-Circuit Limit Current I

SC

I

O

−40°C to +125°C

PSRR

I

SY

V

S

= 2.7 V to 5.5 V

−40°C ≤ T

A

≤ +125°C

V

O

= 0 V

−40°C ≤ T

A

≤ +125°C

R

L

= 10 kΩ

±25

120

115

975

1075

SR

GBP

e

n

p-p

e

n

p-p

e

n

i

n

0.3

0 Hz to 10 Hz

0 Hz to 1 Hz

f = 1 kHz

f = 10 Hz

Gain testing is dependent upon test bandwidth.

Rev. F | Page 3 of 24

AD8551/AD8552/AD8554

Parameter

INPUT CHARACTERISTICS

Offset Voltage

Input Bias Current

AD8551/AD8554

AD8552

AD8552

Input Offset Current

AD8551/AD8554

AD8552

AD8552

Input Voltage Range

Common-Mode Rejection Ratio

Large Signal Voltage Gain

1

Offset Voltage Drift

Symbol

V

OS

−40°C ≤ T

A

≤ +125°C

I

B

−40°C ≤ T

A

≤ +125°C

−40°C ≤ T

A

≤ +85°C

−40°C ≤ T

A

≤ +125°C

I

OS

−40°C ≤ T

A

≤ +125°C

−40°C ≤ T

A

≤ +85°C

−40°C ≤ T

A

≤ +125°C

CMRR

A

VO

ΔV

OS

/ΔT

V

CM

= 0 V to 2.7 V

−40°C ≤ T

A

≤ +125°C

R

L

= 10 kΩ, V

O

= 0.3 V to 2.4 V

−40°C ≤ T

A

≤ +125°C

−40°C ≤ T

A

≤ +125°C

0

115

110

110

105

10

1.0

160

2.5

10

150

30

150

130

130

140

130

0.005

Conditions Min Typ

1

Data Sheet

Max

5

10

50

1.5

300

4

50

200

150

400

2.7

Unit

μV

μV

pA

nA

pA

nA

pA

pA

pA

pA

V

dB

dB

dB

dB

μV/°C 0.04

Rev. F | Page 4 of 24

AD8551/AD8552/AD8554

FUNCTIONAL DESCRIPTION

The AD8551/AD8552/AD8554 are high precision, rail-to-rail

operational amplifiers that can be run from a single-supply voltage.

Their typical offset voltage of less than 1 μV allows these amplifiers

to be easily configured for high gains without risk of excessive

output voltage errors. The extremely small temperature drift of

5 nV/°C ensures a minimum of offset voltage error over its

entire temperature range of −40°C to +125°C, making the

AD8551/AD8552/AD8554 amplifiers ideal for a variety of

sensitive measurement applications in harsh operating

environments, such as underhood and braking/suspension

systems in automobiles.

The AD8551/AD8552/AD8554 are CMOS amplifiers and

achieve their high degree of precision through auto-zero

stabilization. This autocorrection topology allows the

AD8551/AD8552/AD8554 to maintain its low offset voltage

over a wide temperature range and over its operating lifetime.

Data Sheet

some improvements made over time. The AD8551/AD8552/

AD8554 design offers a number of significant performance

improvements over previous versions while attaining a very

substantial reduction in device cost. This section offers a simplified

explanation of how the AD8551/AD8552/AD8554 are able to

offer extremely low offset voltages and high open-loop gains.

As noted in the Amplifier Architecture section, each AD8551/

AD8552/AD8554 op amp contains two internal amplifiers. One

is used as the primary amplifier, the other as an autocorrection,

or nulling, amplifier. Each amplifier has an associated input

offset voltage that can be modeled as a dc voltage source in

series with the noninverting input. In Figure 50 and Figure 51

these are labeled as V

OSX

, where x denotes the amplifier

associated with the offset: A for the nulling amplifier and B for

the primary amplifier. The open-loop gain for the +IN and −IN

inputs of each amplifier is given as A

X

. Both amplifiers also have

a third voltage input with an associated open-loop gain of B

X

.

There are two modes of operation determined by the action of

two sets of switches in the amplifier: an auto-zero phase and an

amplification phase.

AMPLIFIER ARCHITECTURE

Each AD8551/AD8552/AD8554 op amps consist of two

amplifiers, a main amplifier and a secondary amplifier, used

to correct the offset voltage of the main amplifier. Both consist

of a rail-to-rail input stage, allowing the input common-mode

voltage range to reach both supply rails. The input stage consists

of an NMOS differential pair operating concurrently with a

parallel PMOS differential pair. The outputs from the

differential input stages are combined in another gain stage

whose output is used to drive a rail-to-rail output stage.

The wide voltage swing of the amplifier is achieved by using two

output transistors in a common-source configuration. The output

voltage range is limited by the drain-to-source resistance of

these transistors. As the amplifier is required to source or sink

more output current, the r

DS

of these transistors increases, raising

the voltage drop across these transistors. Simply put, the output

voltage does not swing as close to the rail under heavy output

current conditions as it does with light output current. This is a

characteristic of all rail-to-rail output amplifiers. Figure 12 and

Figure 13 show how close the output voltage can get to the rails

with a given output current. The output of the AD8551/AD8552/

AD8554 is short-circuit protected to approximately 50 mA of

current.

The AD8551/AD8552/AD8554 amplifiers have exceptional gain,

yielding greater than 120 dB of open-loop gain with a load of 2 kΩ.

Because the output transistors are configured in a common-source

configuration, the gain of the output stage, and thus the open-

loop gain of the amplifier, is dependent on the load resistance.

Open-loop gain decreases with smaller load resistances. This is

another characteristic of rail-to-rail output amplifiers.

Auto-Zero Phase

In this phase, all φA switches are closed and all φB switches are

opened. Here, the nulling amplifier is taken out of the gain loop

by shorting its two inputs together. Of course, there is a degree

of offset voltage, shown as V

OSA

, inherent in the nulling amplifier

which maintains a potential difference between the +IN and

−IN inputs. The nulling amplifier feedback loop is closed through

φB

2

and V

OSA

appears at the output of the nulling amp and on

C

M1

, an internal capacitor in the AD8551/AD8552/AD8554.

Mathematically, this is expressed in the time domain as

V

OA

[t] = A

A

V

OSA

[t] − B

A

V

OA

[t]

which can be expressed as

(1)

V

OA



t





A

A

V

OSA



t



1B

A

(2)

This demonstrates that the offset voltage of the nulling amplifier

times a gain factor appears at the output of the nulling amplifier

and, thus, on the C

M1

capacitor.

V

IN+

V

IN–

ФB

ФA

V

OSA

+

A

A

–B

A

ФA

V

OA

A

B

B

B

ФB

C

M2

V

OUT

V

NB

C

M1

0

1

1

0

1

-

0

5

0

BASIC AUTO-ZERO AMPLIFIER THEORY

Autocorrection amplifiers are not a new technology. Various IC

implementations have been available for more than 15 years with

Rev. F | Page 14 of 24

V

NA

Figure 50. Auto-Zero Phase of the AD8551/AD8552/AD8554

AD8551/AD8552/AD8554 Data Sheet

Rev. F | Page 22 of 24