TPA6011芯片资料_图文-USB迷|专注于互联网分享

2024年7月24日发(作者：丑武)

TPA6011A4

SLOS392 – FEBRUARY 2002

2-W STEREO AUDIO POWER AMPLIFIER

WITH ADVANCED DC VOLUME CONTROL

FEATURES

Advanced DC Volume Control With 2-dB Steps

From –40 dB to 20 dB

– Fade Mode

– Maximum Volume Setting for SE Mode

– Adjustable SE Volume Control Referenced

to BTL Volume Control

2 W Into 3-Ω Speakers

Stereo Input MUX

Differential Inputs

DESCRIPTION

The TPA6011A4 is a stereo audio power amplifier that

drives 2 W/channel of continuous RMS power into a 3-Ω

load. Advanced dc volume control minimizes external

components and allows BTL (speaker) volume control

and SE (headphone) volume control. Notebook and

pocket PCs benefit from the integrated feature set that

minimizes external components without sacrificing

functionality.

To simplify design, the speaker volume level is adjusted

by applying a dc voltage to the VOLUME terminal.

Likewise, the delta between speaker volume and

headphone volume can be adjusted by applying a dc

voltage to the SEDIFF terminal. To avoid an unexpected

high volume level through the headphones, a third

terminal, SEMAX, limits the headphone volume level

when a dc voltage is applied. Finally, to ensure a smooth

transition between active and shutdown modes, a fade

mode ramps the volume up and down.

APPLICATIONS

Notebook PC

LCD Monitors

Pocket PC

APPLICATION CIRCUIT

Right

Speaker

ROUT+

PGND

SE/BTL

Power Supply

Right HP

Audio Source

Right Line

Audio Source

LIN

AGND

BYPASS

(BYP)

1 kΩ

Headphones

ROUT–

HP/LINE

RHPIN

RLINEIN

RIN

VOLUME

SEDIFF

SEMAX

100 kΩ

DC VOLUME CONTROL

22100 kΩ

1 kΩ

BTL Volume

–

In From DAC

Potentiometer

(DC Voltage)

–10

–20

–30

–40

–50

SE Volume,

SEDIFF [Pin 20] = 0 V

Left Line

Audio Source

Left HP

Audio Source

Power Supply

–60

–70

SE Volume,

SEDIFF [Pin 20] = 1 V

LLINEIN

FADE

System

Control

LHPIN

SHUTDOWN

LOUT–

LOUT+

PGND

–80

Left

Speaker

BTL Volume (dB) ∝ Volume (V)

SE Volume (dB) ∝ Volume (V) – SEDIFF (V)

00.511.522.533.544.55

–90

Volume [Pin 21] – V

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA inormation is current as o publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

TPA6011A4

SLOS392 – FEBRUARY 2002

AVAILABLE OPTIONS

–40°C to 85°C

PACKAGE

24-PIN TSSOP (PWP)

TPA6011A4PWP

NOTE:The PWP package is available taped and reeled. To order a taped

and reeled part, add the suffix R to the part number (e.g.,

TPA6011A4PWPR).

absolute maximum ratings over operating free-air temperature (unless otherwise noted)

†

Supply voltage, V

, PV

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6 V

Input voltage, V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to V

+0.3 V

Continuous total power dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table

Operating free-air temperature range, T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C

Operating junction temperature range, T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 150°C

Storage temperature range, T

stg

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

DISSIPATION RATING TABLE

PACKAGE

PWP

≤ 25°C

POWER RATING

2.7 mW

DERATING FACTOR

ABOVE T

= 25°C

21.8 mW/°C

= 70°C

POWER RATING

1.7 W

= 85°C

POWER RATING

1.4 W

recommended operating conditions

MIN

Supply voltage, V

, PV

High-level input voltage, VHighlevelinputvoltageV

LowlevelinputvoltageV

Low-level input voltage, V

Operating free-air temperature, T

SE/BTL, HP/LINE, FADE

SHUTDOWN

SE/BTL, HP/LINE, FADE

SHUTDOWN

–4085

4.0

0.8×V

0.6×V

0.8

MAX

5.5

UNIT

°C

TPA6011A4

SLOS392 – FEBRUARY 2002

electrical characteristics, T

= 25°C, V

= PV

= 5.5 V (unless otherwise noted)

PARAMETERTEST CONDITIONS

= 5.5 V, Gain = 0 dB,

SE/BTL = 0 V

= 5.5 V, Gain = 20 dB,

SE/BTL = 0 V

= PV

= 4.0 V to 5.5 V

=PV

= 5.5 V,

= V

= PV

= 5.5 V, V

= 0 V

=PV

= 5.5 V,

SE/BTL = 0 V, SHUTDOWN = 2 V

=PV

= 5.5 V,

SE/BTL = 5.5 V, SHUTDOWN = 2 V

= 5 V = PV

,SE/BTL = 0 V,

SHUTDOWN = 2 V, R

= 3Ω,

= 2 W, stereo

SHUTDOWN = 0.0 V

6.0

3.0

7.5

–42–70

9.0

MINTYPMAX

UNIT

µA

| V

Outputoffsetvoltage(measureddifferentially)

Output offset voltage (measured differentially)

PSRR

| I

Power supply rejection ratio

High-level input current (SE/BTL, FADE, HP/LINE,

SHUTDOWN, SEDIFF, SEMAX, VOLUME)

Low-level input current (SE/BTL, FADE, HP/LINE,

SHUTDOWN, SEDIFF, SEMAX, VOLUME)

SupplycurrentnoloadSupply current, no load

DD(SD)

Supply current, max power into a 3-Ω load

Supply current, shutdown mode

1.5

120

RMS

µA

operating characteristics, T

= 25°C, V

= PV

= 5 V, R

= 3 Ω, Gain = 6 dB (unless otherwise noted)

PARAMETER

THD+N

Bypass

Output power

Total harmonic distortion + noise

High-level output voltage

Low-level output voltage

Bypass voltage (Nominally V

/2)

Maximum output power bandwidth

SupplyripplerejectionratioSupply ripple rejection ratio

Noise output voltage

Input impedance (see figure 25)

TEST CONDITIONS

THD = 1%, f=1 kHz

=1 W, R

=8 Ω, f=20 Hz to 20 kHz

= 8 Ω, Measured between output and V

= 8 Ω, Measured between output and GND

Measured at pin 17, No load, V

= 5.5 V

THD=5%

f = 1 kHz, Gain = 0 dB,

(BYP)

= 0.47 µF

f = 20 Hz to20 kHz, Gain = 0 dB,

(BYP)

= 0.47 µF

VOLUME = 5.0 V

BTL

2.652.75

>20

–63

–57

MINTYP

<0.4%

700

400

2.85

kHz

µV

RMS

kΩ

MAXUNIT

TPA6011A4

SLOS392 – FEBRUARY 2002

PWP PACKAGE

(TOP VIEW)

PGND

ROUT–

RHPIN

RLINEIN

RIN

LIN

LLINEIN

LHPIN

LOUT–

ROUT+

SE/BTL

HP/LINE

VOLUME

SEDIFF

SEMAX

AGND

BYPASS

FADE

SHUTDOWN

LOUT+

PGND

Terminal Functions

TERMINAL

NAME

PGND

LOUT–

LHPIN

LLINEIN

LIN

RIN

RLINEIN

RHPIN

ROUT–

ROUT+

SHUTDOWN

FADE

BYPASS

AGND

SEMAX

SEDIFF

VOLUME

HP/LINE

SE/BTL

LOUT+

NO.

1, 13

3, 11

I/O

–

Power ground

Left channel negative audio output

Supply voltage terminal for power stage

Left channel headphone input, selected when HP/LINE is held high

Left channel line input, selected when HP/LINE is held low

Common left channel input for fully differential input. AC ground for single-ended inputs.

Supply voltage terminal

Common right channel input for fully differential input. AC ground for single-ended inputs.

Right channel line input, selected when HP/LINE is held low

Right channel headphone input, selected when HP/LINE is held high

Right channel negative audio output

Right channel positive audio output

Places the amplifier in shutdown mode if a TTL logic low is placed on this terminal

Places the amplifier in fade mode if a logic low is placed on this terminal; normal operation if a logic high is

placed on this terminal

Tap to voltage divider for internal midsupply bias generator used for analog reference

Analog power supply ground

Sets the maximum volume for single ended operation. DC voltage range is 0 to V

Sets the difference between BTL volume and SE volume. DC voltage range is 0 to V

Terminal for dc volume control. DC voltage range is 0 to V

Input MUX control. When logic high, RHPIN and LHPIN inputs are selected. When logic low, RLINEIN and

LLINEIN inputs are selected.

Output MUX control. When this terminal is high, SE outputs are selected. When this terminal is low, BTL

outputs are selected.

Left channel positive audio output.

DESCRIPTION

TPA6011A4

SLOS392 – FEBRUARY 2002

functional block diagram

RHPIN

RLINEIN

MUX

HP/LINE

BYP

ROUT+

RIN

BYP

ROUT–

SE/BTL

PGND

BYPASS

SHUTDOWN

AGND

SE/BTL

HP/LINE

MUX

Control

VOLUME

SEDIFF

SEMAX

FADE

LHPIN

LLINEIN

MUX

HP/LINE

LIN

32-Step

Volume

Control

Power

Management

BYP

LOUT+

BYP

LOUT–

SE/BTL

NOTE:All resistor wipers are adjusted with 32 step volume control.

TPA6011A4

SLOS392 – FEBRUARY 2002

Table 1. DC Volume Control (BTL Mode, V

= 5 V)

VOLUME (PIN 21)

FROM (V)

0.00

0.33

0.44

0.56

0.67

0.78

0.89

1.01

1.12

1.23

1.35

1.46

1.57

1.68

1.79

1.91

2.02

2.13

2.25

2.36

2.47

2.58

2.70

2.81

2.92

3.04

3.15

3.26

3.38

3.49

3.60

3.71

TO (V)

0.26

0.37

0.48

0.59

0.70

0.82

0.93

1.04

1.16

1.27

1.38

1.49

1.60

1.72

1.83

1.94

2.06

2.17

2.28

2.39

2.50

2.61

2.73

2.83

2.95

3.06

3.17

3.29

3.40

3.51

3.63

5.00

GAIN OF AMPLIFIER

(Typ)

–85

†

–40

–38

–36

–34

–32

–30

–28

–26

–24

–22

–20

–18

–16

–14

–12

–10

–8

–6

†

–4

–2

†

Tested in production. Remaining gain steps are specified by design.

NOTE:For other values of V

, scale the voltage values in the table by a factor of V

/5.

TPA6011A4

SLOS392 – FEBRUARY 2002

Table 2. DC Volume Control (SE Mode, V

= 5 V)

SE_VOLUME = VOLUME – SEDIFF or SEMAX

FROM (V)

0.00

0.33

0.44

0.56

0.67

0.78

0.89

1.01

1.12

1.23

1.35

1.46

1.57

1.68

1.79

1.91

2.02

2.13

2.25

2.36

2.47

2.58

2.70

2.81

2.92

3.04

3.15

3.26

3.38

3.49

3.60

3.71

TO (V)

0.26

0.37

0.48

0.59

0.70

0.82

0.93

1.04

1.16

1.27

1.38

1.49

1.60

1.72

1.83

1.94

2.06

2.17

2.28

2.39

2.50

2.61

2.73

2.83

2.95

3.06

3.17

3.29

3.40

3.51

3.63

5.00

GAIN OF AMPLIFIER

(Typ)

–85

†

–46

–44

–42

–40

–38

–36

–34

–32

–30

–28

–26

–24

–22

–20

–18

–16

–14

–12

–10

–8

–6

†

–4

–2

†

Tested in production. Remaining gain steps are specified by design.

NOTE:For other values of V

, scale the voltage values in the table by a factor of V

/5.

TPA6011A4

SLOS392 – FEBRUARY 2002

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

THDNTHD+N

Totalharmonicdistortionplusnoise(BTL)Total harmonic distortion plus noise (BTL)

vs Frequency

vs Output power

vs Frequency

THD+N

Total harmonic distortion plus noise (SE)Total harmonic distortion lus noise (SE)

Closed loop response

SupplycurrentSupply current

Power Dissipation

Output power

Crosstalk

HP/LINE attenuation

PSRR

Power supply ripple rejection (BTL)

Power supply ripple rejection (SE)

Input impedance

Output noise voltage

vs Temperature

vs Supply voltage

vs Output power

vs Load resistance

vs Frequency

vs BTL gain

vs Frequency

vs Output power

vs Output voltage

1, 2 3

6, 7, 8

4, 5

11, 12

14, 15, 16

17, 18

20, 21

TPA6011A4

SLOS392 – FEBRUARY 2002

TYPICAL CHARACTERISTICS

TOTAL HARMONIC DISTORTION + NOISE (BTL)

FREQUENCY

0.5

0.2

0.1

0.05

0.02

0.01

= 1 W

= 0.5 W

= 5 V

= 3 Ω

Gain = 20 dB

BTL

–

(

)

–

(

)

–

TOTAL HARMONIC DISTORTION + NOISE (BTL)

FREQUENCY

0.5

= 0.25 W

0.2

0.1

0.05

0.02

0.01

21 k2 k5 k10 k20 k

= 1 W

= 5 V

= 4 Ω

Gain = 20 dB

BTL

= 1.5 W

= 1.75 W

1001 k

f – Frequency – Hz

10 k20 k

f – Frequency – Hz

Figure 1

TOTAL HARMONIC DISTORTION + NOISE (BTL)

FREQUENCY

–

(

)

–

(

)

–

0.5

0.2

0.1

0.05

0.02

0.01

21 k2 k

= 1 W

5 k10 k20 k

= 0.25 W

= 0.5 W

= 5 V

= 8 Ω

Gain = 20 dB

BTL

Figure 2

TOTAL HARMONIC DISTORTION + NOISE (SE)

FREQUENCY

0.5

0.2

0.1

0.05

= 75 mW

0.02

0.01

5 k2 k5 k10 k20 k

= 5 V

= 32 Ω

Gain = 14 dB

f – Frequency – Hz

Figure 3Figure 4

TPA6011A4

SLOS392 – FEBRUARY 2002

TYPICAL CHARACTERISTICS

TOTAL HARMONIC DISTORTION + NOISE (SE)

FREQUENCY

–

(

)

–

(

)

–

0.5

0.2

0.1

0.05

0.02

0.01

21 k2 k

f – Frequency – Hz

5 k10 k20 k

= 1 V

RMS

= 5 V

= 10 kΩ

Gain = 14 dB

TOTAL HARMONIC DISTORTION + NOISE (BTL)

OUTPUT POWER

0.5

0.2

0.1

0.05

0.02

0.01

f = 20 Hz

0.11

– Output Power – W

= 5 V

= 3 Ω

Gain = 20 dB

BTL

f = 20 kHz

f = 1 kHz

Figure 5

TOTAL HARMONIC DISTORTION + NOISE (BTL)

OUTPUT POWER

–

(

)

–

0.5

0.2

0.1

0.05

0.02

0.01

0.020.050.10.20.51

– Output Power – W

20 kHz

–

(

)

–

= 5 V

= 4 Ω

Gain = 20 dB

BTL

Figure 6

TOTAL HARMONIC DISTORTION + NOISE (BTL)

OUTPUT POWER

0.5

20 kHz

0.2

0.1

0.05

0.02

0.01

0.020.050.10.20.51

– Output Power – W

1 kHz

20 Hz

= 5 V

= 8 Ω

Gain = 20 dB

BTL

1 kHz

20 Hz

Figure 7

Figure 8

TPA6011A4

SLOS392 – FEBRUARY 2002

TYPICAL CHARACTERISTICS

TOTAL HARMONIC DISTORTION + NOISE (SE)

OUTPUT POWER

–

(

)

–

0.5

0.2

0.1

0.05

0.02

0.01

10 m

20 kHz

1 kHz

50 m100 m

– Output Power – W

200 m

20 Hz

= 5 V

= 32 Ω

Gain = 14 dB

–

(

)

–

TOTAL HARMONIC DISTORTION + NOISE (SE)

OUTPUT VOLTAGE

0.5

0.2

0.1

0.05

0.02

0.01

0.005

0.002

0.001

0500 m11.5

– Output Voltage – rms

1 kHz

20 Hz

20 kHz

= 5 V

= 10 kΩ

Gain = 14 dB

Figure 9

CLOSED LOOP RESPONSE

–

–10

–20

–30

–40

–50

–60

–70

–80

101001 k10 k100 k

Phase

= 5 Vdc

= 8 Ω

Mode = BTL

Gain = 0 dB

Gain

180

150

120

–

–30

–60

–90

–120

–150

–180

1 M

–10

–20

–30

–40

–50

–60

–70

–80

= 5 Vdc

= 8 Ω

Mode = BTL

Gain = 20 dB

100

Figure 10

CLOSED LOOP RESPONSE

180

Gain

150

120

Phase

–30

–60

–90

–120

–150

1 k10 k100 k

–180

1 M

–

f – Frequency – Hz

Figure 11Figure 12

TPA6011A4

SLOS392 – FEBRUARY 2002

TYPICAL CHARACTERISTICS

SUPPLY CURRENT

FREE-AIR TEMPERATURE

= 5 V

Mode = BTL

SHUTDOWN = V

–

5210125

–1

0.511.522.533.544.555.5

= –40°C

= 25°C

–

SUPPLY CURRENT

SUPPLY VOLTAGE

Mode = BTL

SHUTDOWN = V

= 125°C

–40–25–10

– Free-Air Temperature – °C

– Supply Voltage – V

Figure 13

SUPPLY CURRENT

SUPPLY VOLTAGE

–

=–40°C

00.511.522.533.544.5

– Supply Voltage – V

55.5

= 25°C

Mode = SE

SHUTDOWN = V

= 125°C

–

450

400

350

300

250

200

150

100

00.51

Figure 14

SUPPLY CURRENT

SUPPLY VOLTAGE

Mode = SD

SHUTDOWN = 0 V

= 125°C

= –40°C

= 25°C

1.522.533.5

– Supply Voltage – V

44.55

Figure 15

Figure 16

TPA6011A4

SLOS392 – FEBRUARY 2002

TYPICAL CHARACTERISTICS

POWER DISSIPATION (PER CHANNEL)

OUTPUT POWER

–

(

)

–

(

)

–

1.8

1.6

1.4

1.2

0.8

0.6

0.4

0.2

00.20.40.60.811.21.41.61.82

8 Ω

4 Ω

= 5 V

BTL

3 Ω

200

180

160

140

120

100

250300

32 Ω

16 Ω

= 5 V

POWER DISSIPATION (PER CHANNEL)

OUTPUT POWER

8 Ω

– Output Power – W

– Output Power – mW

Figure 17

OUTPUT POWER

LOAD RESISTANCE

2.2

1.8

–

1.6

1.4

1.2

0.8

0.6

0.4

0.2

– Load Resistance – Ω

–

= 5 V

THD+N = 1%

Gain = 20 dB

BTL

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

–110

–120

20100

= 5 V

= 1 W

= 8 Ω

Gain = 0dB

BTL

Figure 18

CROSSTALK

FREQUENCY

Left to Right

Right to Left

1 k

f – Frequency – Hz

10 k20 k

Figure 19Figure 20

TPA6011A4

SLOS392 – FEBRUARY 2002

TYPICAL CHARACTERISTICS

CROSSTALK

FREQUENCY

–10

–20

–30

–

–40

–50

–60

–70

–80

–90

–100

–110

–120

20100

Right to Left

1 k

f – Frequency – Hz

10 k20 k

Left to Right

= 5 V

= 1 W

= 8 Ω

Gain = 20 dB

BTL

HP/LINE ATTENUATION

FREQUENCY

–10

–20

–

–30

–40

–50

–60

–70

–80

–90

–100

–110

–120

201001 k10 k20 k

HP Active

Line Active

= 5 V

= 1 V

RMS

= 8 Ω

BTL

f – Frequency – Hz

Figure 21

POWER SUPPLY REJECTION RATIO (BTL)

FREQUENCY

–

(

)

–

(

)

–

–10

–20

–30

–40

–50

–60

–70

–80

20100

Gain = 1

Gain = 10

= 5 V

= 8 Ω

(BYP)

=0.47 µF

BTL

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

20100

Figure 22

POWER SUPPLY REJECTION RATIO (SE)

FREQUENCY

= 5 V

= 32 Ω

(BYP)

=0.47 µF

Gain = 0 dB

Gain = 14 dB

1 k

f – Frequency – Hz

10 k20 k

1 k

f – Frequency – Hz

10 k20 k

Figure 23Figure 24

TPA6011A4

SLOS392 – FEBRUARY 2002

TYPICAL CHARACTERISTICS

INPUT IMPEDANCE

BTL GAIN

–

Ω

–40–30–20–10

1020

BTL Gain – dB

Figure 25

OUTPUT NOISE VOLTAGE

FREQUENCY

180

–

160

140

120

100

Gain = 0 dB

101001 k

10 k20 k

= 5 V

BW = 22 Hz to 22 kHz

= 8 Ω

BTL

Gain = 20 dB

f – Frequency – Hz

Figure 26

TPA6011A4

SLOS392 – FEBRUARY 2002

APPLICATION INFORMATION

selection of components

Figure 27 and Figure 28 are schematic diagrams of typical notebook computer application circuits.

Right

Speaker

ROUT+

PGND

SE/BTL

Power Supply

Right HP

Audio Source

Right Line

Audio Source

LIN

AGND

BYPASS

(BYP)

1 kΩ

Headphones

ROUT–

HP/LINE

RHPIN

RLINEIN

RIN

VOLUME

SEDIFF

SEMAX

In From DAC

Potentiometer

(DC Voltage)

100 kΩ

1 kΩ

Left Line

Audio Source

Left HP

Audio Source

Power Supply

LLINEIN

LHPIN

LOUT–

FADE

SHUTDOWN

LOUT+

PGND

System

Control

Left

Speaker

NOTE A: A 0.1-µF ceramic capacitor should be placed as close as possible to the IC. For filtering lower-frequency noise signals, a larger

electrolytic capacitor of 10 µF or greater should be placed near the audio power amplifier.

Figure 27. Typical TPA6011A4 Application Circuit Using Single-Ended Inputs and Input MUX

TPA6011A4

SLOS392 – FEBRUARY 2002

APPLICATION INFORMATION

Right

Speaker

ROUT+

PGND

SE/BTL

Power Supply

Right Negative

Differential Input Signal

Right Positive

Differential Input Signal

Left Positive

Differential Input Signal

Left Negative

Differential Input Signal

LIN

AGND

BYPASS

(BYP)

1 kΩ

Headphones

ROUT–

HP/LINE

RHPIN

RLINEIN

RIN

VOLUME

SEDIFF

SEMAX

In From DAC

Potentiometer

(DC Voltage)

100 kΩ

1 kΩ

LLINEIN

LHPIN

LOUT–

FADE

SHUTDOWN

LOUT+

PGND

System

Control

Power Supply

Left

Speaker

NOTE A: A 0.1-µF ceramic capacitor should be placed as close as possible to the IC. For filtering lower-frequency noise signals, a larger

electrolytic capacitor of 10 µF or greater should be placed near the audio power amplifier.

Figure 28. Typical TPA6011A4 Application Circuit Using Differential Inputs

SE/BTL operation

The ability of the TPA6011A4 to easily switch between BTL and SE modes is one of its most important cost

saving features. This feature eliminates the requirement for an additional headphone amplifier in applications

where internal stereo speakers are driven in BTL mode but external headphone or speakers must be

accommodated. Internal to the TPA6011A4, two separate amplifiers drive OUT+ and OUT–. The SE/BTL input

controls the operation of the follower amplifier that drives LOUT– and ROUT–. When SE/BTL is held low, the

amplifier is on and the TPA6011A4 is in the BTL mode. When SE/BTL is held high, the OUT– amplifiers are in

a high output impedance state, which configures the TPA6011A4 as an SE driver from LOUT+ and ROUT+. I

is reduced by approximately one-third in SE mode. Control of the SE/BTL input can be from a logic-level CMOS

source or, more typically, from a resistor divider network as shown in Figure 29. The trip level for the SE/BTL

input can be found in the recommended operating conditions table on page 4.

TPA6011A4

SLOS392 – FEBRUARY 2002

APPLICATION INFORMATION

SE/BTL operation (continued)

RHPIN

RLINEIN

MUX

Input

MUX

Control

Bypass

ROUT+24

HP/LINE

RIN

Bypass

SE/BTL23

100 kΩ

ROUT–2

100 kΩ

330 µF

1 kΩ

LOUT+

Figure 29. TPA6011A4 Resistor Divider Network Circuit

Using a 1/8-in. (3,5 mm) stereo headphone jack, the control switch is closed when no plug is inserted. When

closed the 100-kΩ/1-kΩ divider pulls the SE/BTL input low. When a plug is inserted, the 1-kΩ resistor is

disconnected and the SE/BTL input is pulled high. When the input goes high, the OUT– amplifier is shut down

causing the speaker to mute (open-circuits the speaker). The OUT+ amplifier then drives through the output

capacitor (C

) into the headphone jack.

HP/LINE operation

The HP/LINE input controls the internal input multiplexer (MUX). Refer to the block diagram in Figure 29. This

allows the device to switch between two separate stereo inputs to the amplifier. For design flexibility, the

HP/LINE control is independent of the output mode, SE or BTL, which is controlled by the aforementioned

SE/BTL pin. To allow the amplifier to switch from the LINE inputs to the HP inputs when the output switches from

BTL mode to SE mode, simply connect the SE/BTL control input to the HP/LINE input.

When this input is logic high, the RHPIN and LHPIN inputs are selected. When this terminal is logic low, the

RLINEIN and LLINEIN inputs are selected. This operation is also detailed in Table 3 and the trip levels for a logic

low (V

) or logic high (V

) can be found in the recommended operating conditions table on page 4.

TPA6011A4

SLOS392 – FEBRUARY 2002

APPLICATION INFORMATION

shutdown modes

The TPA6011A4 employs a shutdown mode of operation designed to reduce supply current (I

) to the absolute

minimum level during periods of nonuse for battery-power conservation. The SHUTDOWN input terminal

should be held high during normal operation when the amplifier is in use. Pulling SHUTDOWN low causes the

outputs to mute and the amplifier to enter a low-current state, I

= 20 µA. SHUTDOWN should never be left

unconnected because amplifier operation would be unpredictable.

Table 3. HP/LINE, SE/BTL, and Shutdown Functions

INPUTS

†

HP/LINE

Low

High

SE/BTL

Low

High

Low

High

SHUTDOWN

Low

High

AMPLIFIER STATE

INPUT

Line

OUTPUT

Mute

BTL

†

Inputs should never be left unconnected.

X = don’t care

NOTE:The Low and High trip levels can be found in the recommended operating conditions table.

FADE operation

For design flexibility, a fade mode is provided to slowly ramp up the amplifier gain when coming out of shutdown

mode and conversely ramp the gain down when going into shutdown. This mode provides a smooth transition

between the active and shutdown states and virtually eliminates any pops or clicks on the outputs.

When the FADE input is a logic low, the device is placed into fade-on mode. A logic high on this pin places the

amplifier in the fade-off mode. The voltage trip levels for a logic low (V

) or logic high (V

) can be found in the

recommended operating conditions table on page 4.

When a logic low is applied to the FADE pin and a logic low is then applied on the SHUTDOWN pin, the channel

gain steps down from gain step to gain step at a rate of two clock cycles per step. With a nominal internal clock

frequency of 58 Hz, this equates to 34 ms (1/24 Hz) per step. The gain steps down until the lowest gain step

is reached. The time it takes to reach this step depends on the gain setting prior to placing the device in

shutdown. For example, if the amplifier is in the highest gain mode of 20 dB, the time it takes to ramp down the

channel gain is 1.05 seconds. This number is calculated by taking the number of steps to reach the lowest gain

from the highest gain, or 31 steps, and multiplying by the time per step, or 34 ms.

After the channel gain is stepped down to the lowest gain, the amplifier begins discharging the bypass capacitor

from the nominal voltage of V

/2 to ground. This time is dependent on the value of the bypass capacitor. For

a 0.47-µF capacitor that is used in the application diagram in Figure 27, the time is approximately 500 ms. This

time scales linearly with the value of bypass capacitor. For example, if a 1-µF capacitor is used for bypass, the

time period to discharge the capacitor to ground is twice that of the 0.47-µF capacitor, or 1 second. Figure 30

below is a waveform captured at the output during the shutdown sequence when the part is in fade-on mode.

The gain is set to the highest level and the output is at V

when the amplifier is shut down.

When a logic high is placed on the SHUTDOWN pin and the FADE pin is still held low, the device begins the

start-up process. The bypass capacitor will begin charging. Once the bypass voltage reaches the final value

of V

/2, the gain increases in 2-dB steps from the lowest gain level to the gain level set by the dc voltage applied

to the VOLUME, SEDIFF, and SEMAX pins.

TPA6011A4

SLOS392 – FEBRUARY 2002

APPLICATION INFORMATION

FADE operation (continued)

In the fade-off mode, the amplifier stores the gain value prior to starting the shutdown sequence. The output

of the amplifier immediately drops to V

/2 and the bypass capacitor begins a smooth discharge to ground.

When shutdown is released, the bypass capacitor charges up to V

/2 and the channel gain returns

immediately to the value stored in memory. Figure 31 below is a waveform captured at the output during the

shutdown sequence when the part is in the fade-off mode. The gain is set to the highest level, and the output

is at V

when the amplifier is shut down.

The power-up sequence is different from the shutdown sequence and the voltage on the FADE pin does not

change the power-up sequence. Upon a power-up condition, the TPA6011A4 begins in the lowest gain setting

and steps up 2 dB every 2 clock cycles until the final value is reached as determined by the dc voltage applied

to the VOLUME, SEDIFF, and SEMAX pins.

Device Shutdown

ROUT+

Figure 30. Shutdown Sequence in the Fade-on Mode

Device Shutdown

ROUT+

Figure 31. Shutdown Sequence in the Fade-off Mode

TPA6011A4

SLOS392 – FEBRUARY 2002

APPLICATION INFORMATION

VOLUME, SEDIFF, and SEMAX operation

Three pins labeled VOLUME, SEDIFF, and SEMAX control the BTL volume when driving speakers and the SE

volume when driving headphones. All of these pins are controlled with a dc voltage, which should not exceed

When driving speakers in BTL mode, the VOLUME pin is the only pin that controls the gain. Table 1 shows the

gain for the BTL mode. The voltages listed in the table are for V

= 5 V. For a different V

, the values in the

table scale linearly. If V

= 4 V, multiply all the voltages in the table by 4 V/5 V, or 0.8.

The TPA6011A4 allows the user to specify a difference between BTL gain and SE gain. This is desirable to avoid

any listening discomfort when plugging in headphones. When switching to SE mode, the SEDIFF and SEMAX

pins control the singe-ended gain proportional to the gain set by the voltage on the VOLUME pin. When SEDIFF

= 0 V, the difference between the BTL gain and the SE gain is 6 dB. Refer to the section labeled bridged-tied

load versus single-ended load for an explanation on why the gain in BTL mode is 2x that of single-ended mode,

or 6dB greater. As the voltage on the SEDIFF terminal is increased, the gain in SE mode decreases. The voltage

on the SEDIFF terminal is subtracted from the voltage on the VOLUME terminal and this value is used to

determine the SE gain.

Some audio systems require that the gain be limited in the single-ended mode to a level that is comfortable for

headphone listening. Most volume control devices only have one terminal for setting the gain. For example, if

the speaker gain is 20 dB, the gain in the headphone channel is fixed at 14 dB. This level of gain could cause

discomfort to listeners and the SEMAX pin allows the designer to limit this discomfort when plugging in

headphones. The SEMAX terminal controls the maximum gain for single-ended mode.

The functionality of the SEDIFF and SEMAX pin are combined to set the SE gain. A block diagram of the

combined functionality is shown in Figure 32. The value obtained from the block diagram for SE_VOLUME is

a dc voltage that can be used in conjunction with Table 2 to determine the SE gain. Again, the voltages listed

in the table are for V

= 5V. The values must be scaled for other values of V

Tables 1 and 2 show a range of voltages for each gain step. There is a gap in the voltage between each gain

step. This gap represents the hysteresis about each trip point in the internal comparator. The hysteresis ensures

that the gain control is monotonic and does not oscillate from one gain step to another. If a potentiometer is used

to adjust the voltage on the control terminals, the gain increases as the potentiometer is turned in one direction

and decreases as it is turned back the other direction. The trip point, where the gain actually changes, is different

depending on whether the voltage is increased or decreased as a result of the hysteresis about each trip point.

The gaps in tables 1 and 2 can also be thought of as indeterminate states where the gain could be in the next

higher gain step or the lower gain step depending on the direction the voltage is changing. If using a DAC to

control the volume, set the voltage in the middle of each range to ensure that the desired gain is achieved.

A pictorial representation of the volume control can be found in Figure 33. The graph focuses on three gain steps

with the trip points defined in Table 1 for BTL gain. The dotted line represents the hysteresis about each gain

step.

TPA6011A4

SLOS392 – FEBRUARY 2002

APPLICATION INFORMATION

VOLUME, SEDIFF, and SEMAX operation (continued)

SEDIFF (V)

SEMAX (V)

VOLUME (V)

–

VOLUME–SEDIFF

Is SEMAX>

(VOLUME–SEDIFF)

SE_VOLUME (V) = VOLUME (V) – SEDIFF (V)

YES

SE_VOLUME (V) = SEMAX (V)

Figure 32. Block Diagram of SE Volume Control

–

2.612.702.732.81

Voltage on VOLUME Pin – V

Figure 33. DC Volume Control Operation

TPA6011A4

SLOS392 – FEBRUARY 2002

APPLICATION INFORMATION

input resistance

Each gain setting is achieved by varying the input resistance of the amplifier, which can range from its smallest

value to over six times that value. As a result, if a single capacitor is used in the input high-pass filter, the –3dB

or cutoff frequency also changes by over six times. If an additional resistor is connected from the input pin of

the amplifier to ground, as shown in the figure below, the variation of the cutoff frequency is much reduced.

Input Signal

Figure 34. Resistor on Input for Cut-Off Frequency

The input resistance at each gain setting is given in Figure 34.

The –3-dB frequency can be calculated using equation 1.

*3dB

input capacitor, C

2pCR

(1)

In the typical application an input capacitor (C

) is required to allow the amplifier to bias the input signal to the

proper dc level for optimum operation. In this case, C

and the input impedance of the amplifier (R

) form a

high-pass filter with the corner frequency determined in equation 2.

–3 dB

c(highpass)

2pR

(2)

TPA6011A4

SLOS392 – FEBRUARY 2002

APPLICATION INFORMATION

input capacitor, C

(continued)

The value of C

is important to consider as it directly affects the bass (low frequency) performance of the circuit.

Consider the example where R

is 70 kΩ and the specification calls for a flat-bass response down to 40 Hz.

Equation 2 is reconfigured as equation 3.

2pR

(3)

In this example, C

is 56.8 nF, so one would likely choose a value in the range of 56 nF to 1 µF. A further

consideration for this capacitor is the leakage path from the input source through the input network (C

) and the

feedback network to the load. This leakage current creates a dc offset voltage at the input to the amplifier that

reduces useful headroom, especially in high gain applications. For this reason, a low-leakage tantalum or

ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor

should face the amplifier input in most applications as the dc level there is held at V

/2, which is likely higher

than the source dc level. Note that it is important to confirm the capacitor polarity in the application.

power supply decoupling, C

(S)

The TPA6011A4 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling

to ensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also

prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is

achieved by using two capacitors of different types that target different types of noise on the power supply leads.

For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance

(ESR) ceramic capacitor, typically 0.1 µF placed as close as possible to the device V

lead, works best. For

filtering lower-frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near

the audio power amplifier is recommended.

midrail bypass capacitor, C

(BYP)

The midrail bypass capacitor (C

(BYP)

) is the most critical capacitor and serves several important functions.

During start-up or recovery from shutdown mode, C

(BYP)

determines the rate at which the amplifier starts up.

The second function is to reduce noise produced by the power supply caused by coupling into the output drive

signal. This noise is from the midrail generation circuit internal to the amplifier, which appears as degraded

PSRR and THD+N.

Bypass capacitor (C

(BYP)

) values of 0.47-µF to 1-µF ceramic or tantalum low-ESR capacitors are recommended

for the best THD and noise performance. For the best pop performance, choose a value for C

(BYP)

that is equal

to or greater than the value chosen for C

. This ensures that the input capacitors are charged up to the midrail

voltage before C

(BYP)

is fully charged to the midrail voltage.

TPA6011A4

SLOS392 – FEBRUARY 2002

APPLICATION INFORMATION

output coupling capacitor, C

(C)

In the typical single-supply SE configuration, an output coupling capacitor (C

(C)

) is required to block the dc bias

at the output of the amplifier, thus preventing dc currents in the load. As with the input coupling capacitor, the

output coupling capacitor and impedance of the load form a high-pass filter governed by equation 4.

–3 dB

c(high)

2pR

(C)

(4)

The main disadvantage, from a performance standpoint, is the load impedances are typically small, which drives

the low-frequency corner higher, degrading the bass response. Large values of C

(C)

are required to pass low

frequencies into the load. Consider the example where a C

(C)

of 330 µF is chosen and loads vary from 3 Ω,

4 Ω, 8 Ω, 32 Ω, 10 kΩ, and 47 kΩ. Table 4 summarizes the frequency response characteristics of each

configuration.

Table 4. Common Load Impedances Vs Low Frequency Output Characteristics in SE Mode

3 Ω

4 Ω

8 Ω

32 Ω

10,000 Ω

47,000 Ω

(C)

330 µF

Lowest Frequency

161 Hz

120 Hz

60 Hz

Ą15 Hz

0.05 Hz

0.01 Hz

As Table 4 indicates, most of the bass response is attenuated into a 4-Ω load, an 8-Ω load is adequate,

headphone response is good, and drive into line level inputs (a home stereo for example) is exceptional.

using low-ESR capacitors

Low-ESR capacitors are recommended throughout this applications section. A real (as opposed to ideal)

capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this

resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this

resistance, the more the real capacitor behaves like an ideal capacitor.

TPA6011A4

SLOS392 – FEBRUARY 2002

APPLICATION INFORMATION

bridged-tied load versus single-ended lode

Figure 35 shows a Class-AB audio power amplifier (APA) in a BTL configuration. The TPA6011A4 BTL amplifier

consists of two Class-AB amplifiers driving both ends of the load. There are several potential benefits to this

differential drive configuration, but, initially consider power to the load. The differential drive to the speaker

means that as one side is slewing up, the other side is slewing down, and vice versa. This in effect doubles the

voltage swing on the load as compared to a ground referenced load. Plugging 2 × V

O(PP)

into the power

equation, where voltage is squared, yields 4× the output power from the same supply rail and load impedance

(see equation 5).

(rms)

Power+

O(PP)

(5)

(rms)

O(PP)

2x V

O(PP)

–V

O(PP)

Figure 35. Bridge-Tied Load Configuration

In a typical computer sound channel operating at 5 V, bridging raises the power into an 8-Ω speaker from a

singled-ended (SE, ground reference) limit of 250 mW to 1 W. In sound power that is a 6-dB improvement, which

is loudness that can be heard. In addition to increased power there are frequency response concerns. Consider

the single-supply SE configuration shown in Figure 36. A coupling capacitor is required to block the dc offset

voltage from reaching the load. These capacitors can be quite large (approximately 33 µF to 1000 µF), so they

tend to be expensive, heavy, occupy valuable PCB area, and have the additional drawback of limiting

low-frequency performance of the system. This frequency limiting effect is due to the high-pass filter network

created with the speaker impedance and the coupling capacitance and is calculated with equation 6.

(c)

2pR

(6)

TPA6011A4

SLOS392 – FEBRUARY 2002

APPLICATION INFORMATION

bridged-tied load versus single-ended lode (continued)

For example, a 68-µF capacitor with an 8-Ω speaker would attenuate low frequencies below 293 Hz. The BTL

configuration cancels the dc offsets, which eliminates the need for the blocking capacitors. Low-frequency

performance is then limited only by the input network and speaker response. Cost and PCB space are also

minimized by eliminating the bulky coupling capacitor.

–3 dB

O(PP)

(C)

O(PP)

Figure 36. Single-Ended Configuration and Frequency Response

Increasing power to the load does carry a penalty of increased internal power dissipation. The increased

dissipation is understandable considering that the BTL configuration produces 4× the output power of the SE

configuration. Internal dissipation versus output power is discussed further in the crest factor and thermal

considerations section.

single-ended operation

In SE mode (see Figure 36), the load is driven from the primary amplifier output for each channel (OUT+).

The amplifier switches single-ended operation when the SE/BTL terminal is held high. This puts the negative

outputs in a high-impedance state, and effectively reduces the amplifier’s gain by 6 dB.

BTL amplifier efficiency

Class-AB amplifiers are inefficient. The primary cause of these inefficiencies is voltage drop across the output

stage transistors. There are two components of the internal voltage drop. One is the headroom or dc voltage

drop that varies inversely to output power. The second component is due to the sinewave nature of the output.

The total voltage drop can be calculated by subtracting the RMS value of the output voltage from V

. The

internal voltage drop multiplied by the RMS value of the supply current (I

rms) determines the internal power

dissipation of the amplifier.

An easy-to-use equation to calculate efficiency starts out as being equal to the ratio of power from the power

supply to the power delivered to the load. To accurately calculate the RMS and average values of power in the

load and in the amplifier, the current and voltage waveform shapes must first be understood (see Figure 37).

TPA6011A4

SLOS392 – FEBRUARY 2002

APPLICATION INFORMATION

BTL amplifier efficiency (continued)

(LRMS)

DD(avg)

Figure 37. Voltage and Current Waveforms for BTL Amplifiers

Although the voltages and currents for SE and BTL are sinusoidal in the load, currents from the supply are very

different between SE and BTL configurations. In an SE application the current waveform is a half-wave rectified

shape, whereas in BTL it is a full-wave rectified waveform. This means RMS conversion factors are different.

Keep in mind that for most of the waveform both the push and pull transistors are not on at the same time, which

supports the fact that each amplifier in the BTL device only draws current from the supply for half the waveform.

The following equations are the basis for calculating amplifier efficiency.

EfficiencyofaBTLamplifier+

Where:

SUP

(7)

rms

,andV

LRMS

,therefore,P

and

avg+

and

SUP

avg

Therefore,

SUP

[

cos(t)

]

sin(t)dt

substituting P

and P

SUP

into equation 7,

EfficiencyofaBTLamplifier+

Where:

Therefore,

BTL

= Peak voltage on BTL load

avg = Average current drawn from the power supply

= Power supply voltage

BTL

= Efficiency of a BTL amplifier

(8)

= Power delivered to load

SUP

= Power drawn from power supply

LRMS

= RMS voltage on BTL load

= Load resistance

TPA6011A4

SLOS392 – FEBRUARY 2002

APPLICATION INFORMATION

BTL amplifier efficiency (continued)

Table 5 employs equation 8 to calculate efficiencies for four different output power levels. Note that the efficiency

of the amplifier is quite low for lower power levels and rises sharply as power to the load is increased resulting

in a nearly flat internal power dissipation over the normal operating range. Note that the internal dissipation at

full output power is less than in the half power range. Calculating the efficiency for a specific system is the key

to proper power supply design. For a stereo 1-W audio system with 8-Ω loads and a 5-V supply, the maximum

draw on the power supply is almost 3.25 W.

Table 5. Efficiency vs Output Power in 5-V, 8-Ω BTL Systems

Output Power

(W)

0.25

0.50

1.00

1.25

Efficiency

(%)

31.4

44.4

62.8

70.2

Peak Voltage

(V)

2.00

2.83

4.00

4.47

†

Internal Dissipation

(W)

0.55

0.62

0.59

0.53

†

High peak voltages cause the THD to increase.

A final point to remember about Class-AB amplifiers (either SE or BTL) is how to manipulate the terms in the

efficiency equation to utmost advantage when possible. Note that in equation 8, V

is in the denominator. This

indicates that as V

goes down, efficiency goes up.

crest factor and thermal considerations

Class-AB power amplifiers dissipate a significant amount of heat in the package under normal operating

conditions. A typical music CD requires 12 dB to 15 dB of dynamic range, or headroom above the average power

output, to pass the loudest portions of the signal without distortion. In other words, music typically has a crest

factor between 12 dB and 15 dB. When determining the optimal ambient operating temperature, the internal

dissipated power at the average output power level must be used. From the TPA6011A4 data sheet, one can

see that when the TPA6011A4 is operating from a 5-V supply into a 3-Ω speaker, that 4-W peaks are available.

Use equation 9 to convert watts to dB.

+10Log

+6dB

ref

(9)

Subtracting the headroom restriction to obtain the average listening level without distortion yields:

6 dB – 15 dB = –9 dB (15-dB crest factor)

6 dB – 12 dB = –6 dB (12-dB crest factor)

6 dB – 9 dB = –3 dB (9-dB crest factor)

6 dB – 6 dB = 0 dB (6-dB crest factor)

6 dB – 3 dB = 3 dB (3-dB crest factor)

TPA6011A4

SLOS392 – FEBRUARY 2002

APPLICATION INFORMATION

crest factor and thermal considerations (continued)

To convert dB back into watts use equation 10.

+10

PdBń10

ref

= 63 mW (18-db crest factor)

= 125 mW (15-db crest factor)

= 250 mW (12-db crest factor)

= 500 mW (9-db crest factor)

= 1000 mW (6-db crest factor)

= 2000 mW (3-db crest factor)

This is valuable information to consider when attempting to estimate the heat dissipation requirements for the

amplifier system. Comparing the worst case, which is 2 W of continuous power output with a 3-dB crest factor,

against 12-dB and 15-dB applications significantly affects maximum ambient temperature ratings for the

system. Using the power dissipation curves for a 5-V, 3-Ω system, the internal dissipation in the TPA6011A4

and maximum ambient temperatures is shown in Table 6.

Table 6. TPA6011A4 Power Rating, 5-V, 3-Ω Stereo

PEAK OUTPUT POWER

(W)

AVERAGE OUTPUT POWER

2 W (3 dB)

1 W (6 dB)

500 mW (9 dB)

250 mW (12 dB)

125 mW (15 dB)

63 mW (18 dB)

POWER DISSIPATION

(W/Channel)

1.7

1.6

1.4

1.1

0.8

0.6

MAXIMUM AMBIENT

TEMPERATURE

–3°C

6°C

24°C

51°C

78°C

96°C

(10)

Table 7. TPA6011A4 Power Rating, 5-V, 8-Ω Stereo

PEAK OUTPUT POWER (W)

2.5

AVERAGE OUTPUT POWER

1250 mW (3-dB crest factor)

1000 mW (4-dB crest factor)

500 mW (7-dB crest factor)

250 mW (10-dB crest factor)

POWER DISSIPATION

(W/Channel)

0.55

0.62

0.59

0.53

MAXIMUM AMBIENT

TEMPERATURE

100°C

94°C

97°C

102°C

The maximum dissipated power (P

D(max)

) is reached at a much lower output power level for an 8-Ω load than

for a 3-Ω load. As a result, this simple formula for calculating P

D(max)

may be used for an 8-Ω application.

D(max)

(11)

However, in the case of a 3-Ω load, the P

D(max)

occurs at a point well above the normal operating power level.

The amplifier may therefore be operated at a higher ambient temperature than required by the P

D(max)

formula

for a 3-Ω load.

TPA6011A4

SLOS392 – FEBRUARY 2002

APPLICATION INFORMATION

crest factor and thermal considerations (continued)

The maximum ambient temperature depends on the heat-sinking ability of the PCB system. The derating factor

for the PWP package is shown in the dissipation rating table. Use equation 12 to convert this to Θ

JA.

0.022

DeratingFactor

+45

CńW

(12)

To calculate maximum ambient temperatures, first consider that the numbers from the dissipation graphs are

per channel, so the dissipated power needs to be doubled for two channel operation. Given Θ

, the maximum

allowable junction temperature, and the total internal dissipation, the maximum ambient temperature can be

calculated using equation 13. The maximum recommended junction temperature for the TPA6011A4 is 150°C.

The internal dissipation figures are taken from the Power Dissipation vs Output Power graphs.

Max+T

Max*

+150*45

(

0.6 2

)

+96

(

15-dBcrestfactor

)

NOTE:

Internal dissipation of 0.6 W is estimated for a 2-W system with 15-dB crest factor per channel.

(13)

Tables 6 and 7 show that some applications require no airflow to keep junction temperatures in the specified

range. The TPA6011A4 is designed with thermal protection that turns the device off when the junction

temperature surpasses 150°C to prevent damage to the IC. Table 6 and 7 were calculated for maximum listening

volume without distortion. When the output level is reduced the numbers in the table change significantly. Also,

using 8-Ω speakers increases the thermal performance by increasing amplifier efficiency.

TPA6011A4

SLOS392 – FEBRUARY 2002

MECHANICAL DATA

PWP (R-PDSO-G**)

20 PINS SHOWN

PowerPAD PLASTIC SMALL-OUTLINE

0,65

0,30

0,19

0,10

Thermal Pad

(See Note D)

4,50

4,30

6,60

6,20

0,15 NOM

Gage Plane

0°–ā8°

0,25

0,75

0,50

Seating Plane

1,20 MAX

0,15

0,05

PINS **

DIM

A MAX

A MIN

0,10

5,10

4,90

5,10

4,90

6,60

6,40

7,90

7,70

9,80

9,60

4073225/F 10/98

NOTES:A.

All linear dimensions are in millimeters.

This drawing is subject to change without notice.

Body dimensions do not include mold flash or protrusions.

The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane.

This pad is electrically and thermally connected to the backside of the die and possibly selected leads.

within JEDEC MO-153

PowerPADisatrademarkofTexasInstruments.

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,

enhancements, improvements, and other changes to its products and services at any time and to discontinue

any product or service without notice. Customers should obtain the latest relevant information before placing

orders and should verify that such information is current and complete. All products are sold subject to TI’s terms

and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its hardware products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI

deems necessary to support this warranty. Except where mandated by government requirements, testing of all

parameters of each product is not necessarily performed.

TI assumes no liability for applications assistance or customer product design. Customers are responsible for

their products and applications using TI components. To minimize the risks associated with customer products

and applications, customers should provide adequate design and operating safeguards.

TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,

in which TI products or services are used. Information published by TI regarding third–party products or services

does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.

Use of such information may require a license from a third party under the patents or other intellectual property

of the third party, or a license from TI under the patents or other intellectual property of TI.

Reproduction of information in TI data books or data sheets is permissible only if reproduction is without

alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction

of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for

such altered documentation.

Resale of TI products or services with statements different from or beyond the parameters stated by TI for that

product or service voids all express and any implied warranties for the associated TI product or service and

is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.

Mailing Address:

Texas Instruments

Post Office Box 655303

Dallas, Texas 75265