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S32G-VNP-GLDBOX 用户指南说明书

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2024年10月29日发(作者:闫骏伟)

NXP Semiconductors

User's Guide

Document Number: S32G-VNP-GLDBOXUG

Rev. 0 , 03/2021

S32G-VNP-GLDBOX User Guide

© 2021 NXP B.V.

Contents

1.

Get to know the S32G-VNP-GLDBOX………………………………………………………………………………………………………..4

1.1 S32G-VNP-GLDBOX Reference Design Overview ................................................................................................................................ 4

1.2 S32G-VNP-GLDBOX Block Diagram ..................................................................................................................................................... 5

1.3 S32G-VNP-GLDBOX Hardware Resources ............................................................................................................................................ 5

S32G-VNP-GLDBOX Hardware Packages……………………………………………………………………………………………………7

2.1 Hardware Package Overview .................................................................................................................................................................... 7

2.2 Hardware Connection Instruction ............................................................................................................................................................. 7

S32G-VNP-GLDBOX Switch Setting………………………………………………………………………………………………………….8

3.1 Default Switch Setting .............................................................................................................................................................................. 8

3.2 Switch Setting for Power Selection .......................................................................................................................................................... 8

3.3 Switch Setting for SD card Boot ............................................................................................................................................................... 9

3.4 Switch Setting for eMMC Boot ................................................................................................................................................................ 9

3.5 Switch Setting for NOR Flash Boot ........................................................................................................................................................ 10

3.6 Switch Setting for Serial Boot ................................................................................................................................................................ 10

S32G-VNP-GLDBOX Connectors……………………………………………………………………………………………………………11

4.1 Connectors Overview ............................................................................................................................................................................. 11

4.2 Specific Connector Instruction ............................................................................................................................................................... 13

S32G-VNP-GLDBOX Set Up………………………………………………………………………………………………………………...14

Appendix A……………………………………………………………………………………………………………………………………16

2.

3.

4.

5.

6.

S32G-VNP-GLDBOX User Guide, Rev. 0, 03/2021

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NXP Semiconductors

1. Get to know the S32G-VNP-GLDBOX

1.1 S32G-VNP-GLDBOX Reference Design Overview

The S32G-VNP-GLDBOX (GoldBox) is a compact, highly-optimized and integrated reference design

board with enclosure featuring the S32G Vehicle Network Processor. This board can provide reference

for a variety of typical automotive applications such as:

• Service-oriented gateway, vehicle compute nodes

• Domain controller, safety controller

• Vehicle black-box

• FOTA

Figure 1.1 shows the S32G-VNP-GLDBOX.

12V Power

Jack

ADC&LIN

&GPIO

CAN&FlexRay

UART1UART0USB

POR_B

RESET_B

Power Switch

SD Card Slot

CAN

Transceiver

eMMC(32GB)

LPDDR4(4GB)

S32G274A

Processor

NOR Flash

(64MB)

PCIe X1 Socket

SJA1110A

VR5510

AURORA

M.2 M-key Slot

M.2 E-key Slot

20-pin JTAG

100BASE-T1

x6

1000BASE-T

x1

100BASE-TX1000BASE-T

1000BASE-T

x2

x1 x2

Figure 1.1 S32G-VNP-GLDBOX

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1.2 S32G-VNP-GLDBOX Block Diagram

Figure 1.2 shows the block diagram of the S32G-VNP-GLDBOX.

Figure 1.2 S32G-VNP-GLDBOX block diagram

1.3 S32G-VNP-GLDBOX Hardware Resources

The resources of the GoldBox are listed as below:

• Processor

➢ Four Arm Cortex-A53 cores (with optional cluster lockstep)

➢ Three, dual-core lockstep Arm Cortex-M7 cores

➢ Hardware Security Engine (HSE) supports SHE/EVITA

➢ CAN, LIN and FlexRay offload with Low Latency Communications Engine (LLCE)

➢ Gigabit Ethernet Packet Forwarding Engine (PFE)

➢ 8 MB Embedded System RAM with ECC

➢ 32KB Standby RAM with ECC

• External Storage

➢ 1 x NOR Flash (64MB)

➢ 1 x SD card slot

➢ 1 x eMMC (32GB)

➢ 1 x LPDDR4 (4GB)

• Ethernet—12ports

S32G-VNP-GLDBOX User Guide, Rev. 0, 03/2021

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➢ 1 x 100BASE-TX

➢ 6 x 100BASE-T1

➢ 5 x 1000BASE-T

PCIe

➢ 1 x M.2 M-key slot*

➢ 1 x M.2 E-key slot*

➢ 1 x PCIe X1 socket

LIN

➢ 4 x LLCE LIN

➢ 1 x LINFlexD

CAN/CAN FD

➢ 16 x LLCE CAN/CAN FD

➢ 2 x FlexCAN /CAN FD

FlexRay

➢ 1 x LLCE FlexRay

USB

➢ 1 x USB 2.0 port as host/device mode

Scalable interface

➢ 1 x DSPI

➢ 5 x ADC

➢ 1 x I2C

RTC

➢ Support for external RTC

Debug and Trace

➢ 1 x 20-pin JTAG for S32G

➢ 1 x 10-pin JTAG for SJA1110A

➢ 1 x Aurora Trace

➢ 2 x UART

Only one of the M.2 M-key slot and E-key slot can be used at a time.

Note

S32G-VNP-GLDBOX User Guide, Rev. 0, 03/2021

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NXP Semiconductors

2. S32G-VNP-GLDBOX Hardware Packages

2.1 Hardware Package Overview

The following section describes the hardware package overview of S32G-VNP-GLDBOX. Hardware and

accessories are needed as shown in the figure 2.1.

Universal AdaptorAC/DC 12V Power

Supply

UART0 UART1

Cable

Thermal Pad and

Screw

SD CardHeatsink

DuPont LineEthernet Loop-Back

Cable

Ethernet Cable

J53 Cable

(100BASE-T1)

J5 Cable

(LIN, ADC)

J6 Cable

(CAN, FlexRay)

Figure 2.1 S32G-VNP-GLDBOX hardware and accessories

2.2 Hardware Connection Instruction

To connect any cable to the GoldBox, follow the instructions shown in figure 2.2.

UART cable connection

J6 cable connection (LLCE CAN, FlexCAN, FlexRay)

J5 cable connection(LLCE LIN, LINFlexD, ADC)

J53 cable connection(100BASE-T1)

P5, P4, P3, P2 cable connection(1000GBASE-T, 100BASE-TX, 1000BASE-T)

Figure 2.2 S32G-VNP-GLDBOX hardware connection instruction

S32G-VNP-GLDBOX User Guide, Rev. 0, 03/2021

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3. S32G-VNP-GLDBOX Switch Setting

3.1 Default Switch Setting

Figure 3.1 shows the default switch setting of the S32G-VNP-GLDBOX.

1st-ON

ALL-OFF

2nd-OFF

ON

1st-ON

2nd-OFF

OFFONON

SW3

SW7

SW9SW10

SW3

SW12SW11SW8SW17

SW6

SW11

SW5

SW17

SW4

SW9SW10

SW8

SW12

SW4

6th-OFF

7th-ON

OTHERS-OFF

SW5

ALL-OFF

SW6

ALL-OFF

SW7

ALL-OFF

Figure 3.1 Default switch setting

3.2 Switch Setting for Power Selection

Figure 3.2 shows the switch setting for power selection.

When power jack(J176 port)

has connected a external 12V

power supply, GoldBox will

power up.

SW15

GoldBox will power off

SW15

When pin 2 of J5 port has

connected a external 12V power

supply, GoldBox will power up.

SW15

Figure 3.2

Power selection

switch setting

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3.3 Switch Setting for SD card Boot

Figure 3.3 shows the switch setting for SD card boot.

ALL-OFF

1st-ON

2nd-OFF

ON

SW3

SW7

SW9

SW6

SW5

SW10

Compare with default setting, no change

needed

SW3

SW4

SW9SW10

SW4

6th-OFF

7th-ON

OTHERS-OFF

SW5

ALL-OFF

SW6

ALL-OFF

SW7

ALL-OFF

Figure 3.3 SD card boot switch setting

3.4 Switch Setting for eMMC Boot

Figure 3.4 shows the switch setting for eMMC boot.

ALL-OFF

1st-ON

2nd-OFF

OFF

SW3

SW7

SW9

SW6

SW5

SW4

SW9SW10

SW10

Compare with default setting, the SW3 and the

6th of SW4 need to be changed

SW3

SW4

6th-ON

7th-ON

OTHERS-OFF

SW5

ALL-OFF

SW6

ALL-OFF

SW7

ALL-OFF

Figure 3.4 eMMC boot switch setting

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3.5 Switch Setting for NOR Flash Boot

Figure 3.5 shows the switch setting for NOR Flash boot.

ALL-OFF

1st-ON

2nd-OFF

SW3

SW7

SW9

SW6

SW5

SW10

Compare with default setting, the 7th of SW4

need to be changed

SW4

SW9

SW10

SW4

6th-OFF

7th-OFF

OTHERS-OFF

SW5

ALL-OFF

SW6

ALL-OFF

SW7

ALL-OFF

Figure 3.5 NOR Flash boot switch setting

3.6 Switch Setting for Serial Boot

Figure 3.6 shows the switch setting for serial boot.

ALL-OFF

1st-OFF

2nd-OFF

SW9

SW9SW10

SW10

Compare with default setting, the 1st of SW10

need to be changed

Figure 3.6 Serial boot switch setting

S32G-VNP-GLDBOX User Guide, Rev. 0, 03/2021

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4. S32G-VNP-GLDBOX Connectors

4.1 Connectors Overview

Figure 4.1 shows the part of important connectors of the S32G-VNP-GLDBOX.

J176

J5J6

J1J2J4

J3

P1

J184

J57

J44

J47

J48

J180

J56

J53

P5

P4

P3P2

Figure 4.1 S32G-VNP-GLDBOX connectors

S32G-VNP-GLDBOX User Guide, Rev. 0, 03/2021

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Table 4.1 shows the connectors of the S32G-VNP-GLDBOX and their corresponding signals.

Table 4.1 The connectors of the S32G-VNP-GLDBOX

Connector

J1

J2

J3

J4

J5

J6

J44

J47

J48

J53

J56

J57

J176

J184

P1

P2

P3

P4

P5

Signals

UART1

UART0

SD card slot

USB Micro_AB

LLCE LIN, LINFlexD, ADC, DSPI, I2C, 12V Power In, 12V/5V/3.3V Power Out

LLCE CAN, FlexCAN, LLCE FlexRay

10-pin JTAG for SJA1110

M.2 M-key Slot

20-pin JTAG for S32G

100BASE-T1(SJA1110A Port5, 6, 7, 8, 9, 10)

M.2 E-key Slot

Aurora Trace

12V Power Jack

1-2(Default): VR5510 in debug mode

PCIe X1 Socket

1000BASE-T(SJA1110A Port2, Port3)

1000BASE-T (GMAC0), 1000BASE-T (PFE_MAC2)

100BASE-TX(SJA1110A Port1)

1000BASE-T(PFE_MAC1)

S32G-VNP-GLDBOX User Guide, Rev. 0, 03/2021

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4.2 Specific Connector Instruction

Figure 4.2 shows the

LLCE CAN, FlexCAN, LLCE FlexRay, ADC, LINFlexD and LLCE LIN

connectors.

40

J6

USBUART0UART1

2

26

J5

2

391

25

1

J6

Figure 4.3 shows the Ethernet connectors.

J5

Figure 4.2 FlexRay&CAN&LIN&ADC Connections

P3B

1

J53

10

P2B

P5

100BASE-T1 TRX10 (SJA1110A Port 10*)

100BASE-T1 TRX9 (SJA1110A Port 9*)

100BASE-T1 TRX8 (SJA1110A Port 8*)

100BASE-T1 TRX7 (SJA1110A Port 7*)

100BASE-T1 TRX6 (SJA1110A Port 6*)

100BASE-T1 TRX5 (SJA1110A Port 5*)

P4

P3A

P2A

Part NumberPinout

P51000BASE-T (PFE_MAC1)

P4100BASE-TX (SJA1110A Port 1*)

P3A1000BASE-T (GMAC0)

P3B1000BASE-T (PFE_MAC2)

P2A1000BASE-T (SJA1110A Port 2*)

P2B1000BASE-T (SJA1110A Port 3*)

*: In GoldBox, PFE_MAC0 connect to the port 4 of Ethernet switch, SJA1110A. Please refer to Figure 1.1 to get know the detailed connection.

Figure 4.3 Ethernet Connections

S32G-VNP-GLDBOX User Guide, Rev. 0, 03/2021

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13

5. S32G-VNP-GLDBOX Set Up

Following steps show how to run Linux BSP on CortexA53 core:

1.

Download and install the terminal emulator, if not installed already. About the terminal tool, you can

choose any one which is familiar to you, such as Tera Term, Putty and so on.

2.

Download and install the FT232R USB-to-UART driver, if not installed already. Go to FT232R

USB-to-UART driver link .Scroll down and select correct version. Follow the installation guides to

install the driver.

3.

Set S32G-VNP-GLDBOX in SD card boot mode(refer to the Figure 3.2).

4.

Plug the SD card in J3 slot. The SD card has pre-loaded Linux BSP image which runs on CortexA53

cores.

5.

Connect the UART0 port(J2) of board and PC by UART cable. Then open serial terminal and

configure COM port in PC. Select the corresponding COM port which can be found in “Device

Manager” of the PC and set 115200 as the baud rate. The configuration result is shown in the figure

5.1.

Figure 5.1 COM port configuration

6.

Connect power supply though J176 port described in Table 4.1. Open the power switch(refer to

figure 3.2), the running logs will appear in the console as shown in Figure 5.2.

For other boot mode, building project, making image and so on, refer to S32G-VNP-GLDBOX

Reference Manual and S32G-VNP-GLDBOX Software Enablement Guide.

Note

S32G-VNP-GLDBOX User Guide, Rev. 0, 03/2021

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NXP Semiconductors

…………

[ 5.414637] mdio_bus PFEng Ethernet 2: MDIO device at

address 2 is missing.

[ 5.481480] loading NXP PHY driver: [autonomous mode]

[ 5.578156] sja1105pqrs spi1.0: Loading SJA1105P SPI driver

[ 5.583510] sja1105pqrs spi1.0: Detected device id is invalid: ffffffff

[ 5.590005] sja1105pqrs spi1.0: SJA1105P SPI Failed to read Device Id

[ 5.612947] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null)

Fri Aug 28 01:21:01 UTC 2020

[ 5.897075] urandom_read: 3 callbacks suppressed

[ 5.897084] random: dd: uninitialized urandom read (512 bytes read)

INIT: Entering runlevel: 5

Configuring ifup: don't have all variables for eth0/inet

Starting syslogd/klogd: done

Starting random number generator daemon[ 6.098288] random: rngd:

uninitialized urandom read (4 bytes read)

[ 6.104307] random: rngd: uninitialized urandom read (4 bytes read)

.

[ 6.111860] random: crng init done

[ 6.115160] random: 1 urandom warning(s) missed due to ratelimiting

Starting OpenBSD Secure Shell server: sshd

done.

Auto Linux BSP 1.0 s32g274ardb /dev/ttyLF0

s32g274ardb login:

Figure 5.2 Running logs of Linux BSP

When see the console as shown in the Figure 5.2, it means that the Linux BSP runs successfully.

Please input “root” to log in system. And if need to run the M7 project, please refer to the S32G-VNP-

GLDBOX Software Enablement Guide.

S32G-VNP-GLDBOX User Guide, Rev. 0, 03/2021

NXP Semiconductors

15

6. Appendix A

Documents

— S32G Data Sheet

— S32G Reference Manual

— GoldBox Fact sheet

— S32G-VNP-GLDBOX Reference Manual

— S32G-VNP-GLDBOX Software Enablement Guide

— Auto_Linux_BSP_XX.X_S32G274A_User_Manual

— Auto_Linux_BSP_XX.X_S32G274A_Quick_Start

Useful links

— S32 Design Studio

— S32 Debug Probe

Support /

Enablement Tools

— IDE: S32 Design Studio, Yocto , EB tresos

TM

— Software: Linux BSP, FreeRTOS

TM

, Real-Time Drivers(RTD)

— Compiler: Green Hills, gcc

— Debugger: Lauterbach, S32G Debug Probe

, Rev. 0, 03/2021

16

NXP Semiconductors

How To Reach Us

Home Page:

Web Support:

/support

Information in this document is provided solely to enable system and software implementers

to use NXP products. There are no express or implied copyright licenses granted hereunder

to design or fabricate any integrated circuits based on the information in this document. NXP

reserves the right to make changes without further notice to any products herein.

NXP makes no warranty, representation, or guarantee regarding the suitability of its products

for any particular purpose, nor does NXP assume any liability arising out of the application

or use of any product or circuit, and specifically disclaims any and all liability, including

without limitation consequential or incidental damages. “Typical” parameters that may be

provided in NXP data sheets and/or specifications can and do vary in different applications,

and actual performance may vary over time. All operating parameters, including “typicals,”

must be validated for each customer application by customer's technical experts. NXP does

not convey any license under its patent rights nor the rights of others. NXP sells products

pursuant to standard terms and conditions of sale, which can be found at the following address:

/SalesTermsandConditions.

While NXP has implemented advanced security features, all products may be subject to

unidentified vulnerabilities. Customers are responsible for the design and operation of their

applications and products to reduce the effect of these vulnerabilities on customer’s applications

and products, and NXP accepts no liability for any vulnerability that is discovered. Customers

should implement appropriate design and operating safeguards to minimize the risks associated

with their applications and products.

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TRENCHMOS, UCODE, Freescale, the Freescale logo, AltiVec, C‑5, CodeTEST, CodeWarrior,

ColdFire, ColdFire+, C‑Ware, the Energy Efficient Solutions logo, Kinetis, Layerscape, MagniV,

mobileGT, PEG, PowerQUICC, Processor Expert, QorIQ, QorIQ Qonverge, Ready Play,

SafeAssure, the SafeAssure logo, StarCore, Symphony, VortiQa, Vybrid, Airfast, BeeKit,

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TurboLink, and UMEMS are trademarks of NXP B.V. All other product or service names

are the property of their respective owners. AMBA, Arm, Arm7, Arm7TDMI, Arm9, Arm11,

Artisan, , Cordio, CoreLink, CoreSight, Cortex, DesignStart, DynamIQ, Jazelle, Keil,

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ULINK, ULINK2, ULINK-ME, ULINK-PLUS, ULINKpro, µVision, Versatile are trademarks or

registered trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere. The related

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rights reserved. Oracle and Java are registered trademarks of Oracle and/or its affiliates. The

Power Architecture and word marks and the Power and logos and related

marks are trademarks and service marks licensed by .

©

NXP B.V. rights reserved.

For more information, please visit:

Forsalesofficeaddresses,pleasesendanemailto:**********************

Date of release: March, 2021

Document identifier: S32G-VNP-GLDBOXUG

2024年10月29日发(作者:闫骏伟)

NXP Semiconductors

User's Guide

Document Number: S32G-VNP-GLDBOXUG

Rev. 0 , 03/2021

S32G-VNP-GLDBOX User Guide

© 2021 NXP B.V.

Contents

1.

Get to know the S32G-VNP-GLDBOX………………………………………………………………………………………………………..4

1.1 S32G-VNP-GLDBOX Reference Design Overview ................................................................................................................................ 4

1.2 S32G-VNP-GLDBOX Block Diagram ..................................................................................................................................................... 5

1.3 S32G-VNP-GLDBOX Hardware Resources ............................................................................................................................................ 5

S32G-VNP-GLDBOX Hardware Packages……………………………………………………………………………………………………7

2.1 Hardware Package Overview .................................................................................................................................................................... 7

2.2 Hardware Connection Instruction ............................................................................................................................................................. 7

S32G-VNP-GLDBOX Switch Setting………………………………………………………………………………………………………….8

3.1 Default Switch Setting .............................................................................................................................................................................. 8

3.2 Switch Setting for Power Selection .......................................................................................................................................................... 8

3.3 Switch Setting for SD card Boot ............................................................................................................................................................... 9

3.4 Switch Setting for eMMC Boot ................................................................................................................................................................ 9

3.5 Switch Setting for NOR Flash Boot ........................................................................................................................................................ 10

3.6 Switch Setting for Serial Boot ................................................................................................................................................................ 10

S32G-VNP-GLDBOX Connectors……………………………………………………………………………………………………………11

4.1 Connectors Overview ............................................................................................................................................................................. 11

4.2 Specific Connector Instruction ............................................................................................................................................................... 13

S32G-VNP-GLDBOX Set Up………………………………………………………………………………………………………………...14

Appendix A……………………………………………………………………………………………………………………………………16

2.

3.

4.

5.

6.

S32G-VNP-GLDBOX User Guide, Rev. 0, 03/2021

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NXP Semiconductors

1. Get to know the S32G-VNP-GLDBOX

1.1 S32G-VNP-GLDBOX Reference Design Overview

The S32G-VNP-GLDBOX (GoldBox) is a compact, highly-optimized and integrated reference design

board with enclosure featuring the S32G Vehicle Network Processor. This board can provide reference

for a variety of typical automotive applications such as:

• Service-oriented gateway, vehicle compute nodes

• Domain controller, safety controller

• Vehicle black-box

• FOTA

Figure 1.1 shows the S32G-VNP-GLDBOX.

12V Power

Jack

ADC&LIN

&GPIO

CAN&FlexRay

UART1UART0USB

POR_B

RESET_B

Power Switch

SD Card Slot

CAN

Transceiver

eMMC(32GB)

LPDDR4(4GB)

S32G274A

Processor

NOR Flash

(64MB)

PCIe X1 Socket

SJA1110A

VR5510

AURORA

M.2 M-key Slot

M.2 E-key Slot

20-pin JTAG

100BASE-T1

x6

1000BASE-T

x1

100BASE-TX1000BASE-T

1000BASE-T

x2

x1 x2

Figure 1.1 S32G-VNP-GLDBOX

S32G-VNP-GLDBOX User Guide, Rev. 0, 03/2021

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1.2 S32G-VNP-GLDBOX Block Diagram

Figure 1.2 shows the block diagram of the S32G-VNP-GLDBOX.

Figure 1.2 S32G-VNP-GLDBOX block diagram

1.3 S32G-VNP-GLDBOX Hardware Resources

The resources of the GoldBox are listed as below:

• Processor

➢ Four Arm Cortex-A53 cores (with optional cluster lockstep)

➢ Three, dual-core lockstep Arm Cortex-M7 cores

➢ Hardware Security Engine (HSE) supports SHE/EVITA

➢ CAN, LIN and FlexRay offload with Low Latency Communications Engine (LLCE)

➢ Gigabit Ethernet Packet Forwarding Engine (PFE)

➢ 8 MB Embedded System RAM with ECC

➢ 32KB Standby RAM with ECC

• External Storage

➢ 1 x NOR Flash (64MB)

➢ 1 x SD card slot

➢ 1 x eMMC (32GB)

➢ 1 x LPDDR4 (4GB)

• Ethernet—12ports

S32G-VNP-GLDBOX User Guide, Rev. 0, 03/2021

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5

➢ 1 x 100BASE-TX

➢ 6 x 100BASE-T1

➢ 5 x 1000BASE-T

PCIe

➢ 1 x M.2 M-key slot*

➢ 1 x M.2 E-key slot*

➢ 1 x PCIe X1 socket

LIN

➢ 4 x LLCE LIN

➢ 1 x LINFlexD

CAN/CAN FD

➢ 16 x LLCE CAN/CAN FD

➢ 2 x FlexCAN /CAN FD

FlexRay

➢ 1 x LLCE FlexRay

USB

➢ 1 x USB 2.0 port as host/device mode

Scalable interface

➢ 1 x DSPI

➢ 5 x ADC

➢ 1 x I2C

RTC

➢ Support for external RTC

Debug and Trace

➢ 1 x 20-pin JTAG for S32G

➢ 1 x 10-pin JTAG for SJA1110A

➢ 1 x Aurora Trace

➢ 2 x UART

Only one of the M.2 M-key slot and E-key slot can be used at a time.

Note

S32G-VNP-GLDBOX User Guide, Rev. 0, 03/2021

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NXP Semiconductors

2. S32G-VNP-GLDBOX Hardware Packages

2.1 Hardware Package Overview

The following section describes the hardware package overview of S32G-VNP-GLDBOX. Hardware and

accessories are needed as shown in the figure 2.1.

Universal AdaptorAC/DC 12V Power

Supply

UART0 UART1

Cable

Thermal Pad and

Screw

SD CardHeatsink

DuPont LineEthernet Loop-Back

Cable

Ethernet Cable

J53 Cable

(100BASE-T1)

J5 Cable

(LIN, ADC)

J6 Cable

(CAN, FlexRay)

Figure 2.1 S32G-VNP-GLDBOX hardware and accessories

2.2 Hardware Connection Instruction

To connect any cable to the GoldBox, follow the instructions shown in figure 2.2.

UART cable connection

J6 cable connection (LLCE CAN, FlexCAN, FlexRay)

J5 cable connection(LLCE LIN, LINFlexD, ADC)

J53 cable connection(100BASE-T1)

P5, P4, P3, P2 cable connection(1000GBASE-T, 100BASE-TX, 1000BASE-T)

Figure 2.2 S32G-VNP-GLDBOX hardware connection instruction

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3. S32G-VNP-GLDBOX Switch Setting

3.1 Default Switch Setting

Figure 3.1 shows the default switch setting of the S32G-VNP-GLDBOX.

1st-ON

ALL-OFF

2nd-OFF

ON

1st-ON

2nd-OFF

OFFONON

SW3

SW7

SW9SW10

SW3

SW12SW11SW8SW17

SW6

SW11

SW5

SW17

SW4

SW9SW10

SW8

SW12

SW4

6th-OFF

7th-ON

OTHERS-OFF

SW5

ALL-OFF

SW6

ALL-OFF

SW7

ALL-OFF

Figure 3.1 Default switch setting

3.2 Switch Setting for Power Selection

Figure 3.2 shows the switch setting for power selection.

When power jack(J176 port)

has connected a external 12V

power supply, GoldBox will

power up.

SW15

GoldBox will power off

SW15

When pin 2 of J5 port has

connected a external 12V power

supply, GoldBox will power up.

SW15

Figure 3.2

Power selection

switch setting

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3.3 Switch Setting for SD card Boot

Figure 3.3 shows the switch setting for SD card boot.

ALL-OFF

1st-ON

2nd-OFF

ON

SW3

SW7

SW9

SW6

SW5

SW10

Compare with default setting, no change

needed

SW3

SW4

SW9SW10

SW4

6th-OFF

7th-ON

OTHERS-OFF

SW5

ALL-OFF

SW6

ALL-OFF

SW7

ALL-OFF

Figure 3.3 SD card boot switch setting

3.4 Switch Setting for eMMC Boot

Figure 3.4 shows the switch setting for eMMC boot.

ALL-OFF

1st-ON

2nd-OFF

OFF

SW3

SW7

SW9

SW6

SW5

SW4

SW9SW10

SW10

Compare with default setting, the SW3 and the

6th of SW4 need to be changed

SW3

SW4

6th-ON

7th-ON

OTHERS-OFF

SW5

ALL-OFF

SW6

ALL-OFF

SW7

ALL-OFF

Figure 3.4 eMMC boot switch setting

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3.5 Switch Setting for NOR Flash Boot

Figure 3.5 shows the switch setting for NOR Flash boot.

ALL-OFF

1st-ON

2nd-OFF

SW3

SW7

SW9

SW6

SW5

SW10

Compare with default setting, the 7th of SW4

need to be changed

SW4

SW9

SW10

SW4

6th-OFF

7th-OFF

OTHERS-OFF

SW5

ALL-OFF

SW6

ALL-OFF

SW7

ALL-OFF

Figure 3.5 NOR Flash boot switch setting

3.6 Switch Setting for Serial Boot

Figure 3.6 shows the switch setting for serial boot.

ALL-OFF

1st-OFF

2nd-OFF

SW9

SW9SW10

SW10

Compare with default setting, the 1st of SW10

need to be changed

Figure 3.6 Serial boot switch setting

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4. S32G-VNP-GLDBOX Connectors

4.1 Connectors Overview

Figure 4.1 shows the part of important connectors of the S32G-VNP-GLDBOX.

J176

J5J6

J1J2J4

J3

P1

J184

J57

J44

J47

J48

J180

J56

J53

P5

P4

P3P2

Figure 4.1 S32G-VNP-GLDBOX connectors

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11

Table 4.1 shows the connectors of the S32G-VNP-GLDBOX and their corresponding signals.

Table 4.1 The connectors of the S32G-VNP-GLDBOX

Connector

J1

J2

J3

J4

J5

J6

J44

J47

J48

J53

J56

J57

J176

J184

P1

P2

P3

P4

P5

Signals

UART1

UART0

SD card slot

USB Micro_AB

LLCE LIN, LINFlexD, ADC, DSPI, I2C, 12V Power In, 12V/5V/3.3V Power Out

LLCE CAN, FlexCAN, LLCE FlexRay

10-pin JTAG for SJA1110

M.2 M-key Slot

20-pin JTAG for S32G

100BASE-T1(SJA1110A Port5, 6, 7, 8, 9, 10)

M.2 E-key Slot

Aurora Trace

12V Power Jack

1-2(Default): VR5510 in debug mode

PCIe X1 Socket

1000BASE-T(SJA1110A Port2, Port3)

1000BASE-T (GMAC0), 1000BASE-T (PFE_MAC2)

100BASE-TX(SJA1110A Port1)

1000BASE-T(PFE_MAC1)

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4.2 Specific Connector Instruction

Figure 4.2 shows the

LLCE CAN, FlexCAN, LLCE FlexRay, ADC, LINFlexD and LLCE LIN

connectors.

40

J6

USBUART0UART1

2

26

J5

2

391

25

1

J6

Figure 4.3 shows the Ethernet connectors.

J5

Figure 4.2 FlexRay&CAN&LIN&ADC Connections

P3B

1

J53

10

P2B

P5

100BASE-T1 TRX10 (SJA1110A Port 10*)

100BASE-T1 TRX9 (SJA1110A Port 9*)

100BASE-T1 TRX8 (SJA1110A Port 8*)

100BASE-T1 TRX7 (SJA1110A Port 7*)

100BASE-T1 TRX6 (SJA1110A Port 6*)

100BASE-T1 TRX5 (SJA1110A Port 5*)

P4

P3A

P2A

Part NumberPinout

P51000BASE-T (PFE_MAC1)

P4100BASE-TX (SJA1110A Port 1*)

P3A1000BASE-T (GMAC0)

P3B1000BASE-T (PFE_MAC2)

P2A1000BASE-T (SJA1110A Port 2*)

P2B1000BASE-T (SJA1110A Port 3*)

*: In GoldBox, PFE_MAC0 connect to the port 4 of Ethernet switch, SJA1110A. Please refer to Figure 1.1 to get know the detailed connection.

Figure 4.3 Ethernet Connections

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5. S32G-VNP-GLDBOX Set Up

Following steps show how to run Linux BSP on CortexA53 core:

1.

Download and install the terminal emulator, if not installed already. About the terminal tool, you can

choose any one which is familiar to you, such as Tera Term, Putty and so on.

2.

Download and install the FT232R USB-to-UART driver, if not installed already. Go to FT232R

USB-to-UART driver link .Scroll down and select correct version. Follow the installation guides to

install the driver.

3.

Set S32G-VNP-GLDBOX in SD card boot mode(refer to the Figure 3.2).

4.

Plug the SD card in J3 slot. The SD card has pre-loaded Linux BSP image which runs on CortexA53

cores.

5.

Connect the UART0 port(J2) of board and PC by UART cable. Then open serial terminal and

configure COM port in PC. Select the corresponding COM port which can be found in “Device

Manager” of the PC and set 115200 as the baud rate. The configuration result is shown in the figure

5.1.

Figure 5.1 COM port configuration

6.

Connect power supply though J176 port described in Table 4.1. Open the power switch(refer to

figure 3.2), the running logs will appear in the console as shown in Figure 5.2.

For other boot mode, building project, making image and so on, refer to S32G-VNP-GLDBOX

Reference Manual and S32G-VNP-GLDBOX Software Enablement Guide.

Note

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NXP Semiconductors

…………

[ 5.414637] mdio_bus PFEng Ethernet 2: MDIO device at

address 2 is missing.

[ 5.481480] loading NXP PHY driver: [autonomous mode]

[ 5.578156] sja1105pqrs spi1.0: Loading SJA1105P SPI driver

[ 5.583510] sja1105pqrs spi1.0: Detected device id is invalid: ffffffff

[ 5.590005] sja1105pqrs spi1.0: SJA1105P SPI Failed to read Device Id

[ 5.612947] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null)

Fri Aug 28 01:21:01 UTC 2020

[ 5.897075] urandom_read: 3 callbacks suppressed

[ 5.897084] random: dd: uninitialized urandom read (512 bytes read)

INIT: Entering runlevel: 5

Configuring ifup: don't have all variables for eth0/inet

Starting syslogd/klogd: done

Starting random number generator daemon[ 6.098288] random: rngd:

uninitialized urandom read (4 bytes read)

[ 6.104307] random: rngd: uninitialized urandom read (4 bytes read)

.

[ 6.111860] random: crng init done

[ 6.115160] random: 1 urandom warning(s) missed due to ratelimiting

Starting OpenBSD Secure Shell server: sshd

done.

Auto Linux BSP 1.0 s32g274ardb /dev/ttyLF0

s32g274ardb login:

Figure 5.2 Running logs of Linux BSP

When see the console as shown in the Figure 5.2, it means that the Linux BSP runs successfully.

Please input “root” to log in system. And if need to run the M7 project, please refer to the S32G-VNP-

GLDBOX Software Enablement Guide.

S32G-VNP-GLDBOX User Guide, Rev. 0, 03/2021

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15

6. Appendix A

Documents

— S32G Data Sheet

— S32G Reference Manual

— GoldBox Fact sheet

— S32G-VNP-GLDBOX Reference Manual

— S32G-VNP-GLDBOX Software Enablement Guide

— Auto_Linux_BSP_XX.X_S32G274A_User_Manual

— Auto_Linux_BSP_XX.X_S32G274A_Quick_Start

Useful links

— S32 Design Studio

— S32 Debug Probe

Support /

Enablement Tools

— IDE: S32 Design Studio, Yocto , EB tresos

TM

— Software: Linux BSP, FreeRTOS

TM

, Real-Time Drivers(RTD)

— Compiler: Green Hills, gcc

— Debugger: Lauterbach, S32G Debug Probe

, Rev. 0, 03/2021

16

NXP Semiconductors

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Home Page:

Web Support:

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for any particular purpose, nor does NXP assume any liability arising out of the application

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Date of release: March, 2021

Document identifier: S32G-VNP-GLDBOXUG

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