2024年10月30日发(作者:利斯乔)
. . . . . . . . . . . . . . . 6
3Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.2Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.3Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.4Electrical characteristic curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4Application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.1SVR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.2Input stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.3Standby and muting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.4DC offset detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.5Heatsink definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5Package information . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . 15 6Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2/18
TDA7850List of tables List of tables
Table summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table te maximum
ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table l data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table ical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8 Table nt revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3/18
List of figures TDA7850 List of figures
Figure diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure rd test and
application circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure connection (top view) . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure /doc/
ponents and top copper layer of the Figure2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure copper layer Figure2. . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure ent current vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . 11 Figure power vs. supply voltage (R L = 4Ω) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure
power vs. supply voltage (R L = 2Ω) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure tion vs. output
power (R L = 4Ω). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure tion vs. output power (R L = 2Ω). . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure tion vs. frequency (R L = 4Ω) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . 11 Figure tion vs. frequency (R L = 2Ω) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure
alk vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure voltage rejection
vs. frequency. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure attenuation vs. supply voltage. . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure dissipation and efficiency vs. output power (R L = 4Ω, SINE) . . . . . . . . . . . .
. . . . . 12 Figure dissipation and efficiency vs. output power (R L = 2Ω, SINE) . . . . . . . . . . . . . . . . . 12 Figure
dissipation vs. output power (R L = 4Ω, audio program simulation). . . . . . . . . . . . . 13 Figure dissipation
vs. output power (R L = 2Ω, audio program simulation). . . . . . . . . . . . . 13 Figure R-ARM frequency response,
weighting filter for transient pop. . . . . . . . . . . . . . . . . . . 13 Figure att25 (vertical) mechanical data and package
dimensions. . . . . . . . . . . . . . . . . . . . 15 Figure att25 (horizontal) mechanical data and package dimensions. . . . . . . . .
. . . . . . . . . 16 4/18
TDA7850Block diagram and application circuit
5/18
1 Block diagram and application circuit
1.1 Block diagram
1.2 Standard test and application circuit
Pin description TDA7850
6/18
2 Pin description
TDA7850Electrical specifications
7/18
3 Electrical specifications
3.1
Absolute maximum ratings
3.2 Thermal data
Table 2.
Absolute maximum ratings
Symbol Parameter
Value Unit V S Operating supply voltage 18V V S (DC)DC supply voltage
28V V S (pk)Peak supply voltage (for t = 50 ms)50V I O Output peak current
repetitive (duty cycle 10 % at f = 10 Hz)non repetitive (t = 100 s)910A A P tot Power dissipation T case = 70 °C 80W T j
Junction temperature 150°C T stg
Storage temperature
-55 to 150
°C
Table 3.
Thermal data
Symbol Parameter
Value Unit R th j-case
Thermal resistance junction to case
Max.
1
°C/W
Electrical specifications TDA7850
8/18
3.3 Electrical characteristics
Table 4.
Electrical characteristics
(Refer to the test and application diagram, V S = 14.4 V; R L = 4 Ω; R g = 600 Ω; f = 1 kHz;T amb = 25 °C; unless otherwise
specified).
Symbol Parameter
Test condition
Min. I q1Quiescent current R L = ∞
100
180
280mA V OS
Output offset voltage Play mode / Mute mode ±50mV dV OS
During mute ON/OFF output offset voltage
ITU R-ARM weighted see Figure 20
-10+10mV During Standby ON/OFF output offset voltage -10+10mV G v Voltage gain
25
26
27dB dG v
Channel gain unbalance
±1
dB
P o Output power
V S = 13.2 V; THD = 10 %V S = 13.2 V; THD = 1 %V S = 14.4 V; THD = 10 %V S = 14.4 V; THD = 1 %23023W
V S = 14.4 V; THD = 10 %, 2 Ω
50
55W P o . output power (1)V S = 14.4 V; R L = 4 ΩV S = 14.4 V; R L = 2 Ω5085W THD
Distortion
P o = 4W
P o = 15W; R L = 2Ω0.0060.0150.020.03%e No Output noise "A" Weighted
Bw = 20 Hz to 20 kHz 35505070
µV SVR Supply voltage rejection f = 100 Hz; V r = 1Vrms 5075dB f ch High cut-off frequency P O = 0.5 W
100300KHz R i Input impedance 80
100120K ΩC T Cross talk
f = 1 kHz P O = 4 W f = 10 kHz P O = 4 W 607060
--dB I SB Standby current consumption V ST-BY = 1.5 V 20µA V ST-BY = 0 V
10I pin5ST -BY pin current
V ST-BY = 1.5 V to 3.5 V ±1µA V SB out Standby out threshold voltage (Amp: ON) 2.75
V V SB in Standby in threshold voltage (Amp: OFF) 1.5
V A M Mute attenuation
P Oref = 4 W 8090
dB V M out Mute out threshold voltage (Amp: Play) 3.5
V V M in
Mute in threshold voltage
(Amp: Mute)
1.5
V
TDA7850Electrical specifications
9/18
V AM in V S automute threshold
(Amp: Mute)
Att ≥ 80 dB; P Oref = 4 W (Amp: Play)
Att < 0.1 dB; P O = 0. 5W 6.5
77.5
8V
I pin23
Muting pin current
V MUTE = 1.5 V (Sourced Current)712
18µA V MUTE = 3.5 V
-5
18
µA
HSD section V dropout Dropout voltage I O = 0.35 A; V S = 9 to 16 V
0.25
0.6V I prot
Current limits
400
800
mA
Offset detector (Pin 25)V M_ON Mute voltage for DC offset detection enabled
V ST-BY = 5 V
8
V V M_OFF 6
V V OFF Detected differential output offset V ST-BY = 5 V; V mute = 8 V ±2±3
±4V V 25_T Pin 25 voltage for detection = TRUE
V ST-BY = 5 V; V mute = 8 V V OFF > ±4 V
0 1.5
V V 25_F
Pin 25 Voltage for detection = FALSE
V ST-BY = 5 V; V mute = 8 V V OFF > ±2 V
12
V
ted square wave output.
Table 4.
Electrical characteristics (continued)
(Refer to the test and application diagram, V S = 14.4 V; R L = 4 Ω; R g = 600 Ω; f = 1 kHz;T amb = 25 °C; unless otherwise
specified).
Symbol
Parameter
Test condition
Min. .
Unit
Electrical specifications TDA7850
10/18
Figure /doc/
ponents and top copper layer of the Figure
2. Figure copper layer Figure2.
TDA7850Electrical specifications
11/18
3.4
Electrical characteristic curves
Figure 6.
Quiescent current vs. supply voltage
Figure 7.
Output power vs. supply voltage (R L = 4Ω)
Figure 8.
Output power vs. supply voltage (R L = 2Ω)
Figure 9.
Distortion vs. output power (R L = 4Ω)
Figure tion vs. output power
(R L = 2Ω)
Figure tion vs. frequency
(R L = 4Ω)
Electrical specifications TDA7850
12/18
Figure tion vs. frequency
(R L = 2Ω)
Figure alk vs. frequency
Figure voltage rejection vs.
frequency
Figure attenuation vs. supply
voltage
Figure dissipation and efficiency
vs. output power (R L = 4Ω, SINE)
Figure dissipation and efficiency
vs. output power (R L = 2Ω, SINE)
TDA7850Electrical specifications
13/18
Figure dissipation vs. output power (R L = 4Ω, audio program simulation)
Figure dissipation vs. output power
(R L = 2Ω, audio program simulation)
Figure R-ARM frequency response,
weighting filter for transient pop
Application hints TDA7850
14/18
4 Application hints
Referred to the circuit of Figure 2.
4.1 SVR
Besides its contribution to the ripple rejection, the SVR capacitor governs the turn ON/OFF
time sequence and, consequently, plays an essential role in the pop optimization during ON/OFF transients. To conveniently
serve both needs, Its minimum recommended value is 10µF .
4.2 Input stage
The TDA7850's inputs are ground-compatible and can stand very high input signals (±
8Vpk) without any performance degradation.
If the standard value for the input capacitors (0.1µF) is adopted, the low frequency cut-off will amount to 16 Hz.
4.3 Standby and muting
Standby and Muting facilities are both CMOS compatible. In absence of true CMOS ports or
microprocessors, a direct connection to Vs of these two pins is admissible but a 470k equivalent resistance should be
present between the power supply and the muting and ST -BY pins.
R-C cells have always to be used in order to smooth down the transitions for preventing any audible transient noises.
About the standby, the time constant to be assigned in order to obtain a virtually pop-free transition has to be slower than 2.5
V/ms.
4.4 DC offset detector
The TDA7850 integrates a DC offset detector to avoid that an anomalous DC offset on the
inputs of the amplifier may be multiplied by the gain and result in a dangerous large offset on the outputs which may lead to
speakers damage for overheating. The feature is enabled by the MUTE pin (according to table 3) and works with the
amplifier unmuted and with no signal on the inputs.
The DC offset detection is signaled out on the HSD pin. To ensure the correct functionality of the Offset Detector it is
necessary to connect a pulldown 10 kW resistor between HSD and ground.
4.5 Heatsink definition
Under normal usage (4 Ohm speakers) the heatsink's thermal requirements have to be
deduced from Figure 18, which reports the simulated power dissipation when real
music/speech programmes are played out. Noise with gaussian-distributed amplitude was employed for this simulation.
Based on that, frequent clipping occurrence (worst-case) will cause P diss = 26 W. Assuming T amb = 70 °C and T CHIP =
150 °C as boundary conditions, the heatsink's thermal resistance should be approximately 2°C/W. This would avoid any
thermal shutdown occurrence even after long-term and full-volume operation.
TDA7850Package information
15/18
5 Package information
In order to meet environmental requirements, ST (also) offers these devices in ECOPACK ?
packages. ECOPACK ? packages are lead-free. The category of second Level Interconnect is marked on the package and
on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions
are also marked on the inner box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: /doc/
.
Package information TDA7850
16/18
TDA7850Revision history
17/18
6 Revision history
Table 5.
Document revision history
Date Revision
Changes
22-Nov-20061Initial release.
27-Feb-20072Added Chapter 3.4: Electrical characteristic curves .
09-Oct-2007
3
Updated the values for the dV OS and I q1 parameters on the Table 4.
Added Figure 20 on page 13.
12-Sep-20084
Updated Figure 2: Standard test and application circuit .
Updated Section 4.4: DC offset detector and Section 4.3: Standby and muting .
Updated the values of V OS and THD parameters on the T able 4.07-Nov-20085Modified max. values of the THD distortion
in Table 4: Electrical characteristics on page 8.17-Sep-2013
6
Updated Disclaimer.
TDA7850
18/18Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries
(“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and
services described herein at any time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and
ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If
any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use
of such third party products or services, or any intellectual property contained therein or considered as a warranty covering
the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR
IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT
LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR
EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR
OTHER INTELLECTUAL PROPERTY RIGHT.
2024年10月30日发(作者:利斯乔)
. . . . . . . . . . . . . . . 6
3Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.2Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.3Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.4Electrical characteristic curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4Application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.1SVR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.2Input stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.3Standby and muting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.4DC offset detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.5Heatsink definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5Package information . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . 15 6Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2/18
TDA7850List of tables List of tables
Table summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table te maximum
ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table l data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table ical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8 Table nt revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3/18
List of figures TDA7850 List of figures
Figure diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure rd test and
application circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure connection (top view) . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure /doc/
ponents and top copper layer of the Figure2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure copper layer Figure2. . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure ent current vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . 11 Figure power vs. supply voltage (R L = 4Ω) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure
power vs. supply voltage (R L = 2Ω) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure tion vs. output
power (R L = 4Ω). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure tion vs. output power (R L = 2Ω). . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure tion vs. frequency (R L = 4Ω) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . 11 Figure tion vs. frequency (R L = 2Ω) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure
alk vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure voltage rejection
vs. frequency. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure attenuation vs. supply voltage. . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure dissipation and efficiency vs. output power (R L = 4Ω, SINE) . . . . . . . . . . . .
. . . . . 12 Figure dissipation and efficiency vs. output power (R L = 2Ω, SINE) . . . . . . . . . . . . . . . . . 12 Figure
dissipation vs. output power (R L = 4Ω, audio program simulation). . . . . . . . . . . . . 13 Figure dissipation
vs. output power (R L = 2Ω, audio program simulation). . . . . . . . . . . . . 13 Figure R-ARM frequency response,
weighting filter for transient pop. . . . . . . . . . . . . . . . . . . 13 Figure att25 (vertical) mechanical data and package
dimensions. . . . . . . . . . . . . . . . . . . . 15 Figure att25 (horizontal) mechanical data and package dimensions. . . . . . . . .
. . . . . . . . . 16 4/18
TDA7850Block diagram and application circuit
5/18
1 Block diagram and application circuit
1.1 Block diagram
1.2 Standard test and application circuit
Pin description TDA7850
6/18
2 Pin description
TDA7850Electrical specifications
7/18
3 Electrical specifications
3.1
Absolute maximum ratings
3.2 Thermal data
Table 2.
Absolute maximum ratings
Symbol Parameter
Value Unit V S Operating supply voltage 18V V S (DC)DC supply voltage
28V V S (pk)Peak supply voltage (for t = 50 ms)50V I O Output peak current
repetitive (duty cycle 10 % at f = 10 Hz)non repetitive (t = 100 s)910A A P tot Power dissipation T case = 70 °C 80W T j
Junction temperature 150°C T stg
Storage temperature
-55 to 150
°C
Table 3.
Thermal data
Symbol Parameter
Value Unit R th j-case
Thermal resistance junction to case
Max.
1
°C/W
Electrical specifications TDA7850
8/18
3.3 Electrical characteristics
Table 4.
Electrical characteristics
(Refer to the test and application diagram, V S = 14.4 V; R L = 4 Ω; R g = 600 Ω; f = 1 kHz;T amb = 25 °C; unless otherwise
specified).
Symbol Parameter
Test condition
Min. I q1Quiescent current R L = ∞
100
180
280mA V OS
Output offset voltage Play mode / Mute mode ±50mV dV OS
During mute ON/OFF output offset voltage
ITU R-ARM weighted see Figure 20
-10+10mV During Standby ON/OFF output offset voltage -10+10mV G v Voltage gain
25
26
27dB dG v
Channel gain unbalance
±1
dB
P o Output power
V S = 13.2 V; THD = 10 %V S = 13.2 V; THD = 1 %V S = 14.4 V; THD = 10 %V S = 14.4 V; THD = 1 %23023W
V S = 14.4 V; THD = 10 %, 2 Ω
50
55W P o . output power (1)V S = 14.4 V; R L = 4 ΩV S = 14.4 V; R L = 2 Ω5085W THD
Distortion
P o = 4W
P o = 15W; R L = 2Ω0.0060.0150.020.03%e No Output noise "A" Weighted
Bw = 20 Hz to 20 kHz 35505070
µV SVR Supply voltage rejection f = 100 Hz; V r = 1Vrms 5075dB f ch High cut-off frequency P O = 0.5 W
100300KHz R i Input impedance 80
100120K ΩC T Cross talk
f = 1 kHz P O = 4 W f = 10 kHz P O = 4 W 607060
--dB I SB Standby current consumption V ST-BY = 1.5 V 20µA V ST-BY = 0 V
10I pin5ST -BY pin current
V ST-BY = 1.5 V to 3.5 V ±1µA V SB out Standby out threshold voltage (Amp: ON) 2.75
V V SB in Standby in threshold voltage (Amp: OFF) 1.5
V A M Mute attenuation
P Oref = 4 W 8090
dB V M out Mute out threshold voltage (Amp: Play) 3.5
V V M in
Mute in threshold voltage
(Amp: Mute)
1.5
V
TDA7850Electrical specifications
9/18
V AM in V S automute threshold
(Amp: Mute)
Att ≥ 80 dB; P Oref = 4 W (Amp: Play)
Att < 0.1 dB; P O = 0. 5W 6.5
77.5
8V
I pin23
Muting pin current
V MUTE = 1.5 V (Sourced Current)712
18µA V MUTE = 3.5 V
-5
18
µA
HSD section V dropout Dropout voltage I O = 0.35 A; V S = 9 to 16 V
0.25
0.6V I prot
Current limits
400
800
mA
Offset detector (Pin 25)V M_ON Mute voltage for DC offset detection enabled
V ST-BY = 5 V
8
V V M_OFF 6
V V OFF Detected differential output offset V ST-BY = 5 V; V mute = 8 V ±2±3
±4V V 25_T Pin 25 voltage for detection = TRUE
V ST-BY = 5 V; V mute = 8 V V OFF > ±4 V
0 1.5
V V 25_F
Pin 25 Voltage for detection = FALSE
V ST-BY = 5 V; V mute = 8 V V OFF > ±2 V
12
V
ted square wave output.
Table 4.
Electrical characteristics (continued)
(Refer to the test and application diagram, V S = 14.4 V; R L = 4 Ω; R g = 600 Ω; f = 1 kHz;T amb = 25 °C; unless otherwise
specified).
Symbol
Parameter
Test condition
Min. .
Unit
Electrical specifications TDA7850
10/18
Figure /doc/
ponents and top copper layer of the Figure
2. Figure copper layer Figure2.
TDA7850Electrical specifications
11/18
3.4
Electrical characteristic curves
Figure 6.
Quiescent current vs. supply voltage
Figure 7.
Output power vs. supply voltage (R L = 4Ω)
Figure 8.
Output power vs. supply voltage (R L = 2Ω)
Figure 9.
Distortion vs. output power (R L = 4Ω)
Figure tion vs. output power
(R L = 2Ω)
Figure tion vs. frequency
(R L = 4Ω)
Electrical specifications TDA7850
12/18
Figure tion vs. frequency
(R L = 2Ω)
Figure alk vs. frequency
Figure voltage rejection vs.
frequency
Figure attenuation vs. supply
voltage
Figure dissipation and efficiency
vs. output power (R L = 4Ω, SINE)
Figure dissipation and efficiency
vs. output power (R L = 2Ω, SINE)
TDA7850Electrical specifications
13/18
Figure dissipation vs. output power (R L = 4Ω, audio program simulation)
Figure dissipation vs. output power
(R L = 2Ω, audio program simulation)
Figure R-ARM frequency response,
weighting filter for transient pop
Application hints TDA7850
14/18
4 Application hints
Referred to the circuit of Figure 2.
4.1 SVR
Besides its contribution to the ripple rejection, the SVR capacitor governs the turn ON/OFF
time sequence and, consequently, plays an essential role in the pop optimization during ON/OFF transients. To conveniently
serve both needs, Its minimum recommended value is 10µF .
4.2 Input stage
The TDA7850's inputs are ground-compatible and can stand very high input signals (±
8Vpk) without any performance degradation.
If the standard value for the input capacitors (0.1µF) is adopted, the low frequency cut-off will amount to 16 Hz.
4.3 Standby and muting
Standby and Muting facilities are both CMOS compatible. In absence of true CMOS ports or
microprocessors, a direct connection to Vs of these two pins is admissible but a 470k equivalent resistance should be
present between the power supply and the muting and ST -BY pins.
R-C cells have always to be used in order to smooth down the transitions for preventing any audible transient noises.
About the standby, the time constant to be assigned in order to obtain a virtually pop-free transition has to be slower than 2.5
V/ms.
4.4 DC offset detector
The TDA7850 integrates a DC offset detector to avoid that an anomalous DC offset on the
inputs of the amplifier may be multiplied by the gain and result in a dangerous large offset on the outputs which may lead to
speakers damage for overheating. The feature is enabled by the MUTE pin (according to table 3) and works with the
amplifier unmuted and with no signal on the inputs.
The DC offset detection is signaled out on the HSD pin. To ensure the correct functionality of the Offset Detector it is
necessary to connect a pulldown 10 kW resistor between HSD and ground.
4.5 Heatsink definition
Under normal usage (4 Ohm speakers) the heatsink's thermal requirements have to be
deduced from Figure 18, which reports the simulated power dissipation when real
music/speech programmes are played out. Noise with gaussian-distributed amplitude was employed for this simulation.
Based on that, frequent clipping occurrence (worst-case) will cause P diss = 26 W. Assuming T amb = 70 °C and T CHIP =
150 °C as boundary conditions, the heatsink's thermal resistance should be approximately 2°C/W. This would avoid any
thermal shutdown occurrence even after long-term and full-volume operation.
TDA7850Package information
15/18
5 Package information
In order to meet environmental requirements, ST (also) offers these devices in ECOPACK ?
packages. ECOPACK ? packages are lead-free. The category of second Level Interconnect is marked on the package and
on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions
are also marked on the inner box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: /doc/
.
Package information TDA7850
16/18
TDA7850Revision history
17/18
6 Revision history
Table 5.
Document revision history
Date Revision
Changes
22-Nov-20061Initial release.
27-Feb-20072Added Chapter 3.4: Electrical characteristic curves .
09-Oct-2007
3
Updated the values for the dV OS and I q1 parameters on the Table 4.
Added Figure 20 on page 13.
12-Sep-20084
Updated Figure 2: Standard test and application circuit .
Updated Section 4.4: DC offset detector and Section 4.3: Standby and muting .
Updated the values of V OS and THD parameters on the T able 4.07-Nov-20085Modified max. values of the THD distortion
in Table 4: Electrical characteristics on page 8.17-Sep-2013
6
Updated Disclaimer.
TDA7850
18/18Please Read Carefully:
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