6通道语音+旋律处理器(BandDirector系列)数据手册说明书-USB迷|专注于互联网分享

2024年11月5日发(作者：昂英杰)

W567JXXX Data Sheet

6-CHANNEL SPEECH+MELODY PROCESSOR

(BandDirector

Series)

Table of Contents-

FEATURES .............................................................................................................................................. 3

PIN DESCRIPTION .................................................................................................................................. 4

BLOCK DIAGRAM ................................................................................................................................... 5

ITEM VS PIN TABLE ................................................................................................................................ 6

ELECTRICAL CHARACTERISTICS ........................................................................................................ 7

6.1

Absolute Maximum Ratings ............................................................................................................ 7

6.2

DC Characteristics .......................................................................................................................... 7

6.3

AC Characteristics .......................................................................................................................... 8

TYPICAL APPLICATION CIRCUIT .......................................................................................................... 9

REVISION HISTORY ............................................................................................................................. 12

- 1 -

Publication Release Date Sep. 2012

Revision A12

W567JXXX

1. GENERAL DESCRIPTION

The W567Jxxx is a powerful microcontroller (uC) dedicated to speech and melody synthesis

applications. With the help of the embedded 8-bit microprocessor & dedicated H/W, the W567Jxxx can

synthesize 6-channel speech+melody simultaneously.

The two channels of synthesized speech can be in different kinds of format, for example ADPCM

and MDPCM. The W567Jxxx can provide 6-channel high-quality WinMelody , which can emulate

the characteristics of musical instruments, such as piano and violin. The output of speech/melody

channels are mixed together through the on-chip digital mixer to produce colorful effects. With these

hardware resources, the W567Jxxx is very suitable for high-quality and sophisticated scenario

applications.

The W567Jxxx provides at most 24 bi-directional I/Os, 256 bytes RAM , IR carrier, Serial Interface

Management and more sophisticated applications, such as interactive toys, cartridge toys and final

count down function. 3 LED output pins with 256-level control means that numerous combination of

RGB colors may result in a versatility of colorful effects. In addition, W567Jxxx also provides PWM

mode output to save power during playback and Watch Dog Timer to prevent latch-up situation

occurring.

The W567Jxxx family contains several items with different playback duration as shown below.

Item

*Duration

Item

Duration

Note:

*: The duration time is based on 5-bit MDPCM at 6 KHz sampling rate. The firmware library and timber library have been

excluded from user’s ROM space for the duration estimation.

W567J070

81 sec.

W567J210

230 sec.

W567J080

102 sec.

W567J260

263 sec.

W567J100

115 sec.

W567J300

320 sec.

W567J120

127 sec.

W567J340

358 sec.

W567J151

162 sec.

W567J380

400 sec.

W567J171

196 sec.

- 2 -

W567JXXX

2. FEATURES

 Wide range of operating voltage:

 ************~5.5volt

 4 ~ 8 MHz system clocks, with Ring type or crystal type.

 Stop mode for stopping all IC operations

 W567J070~J120: 16 I/O

 W567J151~J380: 24 I/O

 Power management:

 Provides up to 24 I/O pins

 F/W speech synthesis:

 Multiple format parser that supports

 6-bit MDPCM, 5-bit MDPCM, 4-bit MDPCM ,4-bit ADPCM, 8-bit Log PCM

algorithm can be used

 Pitch shippable ADPCM for voice changer application

 Programmable sample rate

 Melody synthesis:

 6 melody channels that can emulate characteristics of musical instruments

 More MIDI events are supported for colorful melody playback

 Built-in TimerG0 for general purpose applications

 Harmonized synchronization among MIDI, Speech, LED, and Motor

 Build-in 3 LED outputs with 256-level control of brightness.

 Built-in Watch-Dog Timer (WDT) and Low Voltage Reset (LVR)

 Provide serial interface to access the external memory in W567J070~J380

 W55Fxx, W551Cxx

 SPI flash

 Built-in IR carrier generation circuit for simplifying firmware IR application

 Current type digital-to-analog converters (DAC) with 13-bit resolution to drive speaker output

 Direct-drive 12-bit PWM output to save power consumption

 Support PowerScript for developing codes in easy way

 Full-fledged development system

 Source-level ICE debugger (Assembly & PowerScript

format)

 Ultra I/O

tool for event synchronization mechanism

 ICE system with USB port

 User-friendly GUI environment

 Available package form:

 COB is essential

- 3 -

W567JXXX

3. PIN DESCRIPTION

PIN NAME

/RESET

OSCIN

I/O

IC reset input, low active.

Main-clock oscillation input. When Ring type is used, connects Rosc

between OSCIN and VSS to generate the system clock frequency.

Reserved one 100pF~200pF capacity to VDD from OSCin pin to make

Ring frequency stability

When use X’tal, it is X’tal IN.

OSCOUT O Main-clock oscillation output only for X’tal.

General input/output pins. When used as output pin, it can be open–drain

or CMOS type and it can sink 25mA for high-current applications. When

used as input pin, there may have a pull-high option and generate

interrupt request to release IC from STOP mode.

BP04~BP06 are used as 3 LED outputs with 256-level control.

BP10~BP17

BP20~BP27

PWM+/DAC

PWM-

TEST

VDD

VDD1

VSS

VDDOSC

VDDSPK

VSSSPK

CVDD

FUNCTION

BP00~BP07 I/O

I/O

General input/output pins. When used as output pin, it can be open–drain

or CMOS type. When used as input pin, there may have a pull-high option

and generate interrupt request to release IC from STOP mode.

General input/output pins. When used as output pin, it can be open–drain

or CMOS type. When used as input pin, there may have a pull-high option

and generate interrupt request to release IC from STOP mode.

PWM driver positive output or Current type DAC output

PWM driver negative output

Test input, internally pulled high. Do not connect during normal operation.

Positive power supply for uP and peripherals.

All VDD pins must be bonded out and connect to VDD

Only W567J151/171 for Positive power supply for uP and peripherals.

It needs be bonded out and connect to VDD.

I/O

Power

Power Negative power supply for oscillation, uP and peripherals.

Power Positive power supply for oscillation.

Power Positive power supply for speaker driver.

Power Negative power supply for speaker driver.

O For 3 battery(3.3V~5.5V) application , the capacitor, 0.1uF, shunts

between CVDD and GND as power stability for regulator output.

For 2 battery(2.2V~3.6V) application, CVDD will connect to VDD directly.

Note: W567J151/171 without CVDD pin, the application circuit don’t need

consider 3/2battery application.

VDD_BP1 Power

Positive power supply for BP1 including serial interface Management

(SIM).

BP2 isn’t provided in W567J070 ~ W567J120.

- 4 -

W567JXXX

4. BLOCK DIAGRAM

OSCINOSCOUT

BP10~17BP20~27BP00~07

BP13~16

Timing

Generator

Interrupt

Controller

Timers

HQ generator

Serial

Interface

I/O

RESETB

8bits uP

Address/Data Bus

Data RAM

Program ROM

WDT

Mixer

DAC/

PWM

DAC/PWM+

PWM-

Notes:

1. BP2 isn’t provided in W567J070 ~ W567J120.

- 5 -

W567JXXX

5. ITEM VS PIN TABLE

PIN name J070/ 080/

100/ 120

J151/ 171 J210/

260/ 300/

340/ 380

Comment

BP00~BP07

BP10~BP17

BP20~BP27

/RESET

TEST

PWM+/DAC

PWM-

OSCIN

OSCOUT

VDD

VSS

VDDSPK

VSSSPK

VDD_BP1

Crystal mode

Support speaker power

Support BP10~BP17

including SIM interface

power

Support OSCIN/OUT power

Regulator out

Connect to VDD

VDDOSC

VSSOSC

CVDD

VDD1

- 6 -

W567JXXX

6. ELECTRICAL CHARACTERISTICS

6.1 Absolute Maximum Ratings

PARAMETER

Supply Voltage to Ground Potential

D.C. Voltage on Any Pin to Ground Potential

Operating Temperature

Storage Temperature

RATING

-0.3 to +7.0

-0.3 to V

+0.3

0 to +70

-55 to +150

UNIT

C

Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability

of the device.

6.2 DC Characteristics

V

= 4.5 V, F

= 8 MHz, Ta = 25C, No Load unless otherwise specified)

PARAMETER SYM. TEST CONDITIONS

SYS

= 6 MHz

SYS

= 8 MHz

No load, F

SYS

= 6 MHz

STOP mode

All input pins

= 0V, pulled-high

resistor = 500k ohm

= 0V, pulled-high

resistor = 150k ohm

= 3V, V

OUT

= 0.4V

= 3V, V

OUT

= 2.6V

= 4.5V, V

OUT

= 1.0V

= 4.5V, V

OUT

= 3.5V

= 3V, V

OUT

= 0.4V

= 3V, V

OUT

= 2.6V

= 4.5V, V

OUT

= 1.0V

= 4.5V, V

OUT

= 3.5V

SPEC.

Min.

2.4

3.0

0.7 V

-5

-15

-4

Typ.

-9

-30

-6

-12

-6

-12

Max.

5.5

0.3 V

-14

-45

UNIT

A

Operating Voltage

Operating Current

Standby Current

Input Low Voltage

Input High Voltage

Input Current

(BP0, BP1, BP2)

Input Current

(BP0, BP1, BP2)

OP1

IN1

IN2

Output Current (BP0)

Output Current

(BP1, BP2)

- 7 -

W567JXXX

PARAMETER

DAC Full Scale Current

Output Current

PWM+ / PWM-

Pull-high Resistor Test

SYM.

DAC

OL1

IOH1

TEST CONDITIONS

SPEC.

Min.

-2.4

-4.0

+200

-200

Typ.

-3.0

-5.0

150

Max.

-3.6

-6.0

225

UNIT

K

= 4.5V, RL = 100

RL= 8 Ohm,

[PWM+]----[RL]----[PWM-]

6.3 AC Characteristics

-V

= 4.5 V, F

= 8 MHz, Ta = 25C; No Load unless otherwise specified)

PARAMETER SYM. TEST CONDITIONS

Ring type, *Rosc = TBD 

SPEC.

Min.

5.4

7.2

166

Typ.

Max.

6.6

UNIT

Main-Clock

Main-Clock Wake-up

Stable Time

Main-Clock Frequency

Deviation, Ring type

Cycle Time

/RESET Active Width

Ring type, *Rosc = TBD 

WSM

Ring type, R = TBD K

MHz

8.8

7.5

CYC

F

CYC

RES

MAX

-F

MIN

CPU clock = 6 MHz

After F

SYS

stable

*: Typical ROSC value for each part number should refer to design guide.

- 8 -

W567JXXX

7. TYPICAL APPLICATION CIRCUIT

a. Rosc with 2 Battery

(3)

4.7uF

VDDSPK

VDD/VDDOSC

VDD_BP1/VDD1

10ohm

BP00

BP07

BP10

BP17

BP20

BP27

VDDSPK

(2)

0.1uF

120pF

(4)

ROSC

OSCIN

OSCOUT

TEST

X32I

X32O

PWM+/DAC

PWM-

(5)

Speaker0

8050

Speaker0

/RESET

Reset

Switch

0.1uF

CVDD

VSSSPK

VSS

(1)

Notes:

1. The block (1): If the project is two-battery application (Voltage 3.6V~2.2V), it is necessary to connect CVDD to VDD.

2. The block (2): The low-pass filter circuit is necessary for VDD stability, in order to avoid VDDSPK noise.

3. The block (3): The capacitor, 4.7uF, shunted between VDD and GND is necessary for power stability. However, the

value of capacitor depends on the power loading of the application.

4. The typical value of Rosc is 300 K for 8MHz and 390 K for 6MHz, and the Rosc should be connected to GND

(VSS). Please refer to design guide to get typical Rosc value for each part number.

5. The block (4):The capacitor, 120pF, shunted between OSCIN and VDD is optional for Fosc stability, which can

prevent noise from happening, because it can block the affection of larger current while playing. However, the value

of capacitor depends on the application (100pF~200pF is recommended)

6. The block (5): The Rs value is suggested of 270 ~ 1K to limit large DAC output current flowing into transistor.

7. The above application circuit is for reference only. No warranty for mass production.

- 9 -

W567JXXX

b. Rosc with 3 Battery

(3)

4.7uF

VDDSPK

VDD/VDDOSC

VDD_BP1/

VDD1

10ohm

BP00

BP07

BP10

BP17

BP20

BP27

VDDSPK

(2)

0.1uF

120pF

(4)

ROSC

OSCIN

OSCOUT

TEST

X32I

X32O

PWM+/DAC

PWM-

(5)

Speaker0

8050

Speaker0

RESET

Reset

Switch

0.1uF

CVDD

VSSSPK

VSS

(1)

0.1uF

Notes:

The block (1): If the project is three-battery application (Voltage 5.5V~3.0V), it is necessary to connect a 0.1uF

between CVDD and GND (VSS).

The block (2): The low-pass filter circuit is necessary for VDD stability, in order to avoid VDDSPK noise

The block (3): The capacitor, 4.7uF, shunted between VDD and GND is necessary for power stability. However,

the value of capacitor depends on the power loading of the application.

The typical value of Rosc is 300 K for 8MHz and 390 K for 6MHz, and the Rosc should be connected to

GND (VSS). Please refer to design guide to get typical Rosc value for each part number.

The block (4)The capacitor, 120pF, shunted between OSCIN and VDD is optional for Fosc, which can prevent

noise from happening, because it can block the affection of larger current while playing. However, the value of

capacitor depends on the application (100pF~200pF is recommended)

The block (5): The Rs value is suggested of 270 ~ 1K to limit large DAC output current flowing into

transistor.

The above application circuit is for reference only. No warranty for mass production.

- 10 -

W567JXXX

c. Crystal

(3)

4.7uF

VDDSPK

VDD/VDDOSC

VDD_BP1/VDD1

10ohm

BP00

BP07

BP10

BP17

BP20

BP27

(2)

0.1uF

VDDSPK

(5)

Speaker0

8050

(4)

Cp1

Cp2

OSCIN

OSCOUT

(4)

Cp3

Cp4

X32I

X32O

PWM+/DAC

PWM-

Speaker0

RESET

Reset

Switch

0.1uF

CVDD

VSSSPK

VSS

(1)

Notes:

The block (1): Please refer to (a) and (b) circuits for two-battery or three-battery application.

The block (2): The low-pass filter circuit is necessary for VDD stability, in order to avoid VDDSPK noise.

The block (3): The capacitor, 4.7uF, shunted between VDD and GND is necessary for power stability. However the

value of capacitor depends on the power loading of the application

The block (4): Cp1 and Cp2 (15~30pF) are optional for main Crystal, which can be skipped normally.

The block (5): The Rs value is suggested of 270 ~ 1K to limit large DAC output current flowing into transistor.

Cp3 and Cp4 (15~30pF) are optional for 32KHz Crystal, which can be skipped normally.

Please connect all VDD pins include VDDOSC/VDD_BP1 to VDD. If with SIM application, the VDD_BP1 pin can

connect to different voltage for SPI flash or W551Cxx and the BP10~BP17 also use the same power VDD_BP1.

The above application circuit is for reference only. No warranty for mass production.

Other application circuits please refer to Design Guide.

- 11 -

W567JXXX

d. PCB layout guide

The IC substrate should be connected to VSS in PCB layout, but VSSSPK can’t connect with IC

substrate directly. Both VSS and VSSSPK tie together in battery negative power.

Each VDD, VDDOSC, VDD_BP1, VDD1 and VDDSPK pad must connect to positive power to

support stable voltage for individual function work successfully. (Don’t let them be floating.)

8. REVISION HISTORY

VERSION

A0.0

DATE

Jan 2007

REASONS FOR CHANGE

Preliminary release.



A1.0 May 2007



A2.0 Nov 2007



A3.0

A4.0

A5.0

Sep. 2008

Jun. 2009

May. 2010



Add SIM function

Remove 32K Crystal current on DC characteristics

Modify application circuit

Remove multi-midi function

Modify application circuit and naming

Modify Logo

Change logo

Modify application circuit

Add 2 battery application circuit



A6.0 Dec, 2010



UpdateoutputcurrentforBP1/******/*********************

Add application circuit for Ring OSCin pin to add 120pF to VDD

Modify the description for application circuit

Support MD4 format for F/W library

8~15

A7.0 July. 2011 



A8.0 Aug. 2011



A9.0 Feb. 2012



A10.0 Mar. 2012



Add new chip W567J151/171

Remove W567J160/170.

Add new chip W567J151/171 pad description

Add new chip W567J151/171 application circuit

Add SIM application circuit

Add W567CP80 OTP chip

Add items vs pad table

Modify application circuits

BP00~BP03 share pins as OTP writer in W567CP80.

Correct TEST pin as internal pull high

Update operating current DC spec.

9~18

8~15

PAGE

- 12 -

W567JXXX

Important Notice

Nuvoton Products are neither intended nor warranted for usage in systems or equipment, any

malfunction or failure of which may cause loss of human life, bodily injury or severe property

damage. Such applications are deemed, “Insecure Usage”.

Insecure usage includes, but is not limited to: equipment for surgical implementation, atomic

energy control instruments, airplane or spaceship instruments, the control or operation of

dynamic, brake or safety systems designed for vehicular use, traffic signal instruments, all

types of safety devices, and other applications intended to support or sustain life.

All Insecure Usage shall be made at customer’s risk, and in the event that third parties lay

claims to Nuvoton as a result of customer’s Insecure Usage, customer shall indemnify the

damages and liabilities thus incurred by Nuvoton.

- 13 -