2024年11月5日发(作者:晏实)
TFBS4650
Vishay Semiconductors
Infrared Transceiver
9.6 kbit/s to 115.2 kbit/s (SIR)
Description
The TFBS4650 is one of the smallest IrDA
®
compliant
transceivers available. It supports data rates up to
115 kbit/s. The transceiver consists of a PIN photo-
diode, infrared emitter, and control IC in a single pack-
age.
20206
Features
•Compliant with the IrDA physical layer
IrPHY 1.4 (low power specification,
9.6 kbit/s to 115.2 kbit/s)
e4
•Link distance: 30 cm/20 cm full 15°
cone
with standard or low power IrDA, respec-
tively. Emission intensity can be set by an external
resistor to increase the range for extended low
power spec to > 50 cm
•Typical transmission distance to standard device:
50 cm
•Small package -
L 6.8 mm x W 2.8 mm x H 1.6 mm
•Low current consumption
75 µA idle at 3.6 V
•Shutdown current 10 nA typical at 25 °C
•Operates from 2.4 V to 3.6 V within specification
over full temperature range from - 25 °C to + 85 °C
•Split power supply, emitter can be driven by a sep-
arate power supply not loading the regulated. U.S.
Pat. No. 6,157,476
•Lead (Pb)-free device
•Qualified for lead (Pb)-free and Sn/Pb processing
(MSL4)
•Device in accordance with RoHS 2002/95/EC and
WEEE 2002/96/EC
Applications
• Mobile phone
• PDAs
Parts Table
Part
TFBS4650-TR1
TFBS4650-TR3
Description
Oriented in carrier tape for side view surface mounting
Oriented in carrier tape for side view surface mounting
1000 pcs
2500 pcs
Qty / Reel
120
Document Number 84672
Rev. 1.1, 03-Jul-06
TFBS4650
Vishay Semiconductors
Functional Block Diagram
V
CC
PD
Amplifier
Comparator
Tri-State
Driver
RxD
SD
TxD
ASIC
Mode
Control
IRED Driver
IREDA
IRED
IREDC
GND
19283
Pin Description
Pin Number
1
2
3
Function
IREDA
IREDC
TXD
Description
IRED Anode, connected via a current limiting resistor to V
CC2
. A separate
unregulated power supply can be used.
IRED Cathode, do not connect for standard operation
Transmitter Data Input. Setting this input above the threshold turns on the
transmitter.
This input switches the IRED with the maximum transmit pulse width of
about 50 µs.
Receiver Output. Normally high, goes low for a defined pulse duration with
the rising edge of the optical input signal. Output is a CMOS tri-state driver,
which swings between ground and V
cc
. Receiver echoes transmitter output.
Shut Down. Logic Low at this input enables the receiver, enables the
transmitter, and un-tri-states the receiver output. It must be driven high for
shutting down the transceiver.
Power Supply, 2.4 V to 3.6 V. This pin provides power for the receiver and
transmitter drive section. Connect V
CC1
via an optional filter.
Ground
IHIGH
I/OActive
4RXD
OLOW
5SD
IHIGH
6
7
V
CC
GND
Pinout
TFBS4650, bottom view
weight 0.05 g
19284
Document Number 84672
Rev. 1.1, 03-Jul-06
121
TFBS4650
Vishay Semiconductors
Absolute Maximum Ratings
Reference point Pin, GND unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Parameter
Supply voltage range,
transceiver
Supply voltage range,
transmitter
Voltage at RXD
Test Conditions
0 V < V
CC2
< 6 V
0 V < V
CC1
< 3.6 V
All states
Symbol
V
CC1
V
CC2
V
in
V
in
Min
- 0.5
- 0.5
- 0.5
- 0.5
- 40
6.0
6.0
V
CC
+ 0.5
6.0
40
20
P
D
T
J
T
amb
T
stg
see section Recommended
Solder Profile
< 90 µs, t
on
< 20 %I
IRED
(RP)
I
IRED
(DC)
Method: (1-1/e) encircled
energy
IEC60825-1 or
EN60825-1,
edition Jan. 2001
d
I
e
0.8
*)
Unit
V
V
V
V
mA
mA
mW
°C
°C
°C
°C
Input voltage range, transmitter Independent of V
CC1
or V
CC2
TXD
Input currents
Output sinking current
Power dissipation
Junction temperature
Ambient temperature range
(operating)
Storage temperature range
Soldering temperature ***)
Repetitive pulse output current
Average output current
(transmitter)
Virtual source size
Maximum Intensity for Class 1
For all pins, except IRED anode
pin
250
125
- 25
- 40
+ 85
+ 100
500
100
mA
mA
mm
mW/sr
(500)
**)
*)
Due to the internal limitation measures the device is a "class1" device.
IrDA specifies the max. intensity with 500 mW/sr
**)
***)
Sn/Pb-free soldering. The product passed VISHAY’s standard convection reflow profile soldering test.
Definitions:
In the Vishay transceiver data sheets the following nomenclature is used for defining the IrDA operating modes:
SIR: 2.4 kbit/s to 115.2 kbit/s, equivalent to the basic serial infrared standard with the physical layer version IrPhY 1.0
MIR: 576 kbit/s to 1152 kbit/s
FIR: 4 Mbit/s
VFIR: 16 Mbit/s
MIR and FIR were implemented with IrPhY 1.1, followed by IrPhY 1.2, adding the SIR Low Power Standard. IrPhY 1.3 extended the Low
Power Option to MIR and FIR and VFIR was added with IrPhY 1.4. A new version of the standard in any case obsoletes the former version.
122
Document Number 84672
Rev. 1.1, 03-Jul-06
TFBS4650
Vishay Semiconductors
Electrical Characteristics
Transceiver
T
amb
= 25°C, V
CC
= 2.4 V to 3.6 V unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Parameter
Supply voltage range
Dynamic supply current
Idle, dark ambientSD = Low (< 0.8 V),
E
eamb
= 0 klx,
E
e
< 4 mW/m
2
- 25 °C ≤ T ≤ + 85 °C
Idle, dark ambientSD = Low (< 0.8 V),
E
eamb
= 0 klx,
E
e
< 4 mW/m
2
T = + 25 °C
Peak supply current during
transmission
Shutdown supply current
dark ambient
Shutdown supply current, dark
ambient
Operating temperature range
Input voltage low (TXD, SD)
Input voltage high
Input voltage threshold SD
Output voltage low
Output voltage high
RXD to V
CC
pull-up impedance
Input capacitance
(TXD, SD)
V
CC
= 2.4 V to 3.6 V
V
CC
= 2.4 V to 3.6 V
V
CC
= 2.4 V to 3.6 V
CLOAD = 15 pF
V
CC
= 2.4 V to 3.6 V
C
LOAD
= 15 pF
SD = V
CC
V
CC
= 2.4 V to 5 V
V
OL
V
OH
R
RXD
C
I
SD = Low, TXD = High
SD = High
(> V
CC
- 0.5 V),
T = 25 °C, Ee = 0 klx
SD = High
(> V
CC
- 0.5 V),
- 25 °C ≤ T ≤ + 85 °C
I
ccpk
I
SD
23
0.1
mA
µA
I
CC
75µA
I
CC
90130µA
Test ConditionsSymbol
V
CC
Min
2.4
3.6
Unit
V
I
SD
1.0µA
T
A
V
IL
V
IH
- 25
- 0.5
V
CC
- 0.5
0.9
- 0.5
V
CC
x 0.8
500
1.35
+ 85
0.5
6.0
1.8
V
CC
x 0.15
V
CC
+ 0.5
°C
V
V
V
V
V
kΩ
6pF
Document Number 84672
Rev. 1.1, 03-Jul-06
123
TFBS4650
Vishay Semiconductors
Optoelectronic Characteristics
Receiver
T
amb
= 25°C, V
CC
= 2.4 V to 3.6 V unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Parameter
Sensitivity:
Minimum irradiance Ee in
angular range *)**)
Maximum irradiance Ee in
angular range ***)
No receiver output input
irradiance
Rise time of output signal
Fall time of output signal
RXD pulse width of output
signal, 50%****)
Receiver start up time
Latency
*)
Test Conditions
9.6 kbit/s to 115.2 kbit/s
λ = 850 nm to 900 nm
λ = 850 nm to 900 nm
According to IrDA IrPHY 1.4,
Appendix A1, fluorescent light
specification
10 % to 90 %, C
L
= 15 pF
90 % to 10 %, C
L
= 15 pF
Input pulse width
1.63 µs
Power on delay
Symbol
E
e
MinTyp.
40
(4.0)
Max
81
(8.1)
Unit
mW/m
2
(µW/cm
2
)
kW/m
2
(mW/cm
2
)
mW/m
2
(µW/cm
2
)
E
e
E
e
5
(500)
4
(0.4)
20
20
1.72.0
100
100
100
2.9
150
200
t
r (RXD)
t
f (RXD)
t
PW
ns
ns
µs
µs
µst
L
50
This parameter reflects the backlight test of the IrDA physical layer specification to guarantee immunity against light from fluorescent
lamps
IrDA sensitivity definition: Minimum Irradiance E
e
In Angular Range, power per unit area. The receiver must meet the BER specification
while the source is operating at the minimum intensity in angular range into the minimum half-angle range at the maximum Link Length
Maximum Irradiance E
e
In Angular Range, power per unit area. The optical delivered to the detector by a source operating at the max-
imum intensity in angular range at Minimum Link Length must not cause receiver overdrive distortion and possible related link errors. If
placed at the Active Output Interface reference plane of the transmitter, the receiver must meet its bit error ratio (BER) specification.
****)
RXD output is edge triggered by the rising edge of the optical input signal. The output pulse duration is independent of the input pulse
***)
**)
duration.
For more definitions see the document “Symbols and Terminology” on the Vishay Website (/docs/82512/).
124
Document Number 84672
Rev. 1.1, 03-Jul-06
TFBS4650
Vishay Semiconductors
Transmitter
T
amb
= 25°C, V
CC
= 2.4 V to 3.6 V unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
ParameterTest ConditionsSymbol
I
D
Min
200
400
Unit
mAIRED operating current, current The IRED current is internally
controlledcontrolled but also can be
reduced by an external resistor
R1
Output leakage IRED current
Output radiant intensity *)
Tamb = 85°C
α = 0°, 15°, TXD = High, SD =
Low, V
CC1
= 3.0 V, V
CC2
= 3.0 V,
R1 = 30 Ω (resulting in about
50 mA drive current)
α = 0°, 15°, TXD = High, SD =
Low, V
CC1
= 3.0 V, V
CC2
= 3.0 V,
R1 = 0 Ω, If = 300 mA
V
CC1
= 5.0 V, α = 0°, 15°
TXD = Low or SD = High
(Receiver is inactive as long as
SD = High)
V
CC
= 3.0 V, If = 50 mA
I
IRED
I
e
4
1
150
µA
mW/sr
Output radiant intensity *)
I
e
25mW/sr
Output radiant intensity *)I
e
0.04mW/sr
Saturation voltage of IRED
driver
Peak - emission wavelength
Optical rise time,
Optical fall time
Optical output pulse duration
Optical output pulse duration
Optical overshoot
*)
V
CEsat
λ
p
t
ropt
,
t
fopt
880
20
0.4
886900
100
t
50
1.61
V
nm
ns
µs
µs
µs
%
Input pulse width t < 30 µs
Input pulse width t ≥ 30 µs
Input pulse width t = 1.63 µs
t
opt
t
opt
t
opt
30
1.45
300
2.2
20
The radiant intensity can be adjusted by the external current limiting resistor to adapt the intensity to the desired value. The given value
is for minimum current consumption. This transceiver can be adapted to > 50 cm operation by increasing the current to > 200 mA, e.g.
operating the transceiver without current control resistor (i.e. R1 = 0 Ω) and using the internal current control.
Table 1.
Truth table
Inputs
SD
high
low
low
low
low
low
TXD
x
high
high > 50 µs
low
low
low
Optical input Irradiance mW/m
2
x
x
x
< 4
> Min. irradiance E
e
< Max. irradiance E
e
> Max. irradiance E
e
RXD
Tri-state floating with a weak
pull-up to the supply voltage
low (echo on)
high
low (active)
x
Outputs
Transmitter
0
I
e
0
0
0
high 0
Document Number 84672
Rev. 1.1, 03-Jul-06
125
TFBS4650
Vishay Semiconductors
Recommended Circuit Diagram
Operated at a clean low impedance power supply the
TFBS4650 needs only one additional external com-
ponent when the IRED drive current should be mini-
mized for minimum current consumption according
the low power IrDA standard. When combined opera-
tion in IrDA and Remote Control is intended no cur-
rent limiting resistor is recommended.
However, depending on the entire system design and
board layout, additional components may be required
(see figure 1). When long wires are used for bench
tests, the capacitors are mandatory for testing rise/fall
time correctly.
recommended to position C2 as close as possible to
the transceiver power supply pins.
When connecting the described circuit to the power
supply, low impedance wiring should be used.
In case of extended wiring the inductance of the
power supply can cause dynamically a voltage drop
at V
CC2
. Often some power supplies are not able to
follow the fast current is rise time. In that case another
10 µF cap at V
CC2
will be helpful.
Keep in mind that basic RF-design rules for circuit
design should be taken into account. Especially
longer signal lines should not be used without termina-
tion. "The Art of Electronics" Paul Horowitz,
Wienfield Hill, 1989, Cambridge University Press,
ISBN: .
V
CC2
V
CC1
GND
SD
Txd
Rxd
R1
R2
C2
IRED Anode
IRED Cathode
V
CC
Ground
SD
Txd
Rxd
C1
Table 2.
Recommended Application Circuit Components
Component
C1, C2
R1
R2
19286
Recommended Value
0.1 µF, Ceramic Vishay part#
VJ 1206 Y 104 J XXMT
See table 3
47 Ω, 0.125 W (V
CC1
= 3 V)
Figure1. Recommended Application Circuit
Table 3.
Recommended resistor R1 [Ω]
V
CC2
[V]
2.7
3.0
3.3
Minimized current consumption,
IrDA Low power compliant
24
30
36
The capacitor C1 is buffering the supply voltage V
cc2
and eliminates the inductance of the power supply
line. This one should be a small ceramic version or
other fast capacitor to guarantee the fast rise time of
the IRED current. The resistor R1 is necessary for
controlling the IRED drive current when the internally
controlled current is too high for the application.
Vishay transceivers integrate a sensitive receiver and
a built-in power driver. The combination of both needs
a careful circuit board layout. The use of thin, long,
resistive and inductive wiring should be avoided. The
inputs (TXD, SD) and the output RXD should be
directly (DC) coupled to the I/O circuit.
The capacitor C2 combined with the resistor R2 is the
low pass filter for smoothing the supply voltage.
As already stated above R2, C1 and C2 are optional
and depend on the quality of the supply voltages V
CCx
and injected noise. An unstable power supply with
dropping voltage during transmission may reduce the
sensitivity (and transmission range) of the trans-
ceiver.
The placement of these parts is critical. It is strongly
126
Document Number 84672
Rev. 1.1, 03-Jul-06
TFBS4650
Vishay Semiconductors
Recommended Solder Profiles
Solder Profile for Sn/Pb soldering
Manual Soldering
Manual soldering is the standard method for lab use.
However, for a production process it cannot be rec-
ommended because the risk of damage is highly
dependent on the experience of the operator. Never-
theless, we added a chapter to the above mentioned
application note, describing manual soldering and
desoldering.
Storage
The storage and drying processes for all VISHAY
transceivers (TFDUxxxx and TFBSxxx) are equiva-
lent to MSL4.
The data for the drying procedure is given on labels
on the packing and also in the application note
"Taping, Labeling, Storage and Packing"
(/docs/82601/).
260
240
220
200
180
10 s max. at 230 °C
240 °C max.
2...4 °C/s
160 °C max.
T
e
m
p
e
r
a
t
u
r
e
/
°
C
160
140
120
100
80
60
40
20
0
0 50 100 150 200 250 300 350
180 s
90 s max.
2...4 °C/s
Time/s
19431
Figure2. Recommended Solder Profile for Sn/Pb soldering
Lead (Pb)-Free, Recommended Solder Profile
The TFBS4650 is a lead (Pb)-free transceiver and
qualified for lead (Pb)-free processing. For lead
(Pb)-free solder paste like Sn(3.0-4.0)Ag(0.5-0.9)Cu,
there are two standard reflow profiles: Ramp-Soak-
Spike (RSS) and Ramp-To-Spike (RTS). The Ramp-
Soak-Spike profile was developed primarily for reflow
ovens heated by infrared radiation. With widespread
use of forced convection reflow ovens the Ramp-To-
Spike profile is used increasingly. Shown below in fig-
ure 3 is VISHAY's recommended profiles for use with
the TFBS4650 transceivers. For more details please
refer to Application note: SMD Assembly Instruction.
Wave Soldering
For TFDUxxxx and TFBSxxxx transceiver devices
wave soldering is not recommended.
280
260
240
220
200
180
T
e
m
p
e
r
a
t
u
r
e
/
°
C
160
140
120
100
80
60
40
20
0
0
T
≥
255 °C for 20 s max
T
peak
= 260 °C max.
T
≥
217 °C for 50 s max
20 s
120 s
50 s max.
2 °C...4 °C/s
2 °C...4 °C/s
50100150
Time/s
2
Figure3. Solder Profile, RSS Recommendation
Document Number 84672
Rev. 1.1, 03-Jul-06
127
TFBS4650
Vishay Semiconductors
Package Dimensions
19322
Figure4. TFBS4650 mechanical dimensions, tolerance ± 0.2 mm, if not otherwise mentioned
19729
Figure5. TFBS4650 soldering footprint, tolerance ± 0.2 mm, if not otherwise mentioned
128
Document Number 84672
Rev. 1.1, 03-Jul-06
TFBS4650
Vishay Semiconductors
Reel Dimensions
Drawing-No.: 9.800-5090.01-4
Issue: 1; 29.11.05
14017
Tape Width
mm
16
A max.
mm
330
N
mm
50
W
1
min.
mm
16.4
W
2
max.
mm
22.4
W
3
min.
mm
15.9
W
3
max.
mm
19.4
Document Number 84672
Rev. 1.1, 03-Jul-06
129
TFBS4650
Vishay Semiconductors
Tape Dimensions in mm
19783
130
Document Number 84672
Rev. 1.1, 03-Jul-06
TFBS4650
Vishay Semiconductors
Ozone Depleting Substances Policy Statement
It is the policy of Vishay Semiconductor GmbH to
all present and future national and international statutory requirements.
rly and continuously improve the performance of our products, processes, distribution and operating
systems with respect to their impact on the health and safety of our employees and the public, as well as
their impact on the environment.
It is particular concern to control or eliminate releases of those substances into the atmosphere which are
known as ozone depleting substances (ODSs).
The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs
and forbid their use within the next ten years. Various national and international initiatives are pressing for an
earlier ban on these substances.
Vishay Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use
of ODSs listed in the following documents.
A, B and list of transitional substances of the Montreal Protocol and the London Amendments
respectively
I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental
Protection Agency (EPA) in the USA
l Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively.
Vishay Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting
substances and do not contain such substances.
We reserve the right to make changes to improve technical design
and may do so without further notice.
Parameters can vary in different applications. All operating parameters must be validated for each
customer application by the customer. Should the buyer use Vishay Semiconductors products for any
unintended or unauthorized application, the buyer shall indemnify Vishay Semiconductors against all
claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal
damage, injury or death associated with such unintended or unauthorized use.
Vishay Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany
131
Document Number 84672
Rev. 1.1, 03-Jul-06
Legal Disclaimer Notice
Vishay
Notice
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc.,
or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's
terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express
or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness
for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify Vishay for any damages resulting from such improper use or sale.
Document Number: 91000
Revision: 08-Apr-05
1
2024年11月5日发(作者:晏实)
TFBS4650
Vishay Semiconductors
Infrared Transceiver
9.6 kbit/s to 115.2 kbit/s (SIR)
Description
The TFBS4650 is one of the smallest IrDA
®
compliant
transceivers available. It supports data rates up to
115 kbit/s. The transceiver consists of a PIN photo-
diode, infrared emitter, and control IC in a single pack-
age.
20206
Features
•Compliant with the IrDA physical layer
IrPHY 1.4 (low power specification,
9.6 kbit/s to 115.2 kbit/s)
e4
•Link distance: 30 cm/20 cm full 15°
cone
with standard or low power IrDA, respec-
tively. Emission intensity can be set by an external
resistor to increase the range for extended low
power spec to > 50 cm
•Typical transmission distance to standard device:
50 cm
•Small package -
L 6.8 mm x W 2.8 mm x H 1.6 mm
•Low current consumption
75 µA idle at 3.6 V
•Shutdown current 10 nA typical at 25 °C
•Operates from 2.4 V to 3.6 V within specification
over full temperature range from - 25 °C to + 85 °C
•Split power supply, emitter can be driven by a sep-
arate power supply not loading the regulated. U.S.
Pat. No. 6,157,476
•Lead (Pb)-free device
•Qualified for lead (Pb)-free and Sn/Pb processing
(MSL4)
•Device in accordance with RoHS 2002/95/EC and
WEEE 2002/96/EC
Applications
• Mobile phone
• PDAs
Parts Table
Part
TFBS4650-TR1
TFBS4650-TR3
Description
Oriented in carrier tape for side view surface mounting
Oriented in carrier tape for side view surface mounting
1000 pcs
2500 pcs
Qty / Reel
120
Document Number 84672
Rev. 1.1, 03-Jul-06
TFBS4650
Vishay Semiconductors
Functional Block Diagram
V
CC
PD
Amplifier
Comparator
Tri-State
Driver
RxD
SD
TxD
ASIC
Mode
Control
IRED Driver
IREDA
IRED
IREDC
GND
19283
Pin Description
Pin Number
1
2
3
Function
IREDA
IREDC
TXD
Description
IRED Anode, connected via a current limiting resistor to V
CC2
. A separate
unregulated power supply can be used.
IRED Cathode, do not connect for standard operation
Transmitter Data Input. Setting this input above the threshold turns on the
transmitter.
This input switches the IRED with the maximum transmit pulse width of
about 50 µs.
Receiver Output. Normally high, goes low for a defined pulse duration with
the rising edge of the optical input signal. Output is a CMOS tri-state driver,
which swings between ground and V
cc
. Receiver echoes transmitter output.
Shut Down. Logic Low at this input enables the receiver, enables the
transmitter, and un-tri-states the receiver output. It must be driven high for
shutting down the transceiver.
Power Supply, 2.4 V to 3.6 V. This pin provides power for the receiver and
transmitter drive section. Connect V
CC1
via an optional filter.
Ground
IHIGH
I/OActive
4RXD
OLOW
5SD
IHIGH
6
7
V
CC
GND
Pinout
TFBS4650, bottom view
weight 0.05 g
19284
Document Number 84672
Rev. 1.1, 03-Jul-06
121
TFBS4650
Vishay Semiconductors
Absolute Maximum Ratings
Reference point Pin, GND unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Parameter
Supply voltage range,
transceiver
Supply voltage range,
transmitter
Voltage at RXD
Test Conditions
0 V < V
CC2
< 6 V
0 V < V
CC1
< 3.6 V
All states
Symbol
V
CC1
V
CC2
V
in
V
in
Min
- 0.5
- 0.5
- 0.5
- 0.5
- 40
6.0
6.0
V
CC
+ 0.5
6.0
40
20
P
D
T
J
T
amb
T
stg
see section Recommended
Solder Profile
< 90 µs, t
on
< 20 %I
IRED
(RP)
I
IRED
(DC)
Method: (1-1/e) encircled
energy
IEC60825-1 or
EN60825-1,
edition Jan. 2001
d
I
e
0.8
*)
Unit
V
V
V
V
mA
mA
mW
°C
°C
°C
°C
Input voltage range, transmitter Independent of V
CC1
or V
CC2
TXD
Input currents
Output sinking current
Power dissipation
Junction temperature
Ambient temperature range
(operating)
Storage temperature range
Soldering temperature ***)
Repetitive pulse output current
Average output current
(transmitter)
Virtual source size
Maximum Intensity for Class 1
For all pins, except IRED anode
pin
250
125
- 25
- 40
+ 85
+ 100
500
100
mA
mA
mm
mW/sr
(500)
**)
*)
Due to the internal limitation measures the device is a "class1" device.
IrDA specifies the max. intensity with 500 mW/sr
**)
***)
Sn/Pb-free soldering. The product passed VISHAY’s standard convection reflow profile soldering test.
Definitions:
In the Vishay transceiver data sheets the following nomenclature is used for defining the IrDA operating modes:
SIR: 2.4 kbit/s to 115.2 kbit/s, equivalent to the basic serial infrared standard with the physical layer version IrPhY 1.0
MIR: 576 kbit/s to 1152 kbit/s
FIR: 4 Mbit/s
VFIR: 16 Mbit/s
MIR and FIR were implemented with IrPhY 1.1, followed by IrPhY 1.2, adding the SIR Low Power Standard. IrPhY 1.3 extended the Low
Power Option to MIR and FIR and VFIR was added with IrPhY 1.4. A new version of the standard in any case obsoletes the former version.
122
Document Number 84672
Rev. 1.1, 03-Jul-06
TFBS4650
Vishay Semiconductors
Electrical Characteristics
Transceiver
T
amb
= 25°C, V
CC
= 2.4 V to 3.6 V unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Parameter
Supply voltage range
Dynamic supply current
Idle, dark ambientSD = Low (< 0.8 V),
E
eamb
= 0 klx,
E
e
< 4 mW/m
2
- 25 °C ≤ T ≤ + 85 °C
Idle, dark ambientSD = Low (< 0.8 V),
E
eamb
= 0 klx,
E
e
< 4 mW/m
2
T = + 25 °C
Peak supply current during
transmission
Shutdown supply current
dark ambient
Shutdown supply current, dark
ambient
Operating temperature range
Input voltage low (TXD, SD)
Input voltage high
Input voltage threshold SD
Output voltage low
Output voltage high
RXD to V
CC
pull-up impedance
Input capacitance
(TXD, SD)
V
CC
= 2.4 V to 3.6 V
V
CC
= 2.4 V to 3.6 V
V
CC
= 2.4 V to 3.6 V
CLOAD = 15 pF
V
CC
= 2.4 V to 3.6 V
C
LOAD
= 15 pF
SD = V
CC
V
CC
= 2.4 V to 5 V
V
OL
V
OH
R
RXD
C
I
SD = Low, TXD = High
SD = High
(> V
CC
- 0.5 V),
T = 25 °C, Ee = 0 klx
SD = High
(> V
CC
- 0.5 V),
- 25 °C ≤ T ≤ + 85 °C
I
ccpk
I
SD
23
0.1
mA
µA
I
CC
75µA
I
CC
90130µA
Test ConditionsSymbol
V
CC
Min
2.4
3.6
Unit
V
I
SD
1.0µA
T
A
V
IL
V
IH
- 25
- 0.5
V
CC
- 0.5
0.9
- 0.5
V
CC
x 0.8
500
1.35
+ 85
0.5
6.0
1.8
V
CC
x 0.15
V
CC
+ 0.5
°C
V
V
V
V
V
kΩ
6pF
Document Number 84672
Rev. 1.1, 03-Jul-06
123
TFBS4650
Vishay Semiconductors
Optoelectronic Characteristics
Receiver
T
amb
= 25°C, V
CC
= 2.4 V to 3.6 V unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Parameter
Sensitivity:
Minimum irradiance Ee in
angular range *)**)
Maximum irradiance Ee in
angular range ***)
No receiver output input
irradiance
Rise time of output signal
Fall time of output signal
RXD pulse width of output
signal, 50%****)
Receiver start up time
Latency
*)
Test Conditions
9.6 kbit/s to 115.2 kbit/s
λ = 850 nm to 900 nm
λ = 850 nm to 900 nm
According to IrDA IrPHY 1.4,
Appendix A1, fluorescent light
specification
10 % to 90 %, C
L
= 15 pF
90 % to 10 %, C
L
= 15 pF
Input pulse width
1.63 µs
Power on delay
Symbol
E
e
MinTyp.
40
(4.0)
Max
81
(8.1)
Unit
mW/m
2
(µW/cm
2
)
kW/m
2
(mW/cm
2
)
mW/m
2
(µW/cm
2
)
E
e
E
e
5
(500)
4
(0.4)
20
20
1.72.0
100
100
100
2.9
150
200
t
r (RXD)
t
f (RXD)
t
PW
ns
ns
µs
µs
µst
L
50
This parameter reflects the backlight test of the IrDA physical layer specification to guarantee immunity against light from fluorescent
lamps
IrDA sensitivity definition: Minimum Irradiance E
e
In Angular Range, power per unit area. The receiver must meet the BER specification
while the source is operating at the minimum intensity in angular range into the minimum half-angle range at the maximum Link Length
Maximum Irradiance E
e
In Angular Range, power per unit area. The optical delivered to the detector by a source operating at the max-
imum intensity in angular range at Minimum Link Length must not cause receiver overdrive distortion and possible related link errors. If
placed at the Active Output Interface reference plane of the transmitter, the receiver must meet its bit error ratio (BER) specification.
****)
RXD output is edge triggered by the rising edge of the optical input signal. The output pulse duration is independent of the input pulse
***)
**)
duration.
For more definitions see the document “Symbols and Terminology” on the Vishay Website (/docs/82512/).
124
Document Number 84672
Rev. 1.1, 03-Jul-06
TFBS4650
Vishay Semiconductors
Transmitter
T
amb
= 25°C, V
CC
= 2.4 V to 3.6 V unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
ParameterTest ConditionsSymbol
I
D
Min
200
400
Unit
mAIRED operating current, current The IRED current is internally
controlledcontrolled but also can be
reduced by an external resistor
R1
Output leakage IRED current
Output radiant intensity *)
Tamb = 85°C
α = 0°, 15°, TXD = High, SD =
Low, V
CC1
= 3.0 V, V
CC2
= 3.0 V,
R1 = 30 Ω (resulting in about
50 mA drive current)
α = 0°, 15°, TXD = High, SD =
Low, V
CC1
= 3.0 V, V
CC2
= 3.0 V,
R1 = 0 Ω, If = 300 mA
V
CC1
= 5.0 V, α = 0°, 15°
TXD = Low or SD = High
(Receiver is inactive as long as
SD = High)
V
CC
= 3.0 V, If = 50 mA
I
IRED
I
e
4
1
150
µA
mW/sr
Output radiant intensity *)
I
e
25mW/sr
Output radiant intensity *)I
e
0.04mW/sr
Saturation voltage of IRED
driver
Peak - emission wavelength
Optical rise time,
Optical fall time
Optical output pulse duration
Optical output pulse duration
Optical overshoot
*)
V
CEsat
λ
p
t
ropt
,
t
fopt
880
20
0.4
886900
100
t
50
1.61
V
nm
ns
µs
µs
µs
%
Input pulse width t < 30 µs
Input pulse width t ≥ 30 µs
Input pulse width t = 1.63 µs
t
opt
t
opt
t
opt
30
1.45
300
2.2
20
The radiant intensity can be adjusted by the external current limiting resistor to adapt the intensity to the desired value. The given value
is for minimum current consumption. This transceiver can be adapted to > 50 cm operation by increasing the current to > 200 mA, e.g.
operating the transceiver without current control resistor (i.e. R1 = 0 Ω) and using the internal current control.
Table 1.
Truth table
Inputs
SD
high
low
low
low
low
low
TXD
x
high
high > 50 µs
low
low
low
Optical input Irradiance mW/m
2
x
x
x
< 4
> Min. irradiance E
e
< Max. irradiance E
e
> Max. irradiance E
e
RXD
Tri-state floating with a weak
pull-up to the supply voltage
low (echo on)
high
low (active)
x
Outputs
Transmitter
0
I
e
0
0
0
high 0
Document Number 84672
Rev. 1.1, 03-Jul-06
125
TFBS4650
Vishay Semiconductors
Recommended Circuit Diagram
Operated at a clean low impedance power supply the
TFBS4650 needs only one additional external com-
ponent when the IRED drive current should be mini-
mized for minimum current consumption according
the low power IrDA standard. When combined opera-
tion in IrDA and Remote Control is intended no cur-
rent limiting resistor is recommended.
However, depending on the entire system design and
board layout, additional components may be required
(see figure 1). When long wires are used for bench
tests, the capacitors are mandatory for testing rise/fall
time correctly.
recommended to position C2 as close as possible to
the transceiver power supply pins.
When connecting the described circuit to the power
supply, low impedance wiring should be used.
In case of extended wiring the inductance of the
power supply can cause dynamically a voltage drop
at V
CC2
. Often some power supplies are not able to
follow the fast current is rise time. In that case another
10 µF cap at V
CC2
will be helpful.
Keep in mind that basic RF-design rules for circuit
design should be taken into account. Especially
longer signal lines should not be used without termina-
tion. "The Art of Electronics" Paul Horowitz,
Wienfield Hill, 1989, Cambridge University Press,
ISBN: .
V
CC2
V
CC1
GND
SD
Txd
Rxd
R1
R2
C2
IRED Anode
IRED Cathode
V
CC
Ground
SD
Txd
Rxd
C1
Table 2.
Recommended Application Circuit Components
Component
C1, C2
R1
R2
19286
Recommended Value
0.1 µF, Ceramic Vishay part#
VJ 1206 Y 104 J XXMT
See table 3
47 Ω, 0.125 W (V
CC1
= 3 V)
Figure1. Recommended Application Circuit
Table 3.
Recommended resistor R1 [Ω]
V
CC2
[V]
2.7
3.0
3.3
Minimized current consumption,
IrDA Low power compliant
24
30
36
The capacitor C1 is buffering the supply voltage V
cc2
and eliminates the inductance of the power supply
line. This one should be a small ceramic version or
other fast capacitor to guarantee the fast rise time of
the IRED current. The resistor R1 is necessary for
controlling the IRED drive current when the internally
controlled current is too high for the application.
Vishay transceivers integrate a sensitive receiver and
a built-in power driver. The combination of both needs
a careful circuit board layout. The use of thin, long,
resistive and inductive wiring should be avoided. The
inputs (TXD, SD) and the output RXD should be
directly (DC) coupled to the I/O circuit.
The capacitor C2 combined with the resistor R2 is the
low pass filter for smoothing the supply voltage.
As already stated above R2, C1 and C2 are optional
and depend on the quality of the supply voltages V
CCx
and injected noise. An unstable power supply with
dropping voltage during transmission may reduce the
sensitivity (and transmission range) of the trans-
ceiver.
The placement of these parts is critical. It is strongly
126
Document Number 84672
Rev. 1.1, 03-Jul-06
TFBS4650
Vishay Semiconductors
Recommended Solder Profiles
Solder Profile for Sn/Pb soldering
Manual Soldering
Manual soldering is the standard method for lab use.
However, for a production process it cannot be rec-
ommended because the risk of damage is highly
dependent on the experience of the operator. Never-
theless, we added a chapter to the above mentioned
application note, describing manual soldering and
desoldering.
Storage
The storage and drying processes for all VISHAY
transceivers (TFDUxxxx and TFBSxxx) are equiva-
lent to MSL4.
The data for the drying procedure is given on labels
on the packing and also in the application note
"Taping, Labeling, Storage and Packing"
(/docs/82601/).
260
240
220
200
180
10 s max. at 230 °C
240 °C max.
2...4 °C/s
160 °C max.
T
e
m
p
e
r
a
t
u
r
e
/
°
C
160
140
120
100
80
60
40
20
0
0 50 100 150 200 250 300 350
180 s
90 s max.
2...4 °C/s
Time/s
19431
Figure2. Recommended Solder Profile for Sn/Pb soldering
Lead (Pb)-Free, Recommended Solder Profile
The TFBS4650 is a lead (Pb)-free transceiver and
qualified for lead (Pb)-free processing. For lead
(Pb)-free solder paste like Sn(3.0-4.0)Ag(0.5-0.9)Cu,
there are two standard reflow profiles: Ramp-Soak-
Spike (RSS) and Ramp-To-Spike (RTS). The Ramp-
Soak-Spike profile was developed primarily for reflow
ovens heated by infrared radiation. With widespread
use of forced convection reflow ovens the Ramp-To-
Spike profile is used increasingly. Shown below in fig-
ure 3 is VISHAY's recommended profiles for use with
the TFBS4650 transceivers. For more details please
refer to Application note: SMD Assembly Instruction.
Wave Soldering
For TFDUxxxx and TFBSxxxx transceiver devices
wave soldering is not recommended.
280
260
240
220
200
180
T
e
m
p
e
r
a
t
u
r
e
/
°
C
160
140
120
100
80
60
40
20
0
0
T
≥
255 °C for 20 s max
T
peak
= 260 °C max.
T
≥
217 °C for 50 s max
20 s
120 s
50 s max.
2 °C...4 °C/s
2 °C...4 °C/s
50100150
Time/s
2
Figure3. Solder Profile, RSS Recommendation
Document Number 84672
Rev. 1.1, 03-Jul-06
127
TFBS4650
Vishay Semiconductors
Package Dimensions
19322
Figure4. TFBS4650 mechanical dimensions, tolerance ± 0.2 mm, if not otherwise mentioned
19729
Figure5. TFBS4650 soldering footprint, tolerance ± 0.2 mm, if not otherwise mentioned
128
Document Number 84672
Rev. 1.1, 03-Jul-06
TFBS4650
Vishay Semiconductors
Reel Dimensions
Drawing-No.: 9.800-5090.01-4
Issue: 1; 29.11.05
14017
Tape Width
mm
16
A max.
mm
330
N
mm
50
W
1
min.
mm
16.4
W
2
max.
mm
22.4
W
3
min.
mm
15.9
W
3
max.
mm
19.4
Document Number 84672
Rev. 1.1, 03-Jul-06
129
TFBS4650
Vishay Semiconductors
Tape Dimensions in mm
19783
130
Document Number 84672
Rev. 1.1, 03-Jul-06
TFBS4650
Vishay Semiconductors
Ozone Depleting Substances Policy Statement
It is the policy of Vishay Semiconductor GmbH to
all present and future national and international statutory requirements.
rly and continuously improve the performance of our products, processes, distribution and operating
systems with respect to their impact on the health and safety of our employees and the public, as well as
their impact on the environment.
It is particular concern to control or eliminate releases of those substances into the atmosphere which are
known as ozone depleting substances (ODSs).
The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs
and forbid their use within the next ten years. Various national and international initiatives are pressing for an
earlier ban on these substances.
Vishay Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use
of ODSs listed in the following documents.
A, B and list of transitional substances of the Montreal Protocol and the London Amendments
respectively
I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental
Protection Agency (EPA) in the USA
l Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively.
Vishay Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting
substances and do not contain such substances.
We reserve the right to make changes to improve technical design
and may do so without further notice.
Parameters can vary in different applications. All operating parameters must be validated for each
customer application by the customer. Should the buyer use Vishay Semiconductors products for any
unintended or unauthorized application, the buyer shall indemnify Vishay Semiconductors against all
claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal
damage, injury or death associated with such unintended or unauthorized use.
Vishay Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany
131
Document Number 84672
Rev. 1.1, 03-Jul-06
Legal Disclaimer Notice
Vishay
Notice
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc.,
or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's
terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express
or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness
for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify Vishay for any damages resulting from such improper use or sale.
Document Number: 91000
Revision: 08-Apr-05
1