2024年3月10日发(作者：敛文赋)

专利内容由知识产权出版社提供

专利名称：Semiconductor device and method of

fabricating the same

发明人：Hiroyuki Umimoto,Shinji Odanaka

申请号：US09996932

申请日：20011130

公开号：US06667216B2

公开日：20031223

专利附图：

摘要：A gate electrode is formed on a semiconductor substrate with a gate insulating

film interposed therebetween. A channel region composed of a first-conductivity-type

semiconductor layer is formed in a region of a surface portion of the semiconductor

substrate located below the gate electrode. Source/drain regions each composed of a

second-conductivity-type impurity layer are formed in regions of the surface portion of

the semiconductor substrate located on both sides of the gate electrode. Second-

conductivity-type extension regions are formed between the channel region and

respective upper portion of the source/drain regions in contact relation with the

source/drain regions. First-conductivity-type pocket regions are formed between the

channel region and respective lower portion of the source/drain regions in contact

relation with the source/drain regions and in spaced relation to the gate insulating film.

申请人：MATSUSHITA ELECTRONICS CORPORATION

代理机构：Nixon & Peabody, LLP

更多信息请下载全文后查看

2024年3月10日发(作者：敛文赋)

专利内容由知识产权出版社提供

专利名称：Semiconductor device and method of

fabricating the same

发明人：Hiroyuki Umimoto,Shinji Odanaka

申请号：US09996932

申请日：20011130

公开号：US06667216B2

公开日：20031223

专利附图：

摘要：A gate electrode is formed on a semiconductor substrate with a gate insulating

film interposed therebetween. A channel region composed of a first-conductivity-type

semiconductor layer is formed in a region of a surface portion of the semiconductor

substrate located below the gate electrode. Source/drain regions each composed of a

second-conductivity-type impurity layer are formed in regions of the surface portion of

the semiconductor substrate located on both sides of the gate electrode. Second-

conductivity-type extension regions are formed between the channel region and

respective upper portion of the source/drain regions in contact relation with the

source/drain regions. First-conductivity-type pocket regions are formed between the

channel region and respective lower portion of the source/drain regions in contact

relation with the source/drain regions and in spaced relation to the gate insulating film.

申请人：MATSUSHITA ELECTRONICS CORPORATION

代理机构：Nixon & Peabody, LLP

更多信息请下载全文后查看