2024年3月12日发(作者：郗骊娟)
Chapter 1:Packaging Overview
Device/Package Combinations
Table1-1 shows the size and BGA pitch of the UltraScale and UltraScale+ device packages.
The devices with stacked-silicon interconnect (SSI) technology are labeled.
IMPORTANT:
All packages are available with eutectic BGA balls. To order these packages, the device
type starts with an XQ vs. XC, and the third digit in the package name is Q (for example: FFQA1156).
UltraScale Device Packaging and Pinouts
UG575 (v1.14) March 18, 2020
Chapter 1:Packaging Overview
Table 1-1:Package Specifications (Cont’d)
Description
SSI, flip-chip, fine-pitch, lidless with stiffener ring
SSI, flip-chip, fine-pitch, lidless with stiffener ring
Packages
(1)
FSVA3824
FSVB3824
Package Specifications
Package TypePitch (mm)
BGA
BGA
1.0
1.0
Size (mm)
65x65
65x65
UltraScale Device Packaging and Pinouts
UG575 (v1.14) March 18, 2020
Chapter 1:Packaging Overview
Table 1-2:
XQVU3P
XQVU7P
XQVU7P
XQVU11P
Serial Transceiver Channels (GTH/GTY) by Device/Package (Cont’d)
Package
FFRC1517
FLRA2104
FLRB2104
FLRC2104
DeviceGTH Channels
0
0
0
0
GTY Channels
40
52
76
96
UltraScale Device Packaging and Pinouts
UG575 (v1.14) March 18, 2020
Chapter 1:Packaging Overview
Table 1-4:Available I/O Pins by Device/Package (Cont’d)
Package
Total User I/O
HD
(1)
48
48
72
72
96
96
96
FFVD90096
96
FFVE900
FFVA1156
FFVE1517
FFVA1760
FFVE1760
FFRB676
SFRB784
FFRA1156
FFRE1517
96
96
48
48
96
96
96
96
72
96
48
96
Device
Kintex UltraScale+ Devices
XCKU3P
XCKU5P
XCKU3P
XCKU5P
XCKU3P
XCKU5P
XCKU3P
XCKU5P
XCKU11P
XCKU9P
XCKU13P
XCKU11P
XCKU15P
XCKU11P
XCKU15P
XCKU15P
XCKU15P
XQKU5P
XQKU5P
XQKU15P
XQKU15P
Differential I/O
HP
(1)
208
208
208
208
208
208
208
208
312
208
208
416
468
416
416
416
572
208
208
468
416
HR
(1)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
HD
48
48
72
72
96
96
96
96
96
96
96
48
48
96
96
96
96
72
96
48
96
HR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
HP
192
192
192
192
192
192
192
192
288
192
192
384
432
384
384
384
528
192
192
432
384
FFVA676
FFVB676
SFVB784
Virtex UltraScale+ Devices
XCVU3P
XCVU11P
XCVU31P
XCVU5P
XCVU7P
XCVU9P
XCVU13P
XCVU5P
XCVU7P
FFVC1517
FLGF1924
FSVH1924
FLVA2104
FLGA2104
FHGA2104
FLVB2104
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
520
624
208
832
832
832
832
702
702
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
480
576
192
768
768
768
768
648
648
UltraScale Device Packaging and Pinouts
UG575 (v1.14) March 18, 2020
Chapter 1:Packaging Overview
Table 1-4:Available I/O Pins by Device/Package (Cont’d)
Package
FLGB2104
FHGB2104
FLVC2104
FLGC2104
FHGC2104
FSGD2104
FIGD2104
FIGD2104
Device
XCVU9P
XCVU11P
XCVU13P
XCVU5P
XCVU7P
XCVU9P
XCVU11P
XCVU13P
XCVU9P
XCVU11P
XCVU13P
XCVU27P
XCVU29P
XCVU33P
XCVU35P
XCVU45P
XCVU9P
XCVU11P
XCVU13P
XCVU13P
XCVU27P
XCVU29P
XCVU35P
XCVU37P
XCVU45P
XCVU47P
XCVU19P
XQVU3P
XQVU7P
XQVU7P
XQVU11P
Notes:
Total User I/O
HD
(1)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Differential I/O
HP
(1)
702
572
702
416
416
416
416
416
676
572
676
520
676
208
416
416
448
448
448
448
292
448
416
624
416
624
1976
1664
520
832
702
416
HR
(1)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
HD
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
HR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
HP
648
528
648
384
384
384
384
384
624
528
624
240
312
192
384
384
414
414
414
414
134
206
384
576
384
576
1824
1536
480
768
648
384
FSVH2104
FLGA2577
FSGA2577
FSGA2577
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
FSVH2892
FSVA3824
FSVB3824
FFRC1517
FLRA2104
FLRB2104
FLRC2104
maximum user I/O numbers do not include pins in the configuration bank 0 or the GT serial transceivers.
UltraScale Device Packaging and Pinouts
UG575 (v1.14) March 18, 2020
2024年3月12日发(作者：郗骊娟)
Chapter 1:Packaging Overview
Device/Package Combinations
Table1-1 shows the size and BGA pitch of the UltraScale and UltraScale+ device packages.
The devices with stacked-silicon interconnect (SSI) technology are labeled.
IMPORTANT:
All packages are available with eutectic BGA balls. To order these packages, the device
type starts with an XQ vs. XC, and the third digit in the package name is Q (for example: FFQA1156).
UltraScale Device Packaging and Pinouts
UG575 (v1.14) March 18, 2020
Chapter 1:Packaging Overview
Table 1-1:Package Specifications (Cont’d)
Description
SSI, flip-chip, fine-pitch, lidless with stiffener ring
SSI, flip-chip, fine-pitch, lidless with stiffener ring
Packages
(1)
FSVA3824
FSVB3824
Package Specifications
Package TypePitch (mm)
BGA
BGA
1.0
1.0
Size (mm)
65x65
65x65
UltraScale Device Packaging and Pinouts
UG575 (v1.14) March 18, 2020
Chapter 1:Packaging Overview
Table 1-2:
XQVU3P
XQVU7P
XQVU7P
XQVU11P
Serial Transceiver Channels (GTH/GTY) by Device/Package (Cont’d)
Package
FFRC1517
FLRA2104
FLRB2104
FLRC2104
DeviceGTH Channels
0
0
0
0
GTY Channels
40
52
76
96
UltraScale Device Packaging and Pinouts
UG575 (v1.14) March 18, 2020
Chapter 1:Packaging Overview
Table 1-4:Available I/O Pins by Device/Package (Cont’d)
Package
Total User I/O
HD
(1)
48
48
72
72
96
96
96
FFVD90096
96
FFVE900
FFVA1156
FFVE1517
FFVA1760
FFVE1760
FFRB676
SFRB784
FFRA1156
FFRE1517
96
96
48
48
96
96
96
96
72
96
48
96
Device
Kintex UltraScale+ Devices
XCKU3P
XCKU5P
XCKU3P
XCKU5P
XCKU3P
XCKU5P
XCKU3P
XCKU5P
XCKU11P
XCKU9P
XCKU13P
XCKU11P
XCKU15P
XCKU11P
XCKU15P
XCKU15P
XCKU15P
XQKU5P
XQKU5P
XQKU15P
XQKU15P
Differential I/O
HP
(1)
208
208
208
208
208
208
208
208
312
208
208
416
468
416
416
416
572
208
208
468
416
HR
(1)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
HD
48
48
72
72
96
96
96
96
96
96
96
48
48
96
96
96
96
72
96
48
96
HR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
HP
192
192
192
192
192
192
192
192
288
192
192
384
432
384
384
384
528
192
192
432
384
FFVA676
FFVB676
SFVB784
Virtex UltraScale+ Devices
XCVU3P
XCVU11P
XCVU31P
XCVU5P
XCVU7P
XCVU9P
XCVU13P
XCVU5P
XCVU7P
FFVC1517
FLGF1924
FSVH1924
FLVA2104
FLGA2104
FHGA2104
FLVB2104
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
520
624
208
832
832
832
832
702
702
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
480
576
192
768
768
768
768
648
648
UltraScale Device Packaging and Pinouts
UG575 (v1.14) March 18, 2020
Chapter 1:Packaging Overview
Table 1-4:Available I/O Pins by Device/Package (Cont’d)
Package
FLGB2104
FHGB2104
FLVC2104
FLGC2104
FHGC2104
FSGD2104
FIGD2104
FIGD2104
Device
XCVU9P
XCVU11P
XCVU13P
XCVU5P
XCVU7P
XCVU9P
XCVU11P
XCVU13P
XCVU9P
XCVU11P
XCVU13P
XCVU27P
XCVU29P
XCVU33P
XCVU35P
XCVU45P
XCVU9P
XCVU11P
XCVU13P
XCVU13P
XCVU27P
XCVU29P
XCVU35P
XCVU37P
XCVU45P
XCVU47P
XCVU19P
XQVU3P
XQVU7P
XQVU7P
XQVU11P
Notes:
Total User I/O
HD
(1)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Differential I/O
HP
(1)
702
572
702
416
416
416
416
416
676
572
676
520
676
208
416
416
448
448
448
448
292
448
416
624
416
624
1976
1664
520
832
702
416
HR
(1)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
HD
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
HR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
HP
648
528
648
384
384
384
384
384
624
528
624
240
312
192
384
384
414
414
414
414
134
206
384
576
384
576
1824
1536
480
768
648
384
FSVH2104
FLGA2577
FSGA2577
FSGA2577
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
FSVH2892
FSVA3824
FSVB3824
FFRC1517
FLRA2104
FLRB2104
FLRC2104
maximum user I/O numbers do not include pins in the configuration bank 0 or the GT serial transceivers.
UltraScale Device Packaging and Pinouts
UG575 (v1.14) March 18, 2020