2024年4月12日发(作者：资惜天)
®
SP202E/232E/233E/310E/312E
High-Performance RS-232
Line Drivers/Receivers
■Operates from Single +5V Power Supply
■Meets All RS-232D and ITU V.28
Specifications
■Operates with 0.1µF to 10µF Capacitors
■High Data Rate – 120Kbps Under Load
■Low Power Shutdown ≤1µA (Typical)
■3-State TTL/CMOS Receiver Outputs
■Low Power CMOS – 3mA Operation
■Improved ESD Specifications:
±15kV Human Body Model
±15kV IEC1000-4-2 Air Discharge
±8kV IEC1000-4-2 Contact Discharge
C
1
+
V+
C
1
-
C
2
+
C
2
-
V-
T
2
OUT
R
2
IN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
GND
T
1
OUT
R
1
IN
R
1
OUT
T
1
IN
T
2
IN
R
2
OUT
Now Available in Lead Free Packaging
The SP202E/232E/233E/310E/312E devices are a family of line driver and receiver pairs that
meet the specifications of RS-232 and V.28 serial protocols with enhanced ESD performance.
The ESD tolerance has been improved on these devices to over ±15KV for both Human Body
Model and IEC1000-4-2 Air Discharge Method. These devices are pin-to-pin compatible with
Sipex's SP232A/233A/310A/312A devices as well as popular industry standards. As with the
initial versions, the SP202E/232E/233E/310E/312E devices feature at least 120Kbps data rate
under load, 0.1µF charge pump capacitors, and overall ruggedness for commercial applications.
This family also features Sipex's BiCMOS design allowing low power operation without
sacrificing performance. The series is available in plastic DIP and SOIC packages operating over
the commercial and industrial temperature ranges.
SELECTION TABLE
Model
SP202E
SP232E
SP233E
SP310E
SP312E
Number of RS232
DriversReceivers
22
22
22
22
22
No. of ReceiversNo. of External
Active in Shutdown0.1µF Capacitors
0 4
0 4
0 0
0 4
2 4
ShutdownWakeUp TTL Tri–State
NoNoNo
NoNoNo
NoNoNo
YesNoYes
YesYesYes
SP202E
DESCRIPTION
Date: 7/19/04SP202E Series High Performance RS232 Transceivers© Copyright 2004 Sipex Corporation
1
ABSOLUTE MAXIMUM RATINGS
This is a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the operation
sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of time may affect
reliability.
V
cc
.................................................................................................................................................................
+6V
V
+
....................................................................................................................
(Vcc-0.3V) to +11.0V
V
-
............................................................................................................................................................
-11.0V
Input Voltages
T
IN
.........................................................................................................................
-0.3 to (Vcc +0.3V)
R
IN
............................................................................................................................................................
±15V
Output Voltages
T
OUT
....................................................................................................
(V+, +0.3V) to (V-, -0.3V)
R
OUT
................................................................................................................
-0.3V to (Vcc +0.3V)
Short Circuit Duration
T
OUT
.........................................................................................................................................
Continuous
375mW
(derate 7mW/°C above +70°C)
375mW
(derate 7mW/°C above +70°C)
ELECTRICAL CHARACTERISTICS
V
CC
=+5V±10%; 0.1µF charge pump capacitors; T
MIN
to T
MAX
unless otherwise noted.
PARAMETERS
TTL INPUT
Logic Threshold
LOW
HIGH
Logic Pull-Up Current
TTL OUTPUT
TTL/CMOS Output
Voltage, Low
Voltage, High
Leakage Current **; T
A
= +25°
RS-232 OUTPUT
Output Voltage Swing
Output Resistance
Output Short Circuit Current
Maximum Data Rate
RS-232 INPUT
Voltage Range
Voltage Threshold
LOW
HIGH
Hysteresis
Resistance
ONDITIONS
0.8
2.0
15200
Volts
Volts
µA
T
IN
; EN, SD
T
IN
; EN, SD
T
IN
= 0V
I
OUT
= 3.2mA; Vcc = +5V
I
OUT
= -1.0mA
EN = V
CC
, 0V≤V
OUT
≤V
CC
All transmitter outputs loaded
with 3kΩ to Ground
V
CC
= 0V; V
OUT
= ±2V
Infinite duration
C
L
= 2500pF, R
L
= 3kΩ
0.4
3.5
0.05
±5
300
120
-15
0.8
0.2
3
1.2
1.7
0.5
5
±18
240
+15
2.8
1.0
7
±6
±10
Volts
Volts
µA
Volts
Ohms
mA
Kbps
Volts
Volts
Volts
Volts
kΩ
V
CC
= 5V, T
A
= +25°C
V
CC
= 5V, T
A
= +25°C
V
CC
= 5V, T
A
= +25°C
T
A
= +25°C, -15V ≤ V
IN
≤ +15V
TTL to RS-232; C
L
= 50pF
RS-232 to TTL
C
L
= 10pF, R
L
= 3-7kΩ;
T
A
=+25°C
C
L
= 2500pF, R
L
= 3kΩ;
measured from +3V to -3V
or -3V to +3V
SP310E and SP312E only
SP310E and SP312E only
No load, T
A
= +25°C; V
CC
= 5V
All transmitters R
L
= 3kΩ;
T
A
= +25°C
V
CC
= 5V, T
A
= +25°C
DYNAMIC CHARACTERISTICS
Driver Propagation Delay
Receiver Propagation Delay
Instantaneous Slew Rate
Transition Region Slew Rate
Output Enable Time **
Output Disable Time **
POWER REQUIREMENTS
V
CC
Power Supply Current
Shutdown Supply Current **
**SP310E and SP312E only
1.5
0.1
10
400
250
3
15
1
3.0
1.0
30
µs
µs
V/µs
V/µs
ns
ns
5
5
mA
mA
µA
Date: 7/19/04SP202E Series High Performance RS232 Transceivers© Copyright 2004 Sipex Corporation
2
PERFORMANCE CURVES
-11
-10
10
12
30
25
20
I
C
C
(
m
A
)
9.0
8.5
-9
V
–
V
o
l
t
a
g
e
(
V
o
l
t
s
)
V
CC
= 6V
-8
-7
-6
-5
-4
-3
0246
V
CC
= 6V
V
+
(
V
o
l
t
s
)
8
6
4
2
0
V
CC
= 5V
V
CC
= 4V
V
CC
= 6V
V
O
H
(
V
o
l
t
s
)
8.0
7.5
7.0
6.5
6.0
5.5
Load current = 0mA
T
A
= 25°C
V
CC
= 5V
15
V
CC
= 5V
10
V
CC
= 4V
5
V
CC
= 3V
0
-55
V
CC
= 4V
8101214
Load Current (mA)
05101520
25303540
-4
5.0
4.54.755.0
V
CC
(Volts)
5.255.5
Load Current (mA)
Temperature (°C)
PINOUTS
C
1
+
V+
C
1
-
C
2
+
C
2
-
V-
T
2
OUT
R
2
IN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
GND
T
1
OUT
R
1
IN
R
1
OUT
T
1
IN
T
2
IN
R
2
OUT
C
1
+
V+
C
1
-
C
2
+
C
2
-
V-
T
2
OUT
R
2
IN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
GND
T
1
OUT
R
1
IN
R
1
OUT
T
1
IN
T
2
IN
R
2
OUT
SP202E
SP232E
T
2
IN
T
1
IN
R
1
OUT
R
1
IN
T
1
OUT
GND
V
CC
V+
GND
1
2
3
20
19
18
R
2
OUT
R
2
IN
T
2
OUT
V-
C
2
-
C
2
+
C
1
–
C
1
+
C
2
+
C
2
–
N.C./EN
C1+
V+
C1-
C2+
C2-
V-
T2OUT
R2IN
1
2
20
19
SHDN
V
CC
GND
SP310E_A/312E_A
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
SP233ECT
4
5
6
7
8
9
17
16
15
14
13
12
11
T1OUT
R1IN
R1OUT
N.C.
T1IN
T2IN
N.C.
V–
10
20-PIN SOIC
R2OUT
10
20-PIN SSOP
NC
*
C
1
+
V+
C
1
-
C
2
+
C
2
-
V-
T
2
OUT
R
2
IN
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
ON/OFF
V
CC
GND
T
1
OUT
R
1
IN
R
1
OUT
T
1
IN
T
2
IN
R
2
OUT
EN
*
C
1
+
V+
C
1
-
C
2
+
C
2
-
V-
T
2
OUT
R
2
IN
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
SHUTDOWN
V
CC
GND
T
1
OUT
R
1
IN
R
1
OUT
T
1
IN
T
2
IN
R
2
OUT
SP312E
SP310E
*
N.C. for SP310E_A, EN for SP312E_A
Date: 7/19/04SP202E Series High Performance RS232 Transceivers© Copyright 2004 Sipex Corporation
3
FEATURES…
The SP202E/232E/233E/310E/312E devices
are a family of line driver and receiver pairs that
meet the specifications of RS-232 and V.28
serial protocols with enhanced ESD perfor-
mance. The ESD tolerance has been improved
on these devices to over ±15KV for both Human
Body Model and IEC1000-4-2 Air Discharge
Method. These devices are pin-to-pin compat-
ible with Sipex's 232A/233A/310A/312A
devices as well as popular industry standards.
As with the initial versions, the SP202E/232E/
233E/310E/312E devices feature10V/µs slew
rate, 120Kbps data rate under load, 0.1µF
charge pump capacitors, overall ruggedness
for commercial applications, and increased drive
current for longer and more flexible cable
configurations. This family also features Sipex's
BiCMOS design allowing low power operation
without sacrificing performance.
The SP202E/232E/233E/310E/312E devices
have internal charge pump voltage converters
which allow them to operate from a single +5V
supply. The charge pumps will operate with
polarized or non-polarized capacitors ranging
from 0.1 to 10 µF and will generate the ±6V
needed to generate the RS-232 output levels.
Both meet all EIA RS-232 and ITU V.28
specifications.
The SP310E provides identical features as the
SP232E with a single control line which
simultaneously shuts down the internal DC/DC
converter and puts all transmitter and receiver
outputs into a high impedance state. The SP312E
is identical to the SP310E with separate tri-state
and shutdown control lines.
THEORY OF OPERATION
The SP232E, SP233E, SP310E and SP312E
devices are made up of three basic circuit blocks –
1) a driver/transmitter, 2) a receiver and 3) a charge
pump. Each block is described below.
Driver/Transmitter
The drivers are inverting transmitters, which ac-
cept TTL or CMOS inputs and output the RS-232
signals with an inverted sense relative to the input
logic levels. Typically the RS-232output voltage
swing is ±6V. Even under worst case loading
conditions of 3kOhms and 2500pF, the output is
guaranteed to be ±5V, which is consistent with the
RS-232 standard specifications. The transmitter
outputs are protected against infinite short-circuits
to ground without degradation in reliability.
+5V INPUT
10 F 6.3V
µ
+
1
0.1 F
µ
+
6.3V
3
4
16
C +
1
V
CC
V+
0.1 F 6.3V
µ
2
+
C -
1
C +
2
*
Charge Pump
V-
6
0.1 F
µ
+
16V
5
T
T
L
/
C
M
O
S
O
U
T
P
U
T
S
T
T
L
/
C
M
O
S
I
N
P
U
T
S
+
0.1 F
µ
16V
C -
2
400k
Ω
T IN
1
11
T
1
400k
Ω
14
T OUT
1
T IN
2
10
T
2
R
1
5k
Ω
7
T OUT
2
R OUT
1
R IN
1
R OUT
2
9
SP202E
SP232E
R
2
5k
Ω
8
R IN
2
GND
15
*The negative terminal of the V+ storage capacitor can be tied
to either V
CC
or GND. Connecting the capacitor to V
CC
(+5V)
is recommended.
Figure 1. Typical Circuit using the SP202E or SP232E.
Date: 7/19/04SP202E Series High Performance RS232 Transceivers
R
S
-
2
3
2
I
N
P
U
T
S
1213
R
S
-
2
3
2
O
U
T
P
U
T
S
© Copyright 2004 Sipex Corporation
4
+5V INPUT
7
T
T
L
/
C
M
O
S
O
U
T
P
U
T
S
T
T
L
/
C
M
O
S
I
N
P
U
T
S
V
CC
T IN
1
2
400k
Ω
T
1
T
2
5
T OUT
1
T IN
2
1
400k
Ω
18
T OUT
2
R OUT
1
R
1
5k
Ω
R IN
1
R OUT
2
20
13
C +
1
14
10
17
8
R
2
5k
Ω
C -
1
V-
V-
V+
2
19
R IN
2
Do not make
connection to
these pins
Internal
-10V Power
Supply
Internal
+10V Power
Supply
C +
12
15
C +
2
SP233ECT
GNDGND
69
C -
2
2
C -
11
16
Figure 2. Typical Circuits using the SP233ECP and SP233ECT
The instantaneous slew rate of the transmitter
output is internally limited to a maximum of 30V/
µs in order to meet the standards [EIA RS-232-D
2.1.7, Paragraph (5)]. However, the transition re-
gion slew rate of these enhanced products is typi-
cally 10V/µs. The smooth transition of the loaded
output from V
OL
to V
OH
clearly meets the mono-
tonicity requirements of the standard [EIA
RS-232-D 2.1.7, Paragraphs (1) & (2)].
Receivers
The receivers convert RS-232 input signals to
inverted TTL signals. Since the input is usually
from a transmission line, where long cable lengths
and system interference can degrade the signal, the
inputs have a typical hysteresis margin of 500mV.
This ensures that the receiver is virtually immune
to noisy transmission lines.
The input thresholds are 0.8V minimum and 2.4V
maximum, again well within the ±3V RS-232
requirements. The receiver inputs are also pro-
tected against voltages up to ±15V. Should an
input be left unconnected, a 5KOhm pulldown
resistor to ground will commit the output of the
receiver to a high state.
R
S
-
2
3
2
I
N
P
U
T
S
34
R
S
-
2
3
2
O
U
T
P
U
T
S
+5V INPUT
10 F 6.3V
µ
+5V INPUT
10 F 6.3V
µ
+
+
2
0.1 F
µ
+
6.3V
4
5
17
C +
1
V
CC
V+
3
+
0.1 µF
16V
2
17
C -
1
C +
2
*
+
0.1 µF
16V
T
T
L
/
C
M
O
S
I
N
P
U
T
S
0.1 F
µ
+
6.3V
4
5
C +
1
V
CC
V+
0.1 F
µ
16V
3
+
C -
1
C +
2
*
16V
Charge Pump
V-
7
Charge Pump
V-
7
0.1 F
µ
+
16V
6
C -
2
400k
Ω
0.1 F
µ
+
16V
6
+
0.1 F
µ
C -
2
400k
Ω
T
T
L
/
C
M
O
S
O
U
T
P
U
T
S
T
T
L
/
C
M
O
S
I
N
P
U
T
S
R
S
-
2
3
2
O
U
T
P
U
T
S
T IN
1
12
T
1
400k
Ω
15
T OUT
1
T IN
1
12
T
1
400k
Ω
15
T OUT
1
T IN
2
11
T
2
R
1
5k
Ω
8
T OUT
2
T IN
2
11
T
2
8
T OUT
2
R OUT
1
R
1
5k
Ω
R IN
1
R OUT
2
10
R
2
5k
Ω
9
R IN
2
R OUT
2
10
R
2
5k
Ω
9
R IN
2
SP310E
GND
16
18
ON/OFF
EN
1
SP312E
GND
16
18
SHUTDOWN
*The negative terminal of the V+ storage capacitor can be tied
to either V
CC
or GND. Connecting the capacitor to V
CC
(+5V)
is recommended.
*The negative terminal of the V+ storage capacitor can be tied
to either V
CC
or GND. Connecting the capacitor to V
CC
(+5V)
is recommended.
Figure 3. Typical Circuits using the SP310E and SP312E
Date: 7/19/04SP202E Series High Performance RS232 Transceivers© Copyright 2004 Sipex Corporation
5
R
S
-
2
3
2
I
N
P
U
T
S
R OUT
1
R IN
1
R
S
-
2
3
2
I
N
P
U
T
S
1314
T
T
L
/
C
M
O
S
O
U
T
P
U
T
S
13
14
R
S
-
2
3
2
O
U
T
P
U
T
S
V
CC
= +5V
+5V
C
1
+
–
C
4
+
–
–
+
C
2
+
–
V
DD
Storage Capacitor
V
SS
Storage Capacitor
–5V–5V
C
3
Figure 4. Charge Pump — Phase 1
In actual system applications, it is quite possible
for signals to be applied to the receiver inputs
before power is applied to the receiver circuitry.
This occurs, for example, when a PC user attempts
to print, only to realize the printer wasn’t turned on.
In this case an RS-232 signal from the PC will
appear on the receiver input at the printer. When
the printer power is turned on, the receiver will
operate normally. All of these enhanced devices
are fully protected.
Charge Pump
The charge pump is a Sipex–patented design
(5,306,954) and uses a unique approach com-
pared to older less–efficient designs. The charge
pump still requires four external capacitors, but
uses a four–phase voltage shifting technique to
attain symmetrical power supplies. There is a
free–running oscillator that controls the four
phases of the voltage shifting. A description of
each phase follows.
Phase 1
— V
SS
charge storage —During this phase of
the clock cycle, the positive side of capacitors
C
1
and C
2
are initially charged to +5V. C
l
+
is
then switched to ground and the charge in C
1
–
is
transferred to C
2
–
. Since C
2
+
is connected to
+5V, the voltage potential across capacitor C
2
is
now 10V.
V
CC
= +5V
Phase 2
— V
SS
transfer — Phase two of the clock con-
nects the negative terminal of C
2
to the V
SS
storage capacitor and the positive terminal of C
2
to ground, and transfers the generated –l0V to
C
3
. Simultaneously, the positive side of capaci-
tor C
1
is switched to +5V and the negative side
is connected to ground.
Phase 3
— V
DD
charge storage — The third phase of the
clock is identical to the first phase — the charge
transferred in C
1
produces –5V in the negative
terminal of C
1
, which is applied to the negative
side of capacitor C
2
. Since C
2
+
is at +5V, the
voltage potential across C
2
is l0V.
Phase 4
— V
DD
transfer — The fourth phase of the clock
connects the negative terminal of C
2
to ground,
and transfers the generated l0V across C
2
to C
4
,
the V
DD
storage capacitor. Again, simultaneously
with this, the positive side of capacitor C
1
is
switched to +5V and the negative side is con-
nected to ground, and the cycle begins again.
Since both V
+
and V
–
are separately generated
from V
CC
; in a no–load condition V
+
and V
–
will
C
4
C
1
+
–
C
2
+
–
+
–
–
+
V
DD
Storage Capacitor
V
SS
Storage Capacitor
–10V
C
3
Figure 5. Charge Pump — Phase 2
Date: 7/19/04SP202E Series High Performance RS232 Transceivers© Copyright 2004 Sipex Corporation
6
+10V
a) C
2
+
GND
GND
b) C
2
–
–10V
Figure 6. Charge Pump Waveforms
be symmetrical. Older charge pump approaches
that generate V
–
from V
+
will show a decrease in
the magnitude of V
–
compared to V
+
due to the
inherent inefficiencies in the design.
The clock rate for the charge pump typically
operates at 15kHz. The external capacitors can
be as low as 0.1µF with a 16V breakdown
voltage rating.
V
CC
= +5V
Shutdown (SD) and Enable (EN) for the
SP310E and SP312E
Both the SP310E and SP312E have a shutdown/
standby mode to conserve power in battery-pow-
ered systems. To activate the shutdown mode,
which stops the operation of the charge pump, a
logic “0” is applied to the appropriate control line.
For the SP310E, this control line is ON/OFF (pin
18). Activating the shutdown mode also puts the
+5V
C
1
+
–
C
4
+
–
–
+
C
2
+
–
V
DD
Storage Capacitor
V
SS
Storage Capacitor
–5V–5V
C
3
Figure 7. Charge Pump — Phase 3
V
CC
= +5V
+10V
C
1
+
–
C
4
+
–
–
+
C
2
+
–
V
DD
Storage Capacitor
V
SS
Storage Capacitor
C
3
Figure 8. Charge Pump — Phase 4
Date: 7/19/04SP202E Series High Performance RS232 Transceivers© Copyright 2004 Sipex Corporation
7
SP310E transmitter and receiver outputs in a high
impedance condition (tri-stated). The shutdown
mode is controlled on the SP312E by a logic “0”
on the SHUTDOWN control line (pin 18); this also
puts the transmitter outputs in a tri–state mode.
The receiver outputs can be tri–stated separately
during normal operation or shutdown by a logic
“1” on the ENABLE line (pin 1).
Wake–Up Feature for the SP312E
The SP312E has a wake–up feature that keeps
all the receivers in an enabled state when the
device is in the shutdown mode. Table 1 defines
the truth table for the wake–up function.
With only the receivers activated, the SP312E
typically draws less than 5µA supply current.
In the case of a modem interfaced to a computer
in power down mode, the Ring Indicator (RI)
signal from the modem would be used to "wake
up" the computer, allowing it to accept data
transmission.
After the ring indicator signal has propagated
through the SP312E receiver, it can be used to
trigger the power management circuitry of the
computer to power up the microprocessor, and
bring the SD pin of the SP312E to a logic high,
taking it out of the shutdown mode. The receiver
propagation delay is typically 1µs. The enable
time for V
+
and V
–
is typically 2ms. After V
+
and
V
–
have settled to their final values, a signal can
be sent back to the modem on the data terminal
ready (DTR) pin signifying that the computer is
ready to accept and transmit data.
Pin Strapping for the SP233ECT
The SP233E packaged in the 20–pin SOIC pack-
age (SP233ECT) has a slightly different pinout
than the SP233E in other package configurations.
To operate properly, the following pairs of pins
must be externally wired together:
the two V– pins (pins 10 and 17)
the two C
2
+ pins (pins 12 and 15)
the two C
2
– pins (pins 11 and 16)
All other connections, features, functions and
performance are identical to the SP233E as
specified elsewhere in this data sheet.
ESD TOLERANCE
The SP202E/232E/233E/310E/312E devices
incorporates ruggedized ESD cells on all driver
output and receiver input pins. The ESD struc-
ture is improved over our previous family for
more rugged applications and environments sen-
sitive to electro-static discharges and associated
transients. The improved ESD tolerance is at
least ±15KV without damage nor latch-up.
There are different methods of ESD testing
applied:
a) MIL-STD-883, Method 3015.7
b) IEC1000-4-2 Air-Discharge
c) IEC1000-4-2 Direct Contact
The Human Body Model has been the generally
accepted ESD testing method for semiconductors.
This method is also specified in MIL-STD-883,
Method 3015.7 for ESD testing. The premise of
this ESD test is to simulate the human body’s
potential to store electro-static energy and
discharge it to an integrated circuit. The
simulation is performed by using a test model as
shown in Figure 9. This method will test the IC’s
capability to withstand an ESD transient during
normal handling such as in manufacturing areas
where the ICs tend to be handled frequently.
The IEC-1000-4-2, formerly IEC801-2, is
generally used for testing ESD on equipment and
systems. For system manufacturers, they must
guarantee a certain amount of ESD protection
since the system itself is exposed to the outside
environment and human presence. The premise
SD
0
0
1
1
EN
0
1
0
1
Power
2024年4月12日发(作者：资惜天)
®
SP202E/232E/233E/310E/312E
High-Performance RS-232
Line Drivers/Receivers
■Operates from Single +5V Power Supply
■Meets All RS-232D and ITU V.28
Specifications
■Operates with 0.1µF to 10µF Capacitors
■High Data Rate – 120Kbps Under Load
■Low Power Shutdown ≤1µA (Typical)
■3-State TTL/CMOS Receiver Outputs
■Low Power CMOS – 3mA Operation
■Improved ESD Specifications:
±15kV Human Body Model
±15kV IEC1000-4-2 Air Discharge
±8kV IEC1000-4-2 Contact Discharge
C
1
+
V+
C
1
-
C
2
+
C
2
-
V-
T
2
OUT
R
2
IN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
GND
T
1
OUT
R
1
IN
R
1
OUT
T
1
IN
T
2
IN
R
2
OUT
Now Available in Lead Free Packaging
The SP202E/232E/233E/310E/312E devices are a family of line driver and receiver pairs that
meet the specifications of RS-232 and V.28 serial protocols with enhanced ESD performance.
The ESD tolerance has been improved on these devices to over ±15KV for both Human Body
Model and IEC1000-4-2 Air Discharge Method. These devices are pin-to-pin compatible with
Sipex's SP232A/233A/310A/312A devices as well as popular industry standards. As with the
initial versions, the SP202E/232E/233E/310E/312E devices feature at least 120Kbps data rate
under load, 0.1µF charge pump capacitors, and overall ruggedness for commercial applications.
This family also features Sipex's BiCMOS design allowing low power operation without
sacrificing performance. The series is available in plastic DIP and SOIC packages operating over
the commercial and industrial temperature ranges.
SELECTION TABLE
Model
SP202E
SP232E
SP233E
SP310E
SP312E
Number of RS232
DriversReceivers
22
22
22
22
22
No. of ReceiversNo. of External
Active in Shutdown0.1µF Capacitors
0 4
0 4
0 0
0 4
2 4
ShutdownWakeUp TTL Tri–State
NoNoNo
NoNoNo
NoNoNo
YesNoYes
YesYesYes
SP202E
DESCRIPTION
Date: 7/19/04SP202E Series High Performance RS232 Transceivers© Copyright 2004 Sipex Corporation
1
ABSOLUTE MAXIMUM RATINGS
This is a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the operation
sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of time may affect
reliability.
V
cc
.................................................................................................................................................................
+6V
V
+
....................................................................................................................
(Vcc-0.3V) to +11.0V
V
-
............................................................................................................................................................
-11.0V
Input Voltages
T
IN
.........................................................................................................................
-0.3 to (Vcc +0.3V)
R
IN
............................................................................................................................................................
±15V
Output Voltages
T
OUT
....................................................................................................
(V+, +0.3V) to (V-, -0.3V)
R
OUT
................................................................................................................
-0.3V to (Vcc +0.3V)
Short Circuit Duration
T
OUT
.........................................................................................................................................
Continuous
375mW
(derate 7mW/°C above +70°C)
375mW
(derate 7mW/°C above +70°C)
ELECTRICAL CHARACTERISTICS
V
CC
=+5V±10%; 0.1µF charge pump capacitors; T
MIN
to T
MAX
unless otherwise noted.
PARAMETERS
TTL INPUT
Logic Threshold
LOW
HIGH
Logic Pull-Up Current
TTL OUTPUT
TTL/CMOS Output
Voltage, Low
Voltage, High
Leakage Current **; T
A
= +25°
RS-232 OUTPUT
Output Voltage Swing
Output Resistance
Output Short Circuit Current
Maximum Data Rate
RS-232 INPUT
Voltage Range
Voltage Threshold
LOW
HIGH
Hysteresis
Resistance
ONDITIONS
0.8
2.0
15200
Volts
Volts
µA
T
IN
; EN, SD
T
IN
; EN, SD
T
IN
= 0V
I
OUT
= 3.2mA; Vcc = +5V
I
OUT
= -1.0mA
EN = V
CC
, 0V≤V
OUT
≤V
CC
All transmitter outputs loaded
with 3kΩ to Ground
V
CC
= 0V; V
OUT
= ±2V
Infinite duration
C
L
= 2500pF, R
L
= 3kΩ
0.4
3.5
0.05
±5
300
120
-15
0.8
0.2
3
1.2
1.7
0.5
5
±18
240
+15
2.8
1.0
7
±6
±10
Volts
Volts
µA
Volts
Ohms
mA
Kbps
Volts
Volts
Volts
Volts
kΩ
V
CC
= 5V, T
A
= +25°C
V
CC
= 5V, T
A
= +25°C
V
CC
= 5V, T
A
= +25°C
T
A
= +25°C, -15V ≤ V
IN
≤ +15V
TTL to RS-232; C
L
= 50pF
RS-232 to TTL
C
L
= 10pF, R
L
= 3-7kΩ;
T
A
=+25°C
C
L
= 2500pF, R
L
= 3kΩ;
measured from +3V to -3V
or -3V to +3V
SP310E and SP312E only
SP310E and SP312E only
No load, T
A
= +25°C; V
CC
= 5V
All transmitters R
L
= 3kΩ;
T
A
= +25°C
V
CC
= 5V, T
A
= +25°C
DYNAMIC CHARACTERISTICS
Driver Propagation Delay
Receiver Propagation Delay
Instantaneous Slew Rate
Transition Region Slew Rate
Output Enable Time **
Output Disable Time **
POWER REQUIREMENTS
V
CC
Power Supply Current
Shutdown Supply Current **
**SP310E and SP312E only
1.5
0.1
10
400
250
3
15
1
3.0
1.0
30
µs
µs
V/µs
V/µs
ns
ns
5
5
mA
mA
µA
Date: 7/19/04SP202E Series High Performance RS232 Transceivers© Copyright 2004 Sipex Corporation
2
PERFORMANCE CURVES
-11
-10
10
12
30
25
20
I
C
C
(
m
A
)
9.0
8.5
-9
V
–
V
o
l
t
a
g
e
(
V
o
l
t
s
)
V
CC
= 6V
-8
-7
-6
-5
-4
-3
0246
V
CC
= 6V
V
+
(
V
o
l
t
s
)
8
6
4
2
0
V
CC
= 5V
V
CC
= 4V
V
CC
= 6V
V
O
H
(
V
o
l
t
s
)
8.0
7.5
7.0
6.5
6.0
5.5
Load current = 0mA
T
A
= 25°C
V
CC
= 5V
15
V
CC
= 5V
10
V
CC
= 4V
5
V
CC
= 3V
0
-55
V
CC
= 4V
8101214
Load Current (mA)
05101520
25303540
-4
5.0
4.54.755.0
V
CC
(Volts)
5.255.5
Load Current (mA)
Temperature (°C)
PINOUTS
C
1
+
V+
C
1
-
C
2
+
C
2
-
V-
T
2
OUT
R
2
IN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
GND
T
1
OUT
R
1
IN
R
1
OUT
T
1
IN
T
2
IN
R
2
OUT
C
1
+
V+
C
1
-
C
2
+
C
2
-
V-
T
2
OUT
R
2
IN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
GND
T
1
OUT
R
1
IN
R
1
OUT
T
1
IN
T
2
IN
R
2
OUT
SP202E
SP232E
T
2
IN
T
1
IN
R
1
OUT
R
1
IN
T
1
OUT
GND
V
CC
V+
GND
1
2
3
20
19
18
R
2
OUT
R
2
IN
T
2
OUT
V-
C
2
-
C
2
+
C
1
–
C
1
+
C
2
+
C
2
–
N.C./EN
C1+
V+
C1-
C2+
C2-
V-
T2OUT
R2IN
1
2
20
19
SHDN
V
CC
GND
SP310E_A/312E_A
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
SP233ECT
4
5
6
7
8
9
17
16
15
14
13
12
11
T1OUT
R1IN
R1OUT
N.C.
T1IN
T2IN
N.C.
V–
10
20-PIN SOIC
R2OUT
10
20-PIN SSOP
NC
*
C
1
+
V+
C
1
-
C
2
+
C
2
-
V-
T
2
OUT
R
2
IN
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
ON/OFF
V
CC
GND
T
1
OUT
R
1
IN
R
1
OUT
T
1
IN
T
2
IN
R
2
OUT
EN
*
C
1
+
V+
C
1
-
C
2
+
C
2
-
V-
T
2
OUT
R
2
IN
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
SHUTDOWN
V
CC
GND
T
1
OUT
R
1
IN
R
1
OUT
T
1
IN
T
2
IN
R
2
OUT
SP312E
SP310E
*
N.C. for SP310E_A, EN for SP312E_A
Date: 7/19/04SP202E Series High Performance RS232 Transceivers© Copyright 2004 Sipex Corporation
3
FEATURES…
The SP202E/232E/233E/310E/312E devices
are a family of line driver and receiver pairs that
meet the specifications of RS-232 and V.28
serial protocols with enhanced ESD perfor-
mance. The ESD tolerance has been improved
on these devices to over ±15KV for both Human
Body Model and IEC1000-4-2 Air Discharge
Method. These devices are pin-to-pin compat-
ible with Sipex's 232A/233A/310A/312A
devices as well as popular industry standards.
As with the initial versions, the SP202E/232E/
233E/310E/312E devices feature10V/µs slew
rate, 120Kbps data rate under load, 0.1µF
charge pump capacitors, overall ruggedness
for commercial applications, and increased drive
current for longer and more flexible cable
configurations. This family also features Sipex's
BiCMOS design allowing low power operation
without sacrificing performance.
The SP202E/232E/233E/310E/312E devices
have internal charge pump voltage converters
which allow them to operate from a single +5V
supply. The charge pumps will operate with
polarized or non-polarized capacitors ranging
from 0.1 to 10 µF and will generate the ±6V
needed to generate the RS-232 output levels.
Both meet all EIA RS-232 and ITU V.28
specifications.
The SP310E provides identical features as the
SP232E with a single control line which
simultaneously shuts down the internal DC/DC
converter and puts all transmitter and receiver
outputs into a high impedance state. The SP312E
is identical to the SP310E with separate tri-state
and shutdown control lines.
THEORY OF OPERATION
The SP232E, SP233E, SP310E and SP312E
devices are made up of three basic circuit blocks –
1) a driver/transmitter, 2) a receiver and 3) a charge
pump. Each block is described below.
Driver/Transmitter
The drivers are inverting transmitters, which ac-
cept TTL or CMOS inputs and output the RS-232
signals with an inverted sense relative to the input
logic levels. Typically the RS-232output voltage
swing is ±6V. Even under worst case loading
conditions of 3kOhms and 2500pF, the output is
guaranteed to be ±5V, which is consistent with the
RS-232 standard specifications. The transmitter
outputs are protected against infinite short-circuits
to ground without degradation in reliability.
+5V INPUT
10 F 6.3V
µ
+
1
0.1 F
µ
+
6.3V
3
4
16
C +
1
V
CC
V+
0.1 F 6.3V
µ
2
+
C -
1
C +
2
*
Charge Pump
V-
6
0.1 F
µ
+
16V
5
T
T
L
/
C
M
O
S
O
U
T
P
U
T
S
T
T
L
/
C
M
O
S
I
N
P
U
T
S
+
0.1 F
µ
16V
C -
2
400k
Ω
T IN
1
11
T
1
400k
Ω
14
T OUT
1
T IN
2
10
T
2
R
1
5k
Ω
7
T OUT
2
R OUT
1
R IN
1
R OUT
2
9
SP202E
SP232E
R
2
5k
Ω
8
R IN
2
GND
15
*The negative terminal of the V+ storage capacitor can be tied
to either V
CC
or GND. Connecting the capacitor to V
CC
(+5V)
is recommended.
Figure 1. Typical Circuit using the SP202E or SP232E.
Date: 7/19/04SP202E Series High Performance RS232 Transceivers
R
S
-
2
3
2
I
N
P
U
T
S
1213
R
S
-
2
3
2
O
U
T
P
U
T
S
© Copyright 2004 Sipex Corporation
4
+5V INPUT
7
T
T
L
/
C
M
O
S
O
U
T
P
U
T
S
T
T
L
/
C
M
O
S
I
N
P
U
T
S
V
CC
T IN
1
2
400k
Ω
T
1
T
2
5
T OUT
1
T IN
2
1
400k
Ω
18
T OUT
2
R OUT
1
R
1
5k
Ω
R IN
1
R OUT
2
20
13
C +
1
14
10
17
8
R
2
5k
Ω
C -
1
V-
V-
V+
2
19
R IN
2
Do not make
connection to
these pins
Internal
-10V Power
Supply
Internal
+10V Power
Supply
C +
12
15
C +
2
SP233ECT
GNDGND
69
C -
2
2
C -
11
16
Figure 2. Typical Circuits using the SP233ECP and SP233ECT
The instantaneous slew rate of the transmitter
output is internally limited to a maximum of 30V/
µs in order to meet the standards [EIA RS-232-D
2.1.7, Paragraph (5)]. However, the transition re-
gion slew rate of these enhanced products is typi-
cally 10V/µs. The smooth transition of the loaded
output from V
OL
to V
OH
clearly meets the mono-
tonicity requirements of the standard [EIA
RS-232-D 2.1.7, Paragraphs (1) & (2)].
Receivers
The receivers convert RS-232 input signals to
inverted TTL signals. Since the input is usually
from a transmission line, where long cable lengths
and system interference can degrade the signal, the
inputs have a typical hysteresis margin of 500mV.
This ensures that the receiver is virtually immune
to noisy transmission lines.
The input thresholds are 0.8V minimum and 2.4V
maximum, again well within the ±3V RS-232
requirements. The receiver inputs are also pro-
tected against voltages up to ±15V. Should an
input be left unconnected, a 5KOhm pulldown
resistor to ground will commit the output of the
receiver to a high state.
R
S
-
2
3
2
I
N
P
U
T
S
34
R
S
-
2
3
2
O
U
T
P
U
T
S
+5V INPUT
10 F 6.3V
µ
+5V INPUT
10 F 6.3V
µ
+
+
2
0.1 F
µ
+
6.3V
4
5
17
C +
1
V
CC
V+
3
+
0.1 µF
16V
2
17
C -
1
C +
2
*
+
0.1 µF
16V
T
T
L
/
C
M
O
S
I
N
P
U
T
S
0.1 F
µ
+
6.3V
4
5
C +
1
V
CC
V+
0.1 F
µ
16V
3
+
C -
1
C +
2
*
16V
Charge Pump
V-
7
Charge Pump
V-
7
0.1 F
µ
+
16V
6
C -
2
400k
Ω
0.1 F
µ
+
16V
6
+
0.1 F
µ
C -
2
400k
Ω
T
T
L
/
C
M
O
S
O
U
T
P
U
T
S
T
T
L
/
C
M
O
S
I
N
P
U
T
S
R
S
-
2
3
2
O
U
T
P
U
T
S
T IN
1
12
T
1
400k
Ω
15
T OUT
1
T IN
1
12
T
1
400k
Ω
15
T OUT
1
T IN
2
11
T
2
R
1
5k
Ω
8
T OUT
2
T IN
2
11
T
2
8
T OUT
2
R OUT
1
R
1
5k
Ω
R IN
1
R OUT
2
10
R
2
5k
Ω
9
R IN
2
R OUT
2
10
R
2
5k
Ω
9
R IN
2
SP310E
GND
16
18
ON/OFF
EN
1
SP312E
GND
16
18
SHUTDOWN
*The negative terminal of the V+ storage capacitor can be tied
to either V
CC
or GND. Connecting the capacitor to V
CC
(+5V)
is recommended.
*The negative terminal of the V+ storage capacitor can be tied
to either V
CC
or GND. Connecting the capacitor to V
CC
(+5V)
is recommended.
Figure 3. Typical Circuits using the SP310E and SP312E
Date: 7/19/04SP202E Series High Performance RS232 Transceivers© Copyright 2004 Sipex Corporation
5
R
S
-
2
3
2
I
N
P
U
T
S
R OUT
1
R IN
1
R
S
-
2
3
2
I
N
P
U
T
S
1314
T
T
L
/
C
M
O
S
O
U
T
P
U
T
S
13
14
R
S
-
2
3
2
O
U
T
P
U
T
S
V
CC
= +5V
+5V
C
1
+
–
C
4
+
–
–
+
C
2
+
–
V
DD
Storage Capacitor
V
SS
Storage Capacitor
–5V–5V
C
3
Figure 4. Charge Pump — Phase 1
In actual system applications, it is quite possible
for signals to be applied to the receiver inputs
before power is applied to the receiver circuitry.
This occurs, for example, when a PC user attempts
to print, only to realize the printer wasn’t turned on.
In this case an RS-232 signal from the PC will
appear on the receiver input at the printer. When
the printer power is turned on, the receiver will
operate normally. All of these enhanced devices
are fully protected.
Charge Pump
The charge pump is a Sipex–patented design
(5,306,954) and uses a unique approach com-
pared to older less–efficient designs. The charge
pump still requires four external capacitors, but
uses a four–phase voltage shifting technique to
attain symmetrical power supplies. There is a
free–running oscillator that controls the four
phases of the voltage shifting. A description of
each phase follows.
Phase 1
— V
SS
charge storage —During this phase of
the clock cycle, the positive side of capacitors
C
1
and C
2
are initially charged to +5V. C
l
+
is
then switched to ground and the charge in C
1
–
is
transferred to C
2
–
. Since C
2
+
is connected to
+5V, the voltage potential across capacitor C
2
is
now 10V.
V
CC
= +5V
Phase 2
— V
SS
transfer — Phase two of the clock con-
nects the negative terminal of C
2
to the V
SS
storage capacitor and the positive terminal of C
2
to ground, and transfers the generated –l0V to
C
3
. Simultaneously, the positive side of capaci-
tor C
1
is switched to +5V and the negative side
is connected to ground.
Phase 3
— V
DD
charge storage — The third phase of the
clock is identical to the first phase — the charge
transferred in C
1
produces –5V in the negative
terminal of C
1
, which is applied to the negative
side of capacitor C
2
. Since C
2
+
is at +5V, the
voltage potential across C
2
is l0V.
Phase 4
— V
DD
transfer — The fourth phase of the clock
connects the negative terminal of C
2
to ground,
and transfers the generated l0V across C
2
to C
4
,
the V
DD
storage capacitor. Again, simultaneously
with this, the positive side of capacitor C
1
is
switched to +5V and the negative side is con-
nected to ground, and the cycle begins again.
Since both V
+
and V
–
are separately generated
from V
CC
; in a no–load condition V
+
and V
–
will
C
4
C
1
+
–
C
2
+
–
+
–
–
+
V
DD
Storage Capacitor
V
SS
Storage Capacitor
–10V
C
3
Figure 5. Charge Pump — Phase 2
Date: 7/19/04SP202E Series High Performance RS232 Transceivers© Copyright 2004 Sipex Corporation
6
+10V
a) C
2
+
GND
GND
b) C
2
–
–10V
Figure 6. Charge Pump Waveforms
be symmetrical. Older charge pump approaches
that generate V
–
from V
+
will show a decrease in
the magnitude of V
–
compared to V
+
due to the
inherent inefficiencies in the design.
The clock rate for the charge pump typically
operates at 15kHz. The external capacitors can
be as low as 0.1µF with a 16V breakdown
voltage rating.
V
CC
= +5V
Shutdown (SD) and Enable (EN) for the
SP310E and SP312E
Both the SP310E and SP312E have a shutdown/
standby mode to conserve power in battery-pow-
ered systems. To activate the shutdown mode,
which stops the operation of the charge pump, a
logic “0” is applied to the appropriate control line.
For the SP310E, this control line is ON/OFF (pin
18). Activating the shutdown mode also puts the
+5V
C
1
+
–
C
4
+
–
–
+
C
2
+
–
V
DD
Storage Capacitor
V
SS
Storage Capacitor
–5V–5V
C
3
Figure 7. Charge Pump — Phase 3
V
CC
= +5V
+10V
C
1
+
–
C
4
+
–
–
+
C
2
+
–
V
DD
Storage Capacitor
V
SS
Storage Capacitor
C
3
Figure 8. Charge Pump — Phase 4
Date: 7/19/04SP202E Series High Performance RS232 Transceivers© Copyright 2004 Sipex Corporation
7
SP310E transmitter and receiver outputs in a high
impedance condition (tri-stated). The shutdown
mode is controlled on the SP312E by a logic “0”
on the SHUTDOWN control line (pin 18); this also
puts the transmitter outputs in a tri–state mode.
The receiver outputs can be tri–stated separately
during normal operation or shutdown by a logic
“1” on the ENABLE line (pin 1).
Wake–Up Feature for the SP312E
The SP312E has a wake–up feature that keeps
all the receivers in an enabled state when the
device is in the shutdown mode. Table 1 defines
the truth table for the wake–up function.
With only the receivers activated, the SP312E
typically draws less than 5µA supply current.
In the case of a modem interfaced to a computer
in power down mode, the Ring Indicator (RI)
signal from the modem would be used to "wake
up" the computer, allowing it to accept data
transmission.
After the ring indicator signal has propagated
through the SP312E receiver, it can be used to
trigger the power management circuitry of the
computer to power up the microprocessor, and
bring the SD pin of the SP312E to a logic high,
taking it out of the shutdown mode. The receiver
propagation delay is typically 1µs. The enable
time for V
+
and V
–
is typically 2ms. After V
+
and
V
–
have settled to their final values, a signal can
be sent back to the modem on the data terminal
ready (DTR) pin signifying that the computer is
ready to accept and transmit data.
Pin Strapping for the SP233ECT
The SP233E packaged in the 20–pin SOIC pack-
age (SP233ECT) has a slightly different pinout
than the SP233E in other package configurations.
To operate properly, the following pairs of pins
must be externally wired together:
the two V– pins (pins 10 and 17)
the two C
2
+ pins (pins 12 and 15)
the two C
2
– pins (pins 11 and 16)
All other connections, features, functions and
performance are identical to the SP233E as
specified elsewhere in this data sheet.
ESD TOLERANCE
The SP202E/232E/233E/310E/312E devices
incorporates ruggedized ESD cells on all driver
output and receiver input pins. The ESD struc-
ture is improved over our previous family for
more rugged applications and environments sen-
sitive to electro-static discharges and associated
transients. The improved ESD tolerance is at
least ±15KV without damage nor latch-up.
There are different methods of ESD testing
applied:
a) MIL-STD-883, Method 3015.7
b) IEC1000-4-2 Air-Discharge
c) IEC1000-4-2 Direct Contact
The Human Body Model has been the generally
accepted ESD testing method for semiconductors.
This method is also specified in MIL-STD-883,
Method 3015.7 for ESD testing. The premise of
this ESD test is to simulate the human body’s
potential to store electro-static energy and
discharge it to an integrated circuit. The
simulation is performed by using a test model as
shown in Figure 9. This method will test the IC’s
capability to withstand an ESD transient during
normal handling such as in manufacturing areas
where the ICs tend to be handled frequently.
The IEC-1000-4-2, formerly IEC801-2, is
generally used for testing ESD on equipment and
systems. For system manufacturers, they must
guarantee a certain amount of ESD protection
since the system itself is exposed to the outside
environment and human presence. The premise
SD
0
0
1
1
EN
0
1
0
1
Power