2024年4月14日发(作者：盘文瑞)
7Series FPGAs Data Sheet: Overview
DS180 (v2.6.1) September 8, 2020
Max. Capability
Logic Cells
Block RAM
(1)
DSP Slices
DSP Performance
(2)
MicroBlaze CPU
(3)
Transceivers
Transceiver Speed
Serial Bandwidth
PCIe Interface
Memory Interface
I/O Pins
I/O Voltage
Package Options
Product Specification
Artix-7
215K
13Mb
740
929GMAC/s
303 DMIPs
16
6.6Gb/s
211Gb/s
x4 Gen2
1,066Mb/s
500
1.2V–3.3V
Low-Cost, Wire-Bond,
Bare-Die Flip-Chip
Spartan-7
102K
4.2Mb
160
176 GMAC/s
260 DMIPs
–
–
–
–
800Mb/s
400
1.2V–3.3V
Low-Cost, Wire-Bond
Kintex-7
478K
34Mb
1,920
2,845GMAC/s
438 DMIPs
32
12.5Gb/s
800Gb/s
x8 Gen2
1,866Mb/s
500
1.2V–3.3V
Bare-Die Flip-Chip and High-
Performance Flip-Chip
Virtex-7
1,955K
68Mb
3,600
5,335GMAC/s
441 DMIPs
96
28.05Gb/s
2,784Gb/s
x8 Gen3
1,866Mb/s
1,200
1.2V–3.3V
Highest Performance
Flip-Chip
DS180 (v2.6.1) September 8, 2020
Product Specification
7Series FPGAs Data Sheet: Overview
Spartan-7 FPGA Feature Summary
Table 2:Spartan-7 FPGA Feature Summary by Device
CLB
Device
Logic
Cells
6,000
12,800
23,360
52,160
76,800
102,400
Slices
(1)
938
2,000
3,650
8,150
12,000
16,000
Max
Distributed
RAM (Kb)
70
150
313
600
832
1,100
DSP
Slices
(2)
10
20
80
120
140
160
Block RAM Blocks
(3)
18Kb
10
20
90
150
180
240
36Kb
5
10
45
75
90
120
Max
(Kb)
180
360
1,620
2,700
3,240
4,320
CMTs
(4)
PCIeGT
XADC
Blocks
0
0
1
1
1
1
Total I/O
Banks
(5)
2
2
3
5
8
8
Max User
I/O
100
100
150
250
400
400
XC7S6
XC7S15
XC7S25
XC7S50
XC7S75
XC7S100
2
2
3
5
8
8
0
0
0
0
0
0
0
0
0
0
0
0
Table 3:Spartan-7 FPGA Device-Package Combinations and Maximum I/Os
Package
Size (mm)
BallPitch(mm)
Device
XC7S6
XC7S15
XC7S25
XC7S50
XC7S75
XC7S100
CPGA196
8 x 8
0.5
HR I/O
(1)
100
100
CSGA225
13 x 13
0.8
HR I/O
(1)
100
100
150150
210
CSGA324
15 x 15
0.8
HR I/O
(1)
FTGB196
15 x 15
1.0
HR I/O
(1)
100
100
100
100250
338
338
400
400
FGGA484
23 x 23
1.0
HR I/O
(1)
FGGA676
27 x 27
1.0
HR I/O
(1)
DS180 (v2.6.1) September 8, 2020
Product Specification
2024年4月14日发(作者：盘文瑞)
7Series FPGAs Data Sheet: Overview
DS180 (v2.6.1) September 8, 2020
Max. Capability
Logic Cells
Block RAM
(1)
DSP Slices
DSP Performance
(2)
MicroBlaze CPU
(3)
Transceivers
Transceiver Speed
Serial Bandwidth
PCIe Interface
Memory Interface
I/O Pins
I/O Voltage
Package Options
Product Specification
Artix-7
215K
13Mb
740
929GMAC/s
303 DMIPs
16
6.6Gb/s
211Gb/s
x4 Gen2
1,066Mb/s
500
1.2V–3.3V
Low-Cost, Wire-Bond,
Bare-Die Flip-Chip
Spartan-7
102K
4.2Mb
160
176 GMAC/s
260 DMIPs
–
–
–
–
800Mb/s
400
1.2V–3.3V
Low-Cost, Wire-Bond
Kintex-7
478K
34Mb
1,920
2,845GMAC/s
438 DMIPs
32
12.5Gb/s
800Gb/s
x8 Gen2
1,866Mb/s
500
1.2V–3.3V
Bare-Die Flip-Chip and High-
Performance Flip-Chip
Virtex-7
1,955K
68Mb
3,600
5,335GMAC/s
441 DMIPs
96
28.05Gb/s
2,784Gb/s
x8 Gen3
1,866Mb/s
1,200
1.2V–3.3V
Highest Performance
Flip-Chip
DS180 (v2.6.1) September 8, 2020
Product Specification
7Series FPGAs Data Sheet: Overview
Spartan-7 FPGA Feature Summary
Table 2:Spartan-7 FPGA Feature Summary by Device
CLB
Device
Logic
Cells
6,000
12,800
23,360
52,160
76,800
102,400
Slices
(1)
938
2,000
3,650
8,150
12,000
16,000
Max
Distributed
RAM (Kb)
70
150
313
600
832
1,100
DSP
Slices
(2)
10
20
80
120
140
160
Block RAM Blocks
(3)
18Kb
10
20
90
150
180
240
36Kb
5
10
45
75
90
120
Max
(Kb)
180
360
1,620
2,700
3,240
4,320
CMTs
(4)
PCIeGT
XADC
Blocks
0
0
1
1
1
1
Total I/O
Banks
(5)
2
2
3
5
8
8
Max User
I/O
100
100
150
250
400
400
XC7S6
XC7S15
XC7S25
XC7S50
XC7S75
XC7S100
2
2
3
5
8
8
0
0
0
0
0
0
0
0
0
0
0
0
Table 3:Spartan-7 FPGA Device-Package Combinations and Maximum I/Os
Package
Size (mm)
BallPitch(mm)
Device
XC7S6
XC7S15
XC7S25
XC7S50
XC7S75
XC7S100
CPGA196
8 x 8
0.5
HR I/O
(1)
100
100
CSGA225
13 x 13
0.8
HR I/O
(1)
100
100
150150
210
CSGA324
15 x 15
0.8
HR I/O
(1)
FTGB196
15 x 15
1.0
HR I/O
(1)
100
100
100
100250
338
338
400
400
FGGA484
23 x 23
1.0
HR I/O
(1)
FGGA676
27 x 27
1.0
HR I/O
(1)
DS180 (v2.6.1) September 8, 2020
Product Specification