2024年11月2日发(作者：乐流婉)
元器件交易网
July 2000
ML4664*/ML4669*
10BASE-FL to 10BASE-T Converter
GENERAL DESCRIPTION
The fully pin-compatible ML4664/ML4669 pair provide
conversion from 10BASE-T copper media to 10BASE-FL
fiber media in a single chip. They are compliant with
Ethernet IEEE 802.3 10BASE-T and 10BASE-FL standards.
The ML4664/69 uses a single 5V supply, and requires no
crystal or clock.
Their 10BASE-FL transmitter offers a current drive output
that directly drives a fiber optic LED transmitter. Their
receiver offers a highly stable fiber optic data quantizer
capable of accepting input signals as low as 2mV
P-P
with
a 55dB dynamic range.
The 10BASE-T portion of the pair contains current driven
transmitter outputs that offer superior performance
because their switching is highly symmetric, resulting in
lowered RFI noise and jitter. By changing one external
resistor the pair easily interfaces to 100W unshielded
twisted pair, 150W shielded twisted pair, or a range of
other characteristic impedances.
FEATURES
s
s
s
Full duplex operation
Five network status LED outputs
Industrial temperature option
10BASE-FL FEATURES:
s
Highly stable data quantizer with 55dB input dynamic
range
Input sensitivity as low as 2mV
P-P
Up to 100mA maximum current driven fiber optic LED
output for accurate launch power (PLCC package)
s
s
10BASE-T FEATURES:
s
s
Current driven output for low RFI noise and low jitter
Drives 100W unshielded or 150W shielded twisted pair
The ML4664 does not pass along disconnect information,
while the ML4669 does. A loss of light at the optical
s
Polarity detect status pin capable of driving an LED
inputs does not stop link pulses from being sent at the
twisted pair transmitter in the ML4664, but in the
s
Automatic polarity correction
ML4669 the link pulses stop. Also, a loss of link at the
twisted pair inputs will not stop the optical transmitter
s
On-chip link test with enable/disable option
from sending idle in the ML4664, but the ML4669 stops
sending idle. * Some Packages Are Obsolete
BLOCK DIAGRAM
LTF
LINK PULSE
CHECK
TPLED
POLDIS
IDLE
GENERATOR
RRSETRTSETOP
TPIN
2
RX SQUELCH
TP
OP
TX
OPOUT
OPVCC
POLARITY
CORRECT
LINK PULSE
GENERATOR
RX SQUELCH
TP
TPOUT
2
RTSETTP
TP
TX
TxCAP0TxCAP1
LMON
(LOW LIGHT)
THRESHOLD
GENERATOR
QUANTIZER
OPLED
V
DC
C
TIMER
2
OPIN
1
元器件交易网
ML4664/ML4669
PIN CONFIGURATION
ML4664/ML4669
28-Pin PLCC (Q28)
C
T
I
M
E
R
O
P
L
E
D
O
P
I
N
P
T
P
L
E
D
T
P
I
N
P
A
V
C
C
L
T
F
24
TPINN
V
CC
TxCAP0
TxCAP1
GND
TPOUTN
TPOUTP
5
6
7
8
9
10
11
31282726
25
24
23
22
21
20
19
OPINN
AGND
V
THADJ
V
REF
V
DC
GND
OPOUT
718
V
C
C
R
R
S
E
T
P
O
L
D
I
S
R
T
S
E
T
P
L
M
O
N
TOP VIEW
C
T
I
M
E
R
ML4664/ML4669
32-Pin TQFP (H32-7)
O
P
L
E
D
O
P
I
N
P
T
P
L
E
D
T
P
I
N
P
A
V
C
C
L
T
F
N
C
TPINN
NC
V
CC
TxCAP0
TxCAP1
GND
TPOUTN
TPOUTP
32313
24
1
2
3
4
5
6
7
8
9
23
22
21
20
19
18
17
16
R
T
S
E
T
O
P
O
P
V
C
C
OPINN
AGND
V
THADJ
V
REF
V
DC
NC
GND
OPOUT
R
T
S
E
T
P
R
R
S
E
T
R
T
S
E
T
O
P
P
O
L
D
I
S
L
M
O
N
N
C
V
C
C
TOP VIEW
2
O
P
V
C
C
元器件交易网
ML4664/ML4669
PINNAMEFUNCTION
PIN DESCRIPTION
(Pin Number in Parentheses is for TQFP Version)
PINNAMEFUNCTION
1(29)C
TIMER
A capacitor from this pin to V
CC
determines the Link Monitor response
time.
Link Test Fail. Active high. Normally
this pin is low, indicating that the link
is operational. If the link goes down
resulting from the absence of link
pulses or frames being received, the
chip will go into the Link Test Fail
state and bring LTF high.
When the ML4664 is in the link test
fail state, the optical and twisted pair
transmitters are disabled from sending
data. However, the optical transmitter
does send an idle signal, and link
pulses are sent at the twisted pair
transmitter. When the ML4669 is in
link test fail state, the optical and
twisted pair transmitters are disabled
from sending data. Also, the optical
transmitter will not send an idle
signal. However, link pulses may be
sent at the twisted pair transmitter,
depending on the optical inputs. See
Table 1.
This pin may be grounded to disable
Link Test. In this mode no link pulses
are sent and the link will not fail if no
link pulses are received. If this pin is
not used as an LED driver, and is not
grounded, a 2kW 5% resistor should
be connected between this pin and
V
CC
.
7(4)
8(5)
TxCAP0
TxCAP1
2(30)LTF
An external capacitor of 680pF is
tied between these two pins to set
the pulse width for the pre-
equalization on the twisted pair
transmitter. If these two pins are
shorted together, no pre-equalization
occurs. If the ML4664/ML4669 is
driving only a short cable, or board
traces, these pins may be shorted.
Ground reference9(6)GND
20(18)
10(7)
11(8)
TPOUTNPre-equalized differential balanced
TPOUTPcurrent driven output. These outputs
are connected to a balanced transmit
output filter which drives the twisted
pair cable through pulse transformers.
The output current is set with an
external resistor connected to RTSET
allowing the chip to drive 100W
unshielded , 150W shielded twisted
pair cables or a range of other
characteristic impedances.
Receive Polarity status. Active low
LED Driver, open collector output.
Indicates the polarity of the receive
twisted pair regardless of auto polarity
correction. When low, receive polarity
is reversed. When high, receive
polarity is correct. This pin may be
grounded to disable the polarity
circuit. If this pin is not used as an
LED driver, and is not grounded, a
2kW, 5% resistor should be connected
between this pin and V
CC
.
12(10)POLDIS
3(31)TPLEDIndicates that reception is taking place
on the TPINP, TPINN pair. Active low
LED driver, open collector. It is
extended 16ms for visibility.
Optionally, this pin may be grounded
to disable the optical output. If this
pin is not used as an LED driver and is
not grounded, a 2kW, 5% resistor
should be connected between TPLED
and V
CC
.
Twisted Pair receive data input.
When this signal exceeds the
receive squelch requirements the
receive data is buffered and sent
to the Rx± outputs.
5V input
13(11)RTSETTPWhen using 100W unshielded twisted
pair, a 220W resistor is tied between
this pin and V
CC
. When using 150W
shielded twisted pair, a 330W resistor
is tied between this pin and V
CC
.
15(13)RRSETA 1% 61.9kW resistor tied from this
pin to V
CC
is used for internal biasing.
4(32)
5(1)
TPINP
TPINN
16(14)RTSETOPSets the current driven output of the
transmitter. A 115W resistor should be
tied between this pin and V
CC
.
6(3)V
CC
14(12)
3
元器件交易网
ML4664/ML4669
PIN DESCRIPTION
(Continued)
PINNAMEFUNCTIONPINNAMEFUNCTION
17(15)LMONLink Monitor “Low Light” LED status
output. Pulled low when voltage on
the OPINP, OPINN inputs exceed min
threshold set by V
THADJ
, and there are
transitions on OPINP, OPINN
indicating an idle signal or active
data. If the voltage on OPINP,OPINN
inputs falls below the minimum
threshold or transitions cease on
OPINP, OPINN, LMON will go high.
Active low LED driver, open collector.
In the low light state, optical and
twisted pair transmitters are disabled
from sending data. The optical
transmitter of the ML4664 does send
an idle signal, and link pulses are sent
at the twisted pair transmitter. For the
ML4669, the twisted pair transmitter
will not send link pulses, the optical
transmitter may send an idle signal,
depending on inputs. See Table 1.
22(21)V
REF
23(22)V
THADJ
24(23)AGND
25(24)OPINN
A 2.5V reference with respect to GND
This input pin sets the link monitor
threshold
Analog Filtered Ground
This input pin should be capacitively
coupled to filtered AV
CC
. The input
resistance is approximately 1.3kW.
This input pin should be capacitively
coupled to the input source. The input
resistance is approximately 1.3kW.
Analog Filtered 5V
Indicates reception is taking place on
the OPINP, OPINN pair. Active low
LED driver, open collector. It is
extended 16ms for usability. This pin
may be grounded to disable the
twisted pair outputs. If this pin is not
used as an LED driver, and is not
grounded, a 2kW, 5% resistor should
be connected between this pin and
V
CC
.
26(25)OPINP
27(26)AV
CC
28(28)OPLED
18(16)OPVCC
19(17)OPOUT
21(20)V
DC
5V supply for fiber optic
LED driver
Fiber optic LED driver output
An external capacitor on this pin
integrates an error signal which nulls
the offset of the input amplifier. If the
DC feedback loop is not being used,
this pin should be connected to V
REF
.
4
元器件交易网
ML4664/ML4669
Thermal Resistance (q
JA
)
68°C/W
80ºC/W
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond
which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and
functional device operation is not implied.
Power Supply Voltage Range
V
CC
...................................................................
GND –0.3 to 6V
Input Voltage Range: Digital Inputs
(SQEN, LBDIS).......................GND –0.3 to V
CC
+0.3V
Tx+, Tx–, V
IN
+, V
IN
–..............GND –0.3 to V
CC
+0.3V
150°C
–65°C to 150°C
Lead Temperature (Soldering)................................260°C
OPERATING CONDITIONS
Temperature Range
0°C to 70°C
–40°C to 85°C
Supply Voltage (V
CC
).........................................5V ± 5%
LED 10mA
61.9kW ± 1%
115W ± 1%
220W ± 1%
ELECTRICAL CHARACTERISTICS
SYMBOL
I
CC
V
REF
Unless otherwise specified, T
A
= Operating Temperature Range, V
CC
= OPV
CC
= AV
CC
= 5V ± 5% (Note 1)
PARAMETER
Power Supply Current
While Transmitting
Reference Voltage
CONDITIONS
RTSETOP = 115W
C Suffix
I Suffix
MINTYPMAX
140
UNITS
mA
V
V
V
mA
mA
mA
2.30
2.25
1.5
47
46
42
300450
50
300
4
52
2.60
2.67
3.5
57
58.5
V
OL
I
OPOUT
LED Drivers: V
OL
OP Transmit Peak Output Current
R
L
= 300 for OPLED, TPLED,
POLLED LTF, and LMON
RTSETOP = 115 (Note 2)C Suffix
I Suffix
I
TPOUT
V
TPSQ
H
TP
V
TPIN
R
TPIN
V
OPTH
H
OP
V
OPIN
R
OPIN
V
OPCM
A
V
V
OFF
V
N
I
TH
TP Transmit Peak Output Current
TP Receive Squelch Voltage
TP Receive Squelch Hysteresis
TP Receive Input Voltage
TP Receive Input Resistance
OP Receive Input Threshold
Voltage
OP Receive Input Threshold
Hysteresis
OP Receive Input Voltage
OP Receive Input Resistance
OP Receive Common Mode
Voltage
Amplifier Gain
Input Offset
Input Referred Noise
Input Bias Current at V
THADJ
RTSETTP = 220
585mV
P-P
%
3100mV
P-P
kW
V
THADJ
= V
REF
56
20
7mV
P-P
%
2
0.81.3
1.65
100
V
DC
= V
REF
(DC Loop Inactive)
50MHz Bandwidth
V
THADJ
= V
REF
–200
3
25
0
1600
2.0
mV
P-P
kW
V
V/V
mV
µV
200µA
5
元器件交易网
ML4664/ML4669
ELECTRICAL CHARACTERISTICS
(Continued)
SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITS
OP TO TP (SEE FIGURE 1)
t
TPODY
t
TPSDY
t
TPSPW
t
PS
Twisted Pair Start-up Delay
Twisted Pair Steady State Delay
Twisted Pair Turn Off Pulse Width
Twisted Pair Jitter
180
±3.5
500
35
ns
ns
ns
ns
TP TO OP (SEE FIGURE 2)
t
OPODY
t
OPSDY
t
OPDI
1/t
IDF
P
IDC
t
OPJ
Optical Transmit Start-up Delay
Steady State Delay
Turn Off Width from Data to Idle
Idle Frequency
Idle Duty Cycle
Jitter into 31W Load
400
0.85
45
500
15
2100
1.25
55
±1.5
ns
ns
ns
MHz
%
ns
OPTICAL LINK VERIFICATION (SEE FIGURES 3-5)
t
OLL
t
OLM
t
OLO
No Light (No Transitions) to
LMON High
Low Light (Below Threshold) to
LMON High
Light On (Above Threshold, Transitions
<3µs) to LMON Low
3
50
0.25
100
0.5
10
200
0.75
µs
µs
s
TWISTED PAIR LINK VERIFICATION (SEE FIGURE 6)
t
LT
t
LTMIN
t
LTMAX
Link Loss Time
Link Time Minimum
Link Time Maximum
50
2
25
150
7
150
ms
ms
ms
LINK PULSE TRANSMIT (SEE FIGURE 7)
t
LPRR
t
LPW
Link Pulse Rep Rate
Link Pulse Width
8
85
16
120
24
200
ms
ns
LED TIMING (SEE FIGURE 8)
t
LED
LED on Time81632ms
Note 1:
Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions.
Note 2:
The output current may be increased to 100mA by changing the RTSETOP resistor for the CQ (PLCC) package option only. See equation (1) on page 9. The increased
current option is not available for the CH (TQFP) package option.
6
元器件交易网
ML4664/ML4669
VALID
t
TPODY
DATA
t
TPSDY
VALIDDATA
OPINP
OPINN
t
TPSPW
TPOUTP
TPOUTN
Figure 1. OP to TP Timing Diagram
TPINP
TPINN
t
OPODY
I(OPOUT)
t
OPSDY
t
OPDI
t
IDF
Figure 2. TP to OP Timing Diagram
OPINP
OPINN
t
OLL
LMON
Figure 3. Optical Link Verification No Light Timing Diagram
OPINP
OPINN
V
TH
t
OLM
LMON
Figure 4. Optical Link Verification Low Light Timing Diagram
7
元器件交易网
ML4664/ML4669
OPINP
OPINN
t
OLO
LMON
Figure 5. Optical Link Verification Light On Timing Diagram
TPINP
TPINN
VALID DATA OR LINK PULSE
LTF
t
LT
t
LTMIN,
t
LTMAX
TPINP
TPINN
Figure 6. Twisted Pair Link Verification Timing Diagram
TPOUTP
TPOUTN
t
LPW
t
LPRR
Figure 7. Link Pulse Transmit Timing Diagram
TPINP, TPINN
OR
OPINP, OPINN
VALIDDATA
t
LED
TPLED
OR
OPLED
Figure 8. LED Timing Diagram
8
元器件交易网
ML4664/ML4669
2. All continuous sinusoidal signals of amplitude less
than 6.2V
P–P
and frequency less than 2MHz.
single sinusoidal cycles of amplitude less than
6.2V
P–P
and either polarity, where the frequency is
between 2MHz and 15MHz. For a period of 4 BT
before and after this single cycle, the signal will
conform to (1) above.
sinusoidal cycles gated by a 100ns pulse gate of
amplitude less than 6.2V
P–P
and either polarity, where
the sinusoidal frequency is between 2MHz and
30MHz. The off time of the pulse gate on the
sinusoidal signal shall be at least 400ns.
The first three receive squelch criteria are required to
conform to the 10BASE-T standard. The fourth receive
squelch criteria exceeds the 10BASE-T requirements and
enhances performance. The fourth squelch criteria
prevents a false unsquelch caused by cross talk or noise
typically found coupling from the phone lines onto the
receive twisted pair.
After the TP inputs are unsquelched, the detection
threshold is lowered to 225mV. Upon passing the TP
squelch requirements the receive data passes to the LED
Driver. The addition of jitter through the TP to OP path is
no more than ±1.5ns.
While in the unsquelch state, the TP squelch circuit looks
for the start of idle signal at the end of the packet. When
start of idle is detected, TP squelch is turned on again. The
proper start of idle occurs when the input signal remains
above 300mV for 160ns.
SYSTEM DESCRIPTION
OPTICAL TRANSMISSION
The optical transmit function consists of detecting the
presence of data from the TP inputs TPINP and TPINN and
driving that data onto the fiber optic LED transmitter. A
positive signal on the TPINP lead relative to the TPINN
lead will result in no current, hence the fiber optic LED is
in a low light condition. When TPINP is more negative
than TPINN, the ML4664/ML4669 will sink current into
the chip and the fiber optic LED will light up.
Before data will be transmitted onto the fiber optic cable
it must exceed the squelch requirements. The TP inputs,
squelch circuit serves the function of preventing any noise
from being transmitted onto the fiber.
FIBER OPTIC LED DRIVER
The output stage of the transmitter is a current mode
switch which develops the output light by sinking current
through the LED into the OPOUT pin. Once the current
requirement for the LED is determined, the RTSETOP
resistor is selected. The following equation is used to
select the correct RTSETOP resistor:
RTSETOP
=
2024年11月2日发(作者：乐流婉)
元器件交易网
July 2000
ML4664*/ML4669*
10BASE-FL to 10BASE-T Converter
GENERAL DESCRIPTION
The fully pin-compatible ML4664/ML4669 pair provide
conversion from 10BASE-T copper media to 10BASE-FL
fiber media in a single chip. They are compliant with
Ethernet IEEE 802.3 10BASE-T and 10BASE-FL standards.
The ML4664/69 uses a single 5V supply, and requires no
crystal or clock.
Their 10BASE-FL transmitter offers a current drive output
that directly drives a fiber optic LED transmitter. Their
receiver offers a highly stable fiber optic data quantizer
capable of accepting input signals as low as 2mV
P-P
with
a 55dB dynamic range.
The 10BASE-T portion of the pair contains current driven
transmitter outputs that offer superior performance
because their switching is highly symmetric, resulting in
lowered RFI noise and jitter. By changing one external
resistor the pair easily interfaces to 100W unshielded
twisted pair, 150W shielded twisted pair, or a range of
other characteristic impedances.
FEATURES
s
s
s
Full duplex operation
Five network status LED outputs
Industrial temperature option
10BASE-FL FEATURES:
s
Highly stable data quantizer with 55dB input dynamic
range
Input sensitivity as low as 2mV
P-P
Up to 100mA maximum current driven fiber optic LED
output for accurate launch power (PLCC package)
s
s
10BASE-T FEATURES:
s
s
Current driven output for low RFI noise and low jitter
Drives 100W unshielded or 150W shielded twisted pair
The ML4664 does not pass along disconnect information,
while the ML4669 does. A loss of light at the optical
s
Polarity detect status pin capable of driving an LED
inputs does not stop link pulses from being sent at the
twisted pair transmitter in the ML4664, but in the
s
Automatic polarity correction
ML4669 the link pulses stop. Also, a loss of link at the
twisted pair inputs will not stop the optical transmitter
s
On-chip link test with enable/disable option
from sending idle in the ML4664, but the ML4669 stops
sending idle. * Some Packages Are Obsolete
BLOCK DIAGRAM
LTF
LINK PULSE
CHECK
TPLED
POLDIS
IDLE
GENERATOR
RRSETRTSETOP
TPIN
2
RX SQUELCH
TP
OP
TX
OPOUT
OPVCC
POLARITY
CORRECT
LINK PULSE
GENERATOR
RX SQUELCH
TP
TPOUT
2
RTSETTP
TP
TX
TxCAP0TxCAP1
LMON
(LOW LIGHT)
THRESHOLD
GENERATOR
QUANTIZER
OPLED
V
DC
C
TIMER
2
OPIN
1
元器件交易网
ML4664/ML4669
PIN CONFIGURATION
ML4664/ML4669
28-Pin PLCC (Q28)
C
T
I
M
E
R
O
P
L
E
D
O
P
I
N
P
T
P
L
E
D
T
P
I
N
P
A
V
C
C
L
T
F
24
TPINN
V
CC
TxCAP0
TxCAP1
GND
TPOUTN
TPOUTP
5
6
7
8
9
10
11
31282726
25
24
23
22
21
20
19
OPINN
AGND
V
THADJ
V
REF
V
DC
GND
OPOUT
718
V
C
C
R
R
S
E
T
P
O
L
D
I
S
R
T
S
E
T
P
L
M
O
N
TOP VIEW
C
T
I
M
E
R
ML4664/ML4669
32-Pin TQFP (H32-7)
O
P
L
E
D
O
P
I
N
P
T
P
L
E
D
T
P
I
N
P
A
V
C
C
L
T
F
N
C
TPINN
NC
V
CC
TxCAP0
TxCAP1
GND
TPOUTN
TPOUTP
32313
24
1
2
3
4
5
6
7
8
9
23
22
21
20
19
18
17
16
R
T
S
E
T
O
P
O
P
V
C
C
OPINN
AGND
V
THADJ
V
REF
V
DC
NC
GND
OPOUT
R
T
S
E
T
P
R
R
S
E
T
R
T
S
E
T
O
P
P
O
L
D
I
S
L
M
O
N
N
C
V
C
C
TOP VIEW
2
O
P
V
C
C
元器件交易网
ML4664/ML4669
PINNAMEFUNCTION
PIN DESCRIPTION
(Pin Number in Parentheses is for TQFP Version)
PINNAMEFUNCTION
1(29)C
TIMER
A capacitor from this pin to V
CC
determines the Link Monitor response
time.
Link Test Fail. Active high. Normally
this pin is low, indicating that the link
is operational. If the link goes down
resulting from the absence of link
pulses or frames being received, the
chip will go into the Link Test Fail
state and bring LTF high.
When the ML4664 is in the link test
fail state, the optical and twisted pair
transmitters are disabled from sending
data. However, the optical transmitter
does send an idle signal, and link
pulses are sent at the twisted pair
transmitter. When the ML4669 is in
link test fail state, the optical and
twisted pair transmitters are disabled
from sending data. Also, the optical
transmitter will not send an idle
signal. However, link pulses may be
sent at the twisted pair transmitter,
depending on the optical inputs. See
Table 1.
This pin may be grounded to disable
Link Test. In this mode no link pulses
are sent and the link will not fail if no
link pulses are received. If this pin is
not used as an LED driver, and is not
grounded, a 2kW 5% resistor should
be connected between this pin and
V
CC
.
7(4)
8(5)
TxCAP0
TxCAP1
2(30)LTF
An external capacitor of 680pF is
tied between these two pins to set
the pulse width for the pre-
equalization on the twisted pair
transmitter. If these two pins are
shorted together, no pre-equalization
occurs. If the ML4664/ML4669 is
driving only a short cable, or board
traces, these pins may be shorted.
Ground reference9(6)GND
20(18)
10(7)
11(8)
TPOUTNPre-equalized differential balanced
TPOUTPcurrent driven output. These outputs
are connected to a balanced transmit
output filter which drives the twisted
pair cable through pulse transformers.
The output current is set with an
external resistor connected to RTSET
allowing the chip to drive 100W
unshielded , 150W shielded twisted
pair cables or a range of other
characteristic impedances.
Receive Polarity status. Active low
LED Driver, open collector output.
Indicates the polarity of the receive
twisted pair regardless of auto polarity
correction. When low, receive polarity
is reversed. When high, receive
polarity is correct. This pin may be
grounded to disable the polarity
circuit. If this pin is not used as an
LED driver, and is not grounded, a
2kW, 5% resistor should be connected
between this pin and V
CC
.
12(10)POLDIS
3(31)TPLEDIndicates that reception is taking place
on the TPINP, TPINN pair. Active low
LED driver, open collector. It is
extended 16ms for visibility.
Optionally, this pin may be grounded
to disable the optical output. If this
pin is not used as an LED driver and is
not grounded, a 2kW, 5% resistor
should be connected between TPLED
and V
CC
.
Twisted Pair receive data input.
When this signal exceeds the
receive squelch requirements the
receive data is buffered and sent
to the Rx± outputs.
5V input
13(11)RTSETTPWhen using 100W unshielded twisted
pair, a 220W resistor is tied between
this pin and V
CC
. When using 150W
shielded twisted pair, a 330W resistor
is tied between this pin and V
CC
.
15(13)RRSETA 1% 61.9kW resistor tied from this
pin to V
CC
is used for internal biasing.
4(32)
5(1)
TPINP
TPINN
16(14)RTSETOPSets the current driven output of the
transmitter. A 115W resistor should be
tied between this pin and V
CC
.
6(3)V
CC
14(12)
3
元器件交易网
ML4664/ML4669
PIN DESCRIPTION
(Continued)
PINNAMEFUNCTIONPINNAMEFUNCTION
17(15)LMONLink Monitor “Low Light” LED status
output. Pulled low when voltage on
the OPINP, OPINN inputs exceed min
threshold set by V
THADJ
, and there are
transitions on OPINP, OPINN
indicating an idle signal or active
data. If the voltage on OPINP,OPINN
inputs falls below the minimum
threshold or transitions cease on
OPINP, OPINN, LMON will go high.
Active low LED driver, open collector.
In the low light state, optical and
twisted pair transmitters are disabled
from sending data. The optical
transmitter of the ML4664 does send
an idle signal, and link pulses are sent
at the twisted pair transmitter. For the
ML4669, the twisted pair transmitter
will not send link pulses, the optical
transmitter may send an idle signal,
depending on inputs. See Table 1.
22(21)V
REF
23(22)V
THADJ
24(23)AGND
25(24)OPINN
A 2.5V reference with respect to GND
This input pin sets the link monitor
threshold
Analog Filtered Ground
This input pin should be capacitively
coupled to filtered AV
CC
. The input
resistance is approximately 1.3kW.
This input pin should be capacitively
coupled to the input source. The input
resistance is approximately 1.3kW.
Analog Filtered 5V
Indicates reception is taking place on
the OPINP, OPINN pair. Active low
LED driver, open collector. It is
extended 16ms for usability. This pin
may be grounded to disable the
twisted pair outputs. If this pin is not
used as an LED driver, and is not
grounded, a 2kW, 5% resistor should
be connected between this pin and
V
CC
.
26(25)OPINP
27(26)AV
CC
28(28)OPLED
18(16)OPVCC
19(17)OPOUT
21(20)V
DC
5V supply for fiber optic
LED driver
Fiber optic LED driver output
An external capacitor on this pin
integrates an error signal which nulls
the offset of the input amplifier. If the
DC feedback loop is not being used,
this pin should be connected to V
REF
.
4
元器件交易网
ML4664/ML4669
Thermal Resistance (q
JA
)
68°C/W
80ºC/W
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond
which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and
functional device operation is not implied.
Power Supply Voltage Range
V
CC
...................................................................
GND –0.3 to 6V
Input Voltage Range: Digital Inputs
(SQEN, LBDIS).......................GND –0.3 to V
CC
+0.3V
Tx+, Tx–, V
IN
+, V
IN
–..............GND –0.3 to V
CC
+0.3V
150°C
–65°C to 150°C
Lead Temperature (Soldering)................................260°C
OPERATING CONDITIONS
Temperature Range
0°C to 70°C
–40°C to 85°C
Supply Voltage (V
CC
).........................................5V ± 5%
LED 10mA
61.9kW ± 1%
115W ± 1%
220W ± 1%
ELECTRICAL CHARACTERISTICS
SYMBOL
I
CC
V
REF
Unless otherwise specified, T
A
= Operating Temperature Range, V
CC
= OPV
CC
= AV
CC
= 5V ± 5% (Note 1)
PARAMETER
Power Supply Current
While Transmitting
Reference Voltage
CONDITIONS
RTSETOP = 115W
C Suffix
I Suffix
MINTYPMAX
140
UNITS
mA
V
V
V
mA
mA
mA
2.30
2.25
1.5
47
46
42
300450
50
300
4
52
2.60
2.67
3.5
57
58.5
V
OL
I
OPOUT
LED Drivers: V
OL
OP Transmit Peak Output Current
R
L
= 300 for OPLED, TPLED,
POLLED LTF, and LMON
RTSETOP = 115 (Note 2)C Suffix
I Suffix
I
TPOUT
V
TPSQ
H
TP
V
TPIN
R
TPIN
V
OPTH
H
OP
V
OPIN
R
OPIN
V
OPCM
A
V
V
OFF
V
N
I
TH
TP Transmit Peak Output Current
TP Receive Squelch Voltage
TP Receive Squelch Hysteresis
TP Receive Input Voltage
TP Receive Input Resistance
OP Receive Input Threshold
Voltage
OP Receive Input Threshold
Hysteresis
OP Receive Input Voltage
OP Receive Input Resistance
OP Receive Common Mode
Voltage
Amplifier Gain
Input Offset
Input Referred Noise
Input Bias Current at V
THADJ
RTSETTP = 220
585mV
P-P
%
3100mV
P-P
kW
V
THADJ
= V
REF
56
20
7mV
P-P
%
2
0.81.3
1.65
100
V
DC
= V
REF
(DC Loop Inactive)
50MHz Bandwidth
V
THADJ
= V
REF
–200
3
25
0
1600
2.0
mV
P-P
kW
V
V/V
mV
µV
200µA
5
元器件交易网
ML4664/ML4669
ELECTRICAL CHARACTERISTICS
(Continued)
SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITS
OP TO TP (SEE FIGURE 1)
t
TPODY
t
TPSDY
t
TPSPW
t
PS
Twisted Pair Start-up Delay
Twisted Pair Steady State Delay
Twisted Pair Turn Off Pulse Width
Twisted Pair Jitter
180
±3.5
500
35
ns
ns
ns
ns
TP TO OP (SEE FIGURE 2)
t
OPODY
t
OPSDY
t
OPDI
1/t
IDF
P
IDC
t
OPJ
Optical Transmit Start-up Delay
Steady State Delay
Turn Off Width from Data to Idle
Idle Frequency
Idle Duty Cycle
Jitter into 31W Load
400
0.85
45
500
15
2100
1.25
55
±1.5
ns
ns
ns
MHz
%
ns
OPTICAL LINK VERIFICATION (SEE FIGURES 3-5)
t
OLL
t
OLM
t
OLO
No Light (No Transitions) to
LMON High
Low Light (Below Threshold) to
LMON High
Light On (Above Threshold, Transitions
<3µs) to LMON Low
3
50
0.25
100
0.5
10
200
0.75
µs
µs
s
TWISTED PAIR LINK VERIFICATION (SEE FIGURE 6)
t
LT
t
LTMIN
t
LTMAX
Link Loss Time
Link Time Minimum
Link Time Maximum
50
2
25
150
7
150
ms
ms
ms
LINK PULSE TRANSMIT (SEE FIGURE 7)
t
LPRR
t
LPW
Link Pulse Rep Rate
Link Pulse Width
8
85
16
120
24
200
ms
ns
LED TIMING (SEE FIGURE 8)
t
LED
LED on Time81632ms
Note 1:
Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions.
Note 2:
The output current may be increased to 100mA by changing the RTSETOP resistor for the CQ (PLCC) package option only. See equation (1) on page 9. The increased
current option is not available for the CH (TQFP) package option.
6
元器件交易网
ML4664/ML4669
VALID
t
TPODY
DATA
t
TPSDY
VALIDDATA
OPINP
OPINN
t
TPSPW
TPOUTP
TPOUTN
Figure 1. OP to TP Timing Diagram
TPINP
TPINN
t
OPODY
I(OPOUT)
t
OPSDY
t
OPDI
t
IDF
Figure 2. TP to OP Timing Diagram
OPINP
OPINN
t
OLL
LMON
Figure 3. Optical Link Verification No Light Timing Diagram
OPINP
OPINN
V
TH
t
OLM
LMON
Figure 4. Optical Link Verification Low Light Timing Diagram
7
元器件交易网
ML4664/ML4669
OPINP
OPINN
t
OLO
LMON
Figure 5. Optical Link Verification Light On Timing Diagram
TPINP
TPINN
VALID DATA OR LINK PULSE
LTF
t
LT
t
LTMIN,
t
LTMAX
TPINP
TPINN
Figure 6. Twisted Pair Link Verification Timing Diagram
TPOUTP
TPOUTN
t
LPW
t
LPRR
Figure 7. Link Pulse Transmit Timing Diagram
TPINP, TPINN
OR
OPINP, OPINN
VALIDDATA
t
LED
TPLED
OR
OPLED
Figure 8. LED Timing Diagram
8
元器件交易网
ML4664/ML4669
2. All continuous sinusoidal signals of amplitude less
than 6.2V
P–P
and frequency less than 2MHz.
single sinusoidal cycles of amplitude less than
6.2V
P–P
and either polarity, where the frequency is
between 2MHz and 15MHz. For a period of 4 BT
before and after this single cycle, the signal will
conform to (1) above.
sinusoidal cycles gated by a 100ns pulse gate of
amplitude less than 6.2V
P–P
and either polarity, where
the sinusoidal frequency is between 2MHz and
30MHz. The off time of the pulse gate on the
sinusoidal signal shall be at least 400ns.
The first three receive squelch criteria are required to
conform to the 10BASE-T standard. The fourth receive
squelch criteria exceeds the 10BASE-T requirements and
enhances performance. The fourth squelch criteria
prevents a false unsquelch caused by cross talk or noise
typically found coupling from the phone lines onto the
receive twisted pair.
After the TP inputs are unsquelched, the detection
threshold is lowered to 225mV. Upon passing the TP
squelch requirements the receive data passes to the LED
Driver. The addition of jitter through the TP to OP path is
no more than ±1.5ns.
While in the unsquelch state, the TP squelch circuit looks
for the start of idle signal at the end of the packet. When
start of idle is detected, TP squelch is turned on again. The
proper start of idle occurs when the input signal remains
above 300mV for 160ns.
SYSTEM DESCRIPTION
OPTICAL TRANSMISSION
The optical transmit function consists of detecting the
presence of data from the TP inputs TPINP and TPINN and
driving that data onto the fiber optic LED transmitter. A
positive signal on the TPINP lead relative to the TPINN
lead will result in no current, hence the fiber optic LED is
in a low light condition. When TPINP is more negative
than TPINN, the ML4664/ML4669 will sink current into
the chip and the fiber optic LED will light up.
Before data will be transmitted onto the fiber optic cable
it must exceed the squelch requirements. The TP inputs,
squelch circuit serves the function of preventing any noise
from being transmitted onto the fiber.
FIBER OPTIC LED DRIVER
The output stage of the transmitter is a current mode
switch which develops the output light by sinking current
through the LED into the OPOUT pin. Once the current
requirement for the LED is determined, the RTSETOP
resistor is selected. The following equation is used to
select the correct RTSETOP resistor:
RTSETOP
=