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TI TPS650732 AM3517 05 电源参考设计手册说明书

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2024年4月16日发(作者:夏侯思宸)

ReferenceDesign

SLVA411–April2010

AM3517/05PowerReferenceDesign3.6-Vto6.3-VInput,

High-Efficiency,Integrated5-OutputPMIC

Thisdesignwascreatedtohelpthosedesignersdesiringanoptimizedandhighlyintegratedpower

powermanagementintegrated

circuit(PMIC)topoweryourprocessorcangreatlyreducethenumberofcomponentsandoverallsizeof

yourdesign.

1Introduction

Theinputvoltagerangeofthesedesignsis3.6Vto6.3V,whichallowsforoperationusingadc,USB,or

650732hasthreedc/dcstep-downconverters,twoLDOs,batterycharger,

touchscreenInterface,andawhiteLEDboostconverter.

TheAM3505andAM3517processorscanbeoperatedwithVDDSHVconfiguredfor3.3-Voperationas

ingontheuser'sdesign,differentrequirements(options)areavailable

AM3505andAM3517datamanualfordetails.

Thisdocumentproposesonepowersolutioneachfor3.3-Voperationandfor1.8-Voperationbasedon

theTPS650732.

2TPS650732-BasedDesignFeatures

3.6-Vto6.3-VInputVoltageRange

Charger/PowerPathManagement:

–2-AOutputCurrentonthePowerPath

–LinearCharger;1.5-AMaximumChargeCurrent

–100-mA/500-mA/800-mA/1300-mACurrentLimitFromUSBInput

–ThermalRegulation,SafetyTimers

–TemperatureSenseInput

ThreeStep-DownConverters:

–2.25-MHz,Fixed-FrequencyOperationforSmallComponentSize

–PowerSaveModeatLightLoadCurrent

–Typical19µAQuiescentperConverter

–100%DutyCycleforLowestDropout

TwoLDOs(200-mAOutputCurrentEach)

–Fixed-OutputVoltage

–DynamicVoltageScalingonLDO2

–20-µAQuiescentCurrent

WLEDBoostConverter:

–InternalDimmingUsingI

2

C

–Upto2×10LEDs

–Upto25mAperStringWithInternalCurrentSink

I

2

CInterface

10-BitA/DConverter

TouchScreenInterface

AM3517/05PowerReferenceDesign3.6-Vto6.3-VInput,High-Efficiency,

Integrated5-OutputPMIC

SLVA411–April2010

SubmitDocumentationFeedback

1

PowerRequirements

3PowerRequirements

ThepowerrequirementsfortheAM3517/05devicesarelistedinTable1.

Formoreinformationandotherreferencedesigns,/processorpower.

3517/05PowerRequirements

PinName

CoreVDD_CORE

VDDS

VDDSHV

VDDS_SRAM_CORE_BG,

VDDS_SRAM_MPU,

VDDSOSC

VDDS_DPLL_PER_CORE,

VDDS_DPLL_MPU_USBHOST

VDDA1P8V_USBPHY,

VDDA_DAC

VDDA3P3V_USBPHY

(1)

Voltage

(V)

1.2

1.8V

(1)

Imax

(mA)

1500

400

600

200

50

Tolerance

±3%

±5%

±5%

±5%

±5%

Sequencing

Order

4

1

2

3

Timing

Delay

Comments

24-mVripple(pk-pk)atanyfrequency

50-mVripple(pk-pk)

MaybecombinedwithVDDS

if1.8Visused

3.3/1.8

1.8V

1.8

5

VDDA_DAC:

●0-100kHz<30mVp-p

●>100kHzDecreases20dB/dec.

Ex:at1MHzthemaxis3mVp-p.

1.8

3.3

115

10

±5%

±5%

6

6

For1.8-Voperation,VDDS18,VDDS_SRAM_CORE_BG,VDDS_SRAM_MPU,VDDSOSC,andVDDSHVcanbegroupedand

powereduptogether

2

AM3517/05PowerReferenceDesign3.6-Vto6.3-VInput,High-Efficiency,

Integrated5-OutputPMIC

SLVA411–April2010

SubmitDocumentationFeedback

2024年4月16日发(作者:夏侯思宸)

ReferenceDesign

SLVA411–April2010

AM3517/05PowerReferenceDesign3.6-Vto6.3-VInput,

High-Efficiency,Integrated5-OutputPMIC

Thisdesignwascreatedtohelpthosedesignersdesiringanoptimizedandhighlyintegratedpower

powermanagementintegrated

circuit(PMIC)topoweryourprocessorcangreatlyreducethenumberofcomponentsandoverallsizeof

yourdesign.

1Introduction

Theinputvoltagerangeofthesedesignsis3.6Vto6.3V,whichallowsforoperationusingadc,USB,or

650732hasthreedc/dcstep-downconverters,twoLDOs,batterycharger,

touchscreenInterface,andawhiteLEDboostconverter.

TheAM3505andAM3517processorscanbeoperatedwithVDDSHVconfiguredfor3.3-Voperationas

ingontheuser'sdesign,differentrequirements(options)areavailable

AM3505andAM3517datamanualfordetails.

Thisdocumentproposesonepowersolutioneachfor3.3-Voperationandfor1.8-Voperationbasedon

theTPS650732.

2TPS650732-BasedDesignFeatures

3.6-Vto6.3-VInputVoltageRange

Charger/PowerPathManagement:

–2-AOutputCurrentonthePowerPath

–LinearCharger;1.5-AMaximumChargeCurrent

–100-mA/500-mA/800-mA/1300-mACurrentLimitFromUSBInput

–ThermalRegulation,SafetyTimers

–TemperatureSenseInput

ThreeStep-DownConverters:

–2.25-MHz,Fixed-FrequencyOperationforSmallComponentSize

–PowerSaveModeatLightLoadCurrent

–Typical19µAQuiescentperConverter

–100%DutyCycleforLowestDropout

TwoLDOs(200-mAOutputCurrentEach)

–Fixed-OutputVoltage

–DynamicVoltageScalingonLDO2

–20-µAQuiescentCurrent

WLEDBoostConverter:

–InternalDimmingUsingI

2

C

–Upto2×10LEDs

–Upto25mAperStringWithInternalCurrentSink

I

2

CInterface

10-BitA/DConverter

TouchScreenInterface

AM3517/05PowerReferenceDesign3.6-Vto6.3-VInput,High-Efficiency,

Integrated5-OutputPMIC

SLVA411–April2010

SubmitDocumentationFeedback

1

PowerRequirements

3PowerRequirements

ThepowerrequirementsfortheAM3517/05devicesarelistedinTable1.

Formoreinformationandotherreferencedesigns,/processorpower.

3517/05PowerRequirements

PinName

CoreVDD_CORE

VDDS

VDDSHV

VDDS_SRAM_CORE_BG,

VDDS_SRAM_MPU,

VDDSOSC

VDDS_DPLL_PER_CORE,

VDDS_DPLL_MPU_USBHOST

VDDA1P8V_USBPHY,

VDDA_DAC

VDDA3P3V_USBPHY

(1)

Voltage

(V)

1.2

1.8V

(1)

Imax

(mA)

1500

400

600

200

50

Tolerance

±3%

±5%

±5%

±5%

±5%

Sequencing

Order

4

1

2

3

Timing

Delay

Comments

24-mVripple(pk-pk)atanyfrequency

50-mVripple(pk-pk)

MaybecombinedwithVDDS

if1.8Visused

3.3/1.8

1.8V

1.8

5

VDDA_DAC:

●0-100kHz<30mVp-p

●>100kHzDecreases20dB/dec.

Ex:at1MHzthemaxis3mVp-p.

1.8

3.3

115

10

±5%

±5%

6

6

For1.8-Voperation,VDDS18,VDDS_SRAM_CORE_BG,VDDS_SRAM_MPU,VDDSOSC,andVDDSHVcanbegroupedand

powereduptogether

2

AM3517/05PowerReferenceDesign3.6-Vto6.3-VInput,High-Efficiency,

Integrated5-OutputPMIC

SLVA411–April2010

SubmitDocumentationFeedback

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