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FPGA可编程逻辑器件芯片EP2S30F672I4NN中文规格书
2024年5月21日发(作者：冼听云)
I/O Delays
See Tables5–72 through 5–76 for I/O delays.
Table5–72.I/O Delay Parameters
Symbol
t
DIP
t
OP
t
PCOUT
t
PI
Parameter
Delay from I/O datain to output pad
Delay from I/O output register to output pad
Delay from input pad to I/O dataout to core
Delay from input pad to I/O input register
Table5–xII I/O Input Delay for Column Pins(Part 1 of3)
Minimum Timing
I/O Standard
LVTTL
Parameter
t
PI
Industrial
674
-3 Speed-3 Speed
-4 Speed -5 Speed
GradeGrade
Unit
GradeGrade
Commercial
(2)(3)
707 1223 1282 1405 1637 ps
428 787 825 904 1054 ps
717 1210 1269 1390 1619 ps
t
PCOUT
2.5 Vt
PI
t
PCOUT
1.8 Vt
PI
t
PCOUT
1.5 Vt
PI
t
PCOUT
LVCMOS
t
PI
t
PCOUT
SSTL-2 Class It
PI
t
PCOUT
SSTL-2 Class IIt
PI
t
PCOUT
SSTL-18 Class It
PI
t
PCOUT
SSTL-18 Class IIt
PI
t
PCOUT
1.5-V HSTL
ClassI
t
PI
t
PCOUT
408
684
418
747
481
749
483
674
408
507
241
507
241
438 774 812 889 1036 ps
783
504
786
507
707
1366 1433 1570 1829 ps
930 976 1069 1246 ps
1436 1506 1650 1922 ps
1000 1049 1149 1339 ps
1223 1282 1405 1637 ps
428 787 825 904 1054 ps
530 818 857 939 1094 ps
251 382 400 438 511 ps
530 818 857 939 1094 ps
251 382 400 438 511 ps
543 569 898 941 1031 1201 ps
277 290 462 484 530 618 ps
543 569 898 941 1031 1201 ps
277
560
294
290 462 484 530 618 ps
587 993 1041 1141 1329 ps
308 557 584 640 746 ps
Stratix II Device Handbook, Volume 1
DC & Switching Characteristics
Table5–xII I/O Output Delay for Column Pins(Part 3 of8)
Minimum Timing
I/O Standard
Drive
Parameter
Strength
2 mAt
OP
t
DIP
4 mAt
OP
t
DIP
6 mAt
OP
t
DIP
8 mAt
OP
t
DIP
10 mAt
OP
t
DIP
12 mA
(1)
1.5 V2 mA
t
OP
t
DIP
t
OP
t
DIP
4 mAt
OP
t
DIP
6 mAt
OP
t
DIP
8 mA (1)t
OP
t
DIP
SSTL-2 Class I8 mAt
OP
t
DIP
12 mA
(1)
SSTL-2 Class II16 mA
t
OP
t
DIP
t
OP
t
DIP
20 mAt
OP
t
DIP
24 mA
(1)
t
OP
t
DIP
Industrial
1042
1062
1047
1067
974
994
976
996
933
953
934
954
1023
1043
963
983
966
986
926
946
913
933
896
916
876
896
877
897
872
892
-3-3
-4-5
Speed Speed
Speed Speed Unit
Commercial
Grade Grade
Grade Grade
(3)(4)
1093
1115
1098
1120
1022
1044
1024
1046
978
1000
979
1001
1073
1095
1009
1031
1012
1034
971
993
957
979
940
962
918
940
919
941
915
937
2904 3048 3338 3472 ps
2970 3118 3414 3562 ps
2248 2359 2584 2698 ps
2314 2429 2660 2788 ps
2024 2124 2326 2434 ps
2090 2194 2402 2524 ps
1947 2043 2238 2343 ps
2013 2113 2314 2433 ps
1882 1975 2163 2266 ps
1948 2045 2239 2356 ps
1833 1923 2107 2209 ps
1899 1993 2183 2299 ps
2505 2629 2879 3002 ps
2571 2699 2955 3092 ps
2023 2123 2325 2433 ps
2089 2193 2401 2523 ps
1923 2018 2210 2315 ps
1989 2088 2286 2405 ps
1878 1970 2158 2262 ps
1944 2040 2234 2352 ps
1715 1799 1971 2041 ps
1781 1869 2047 2131 ps
1672 1754 1921 1991 ps
1738 1824 1997 2081 ps
1609 1688 1849 1918 ps
1675 1758 1925 2008 ps
1598 1676 1836 1905 ps
1664 1746 1912 1995 ps
1596 1674 1834 1903 ps
1662 1744 1910 1993 ps
1.8 V
Stratix II Device Handbook, Volume 1
Timing Model
Table5–xII I/O Output Delay for Column Pins(Part 4 of8)
Minimum Timing
I/O Standard
Drive
Parameter
Strength
4 mAt
OP
t
DIP
6 mAt
OP
t
DIP
8 mAt
OP
t
DIP
10 mAt
OP
t
DIP
12 mA
(1)
SSTL-18
ClassII
8 mA
t
OP
t
DIP
t
OP
t
DIP
16 mAt
OP
t
DIP
18 mAt
OP
t
DIP
20 mA
(1)
1.8-V HSTL
ClassI
4 mA
t
OP
t
DIP
t
OP
t
DIP
6 mAt
OP
t
DIP
8 mAt
OP
t
DIP
10 mAt
OP
t
DIP
12 mA
(1)
t
OP
t
DIP
Industrial
909
929
914
934
894
914
898
918
891
911
883
903
894
914
890
910
890
910
912
932
917
937
896
916
900
920
892
912
-3-3
-4-5
Speed Speed
Speed Speed Unit
Commercial
Grade Grade
Grade Grade
(3)(4)
953
975
958
980
937
959
942
964
936
958
925
947
937
959
933
955
933
955
956
978
962
984
940
962
944
966
936
958
1690 1773 1942 2012 ps
1756 1843 2018 2102 ps
1656 1737 1903 1973 ps
1722 1807 1979 2063 ps
1640 1721 1885 1954 ps
1706 1791 1961 2044 ps
1638 1718 1882 1952 ps
1704 1788 1958 2042 ps
1626 1706 1869 1938 ps
1692 1776 1945 2028 ps
1597 1675 1835 1904 ps
1663 1745 1911 1994 ps
1578 1655 1813 1882 ps
1644 1725 1889 1972 ps
1585 1663 1821 1890 ps
1651 1733 1897 1980 ps
1583 1661 1819 1888 ps
1649 1731 1895 1978 ps
1608 1687 1848 1943 ps
1674 1757 1924 2033 ps
1595 1673 1833 1928 ps
1661 1743 1909 2018 ps
1586 1664 1823 1917 ps
1652 1734 1899 2007 ps
1591 1669 1828 1923 ps
1657 1739 1904 2013 ps
1585 1663 1821 1916 ps
1651 1733 1897 2006 ps
SSTL-18
ClassI
Stratix II Device Handbook, Volume 1
DC & Switching Characteristics
Altera Corporation
April 2011
Stratix II Device Handbook, Volume 1
Timing Model
Table5–xII I/O Output Delay for Column Pins(Part 6 of8)
Minimum Timing
I/O Standard
Drive
Parameter
Strength
t
OP
t
DIP
t
OP
t
DIP
Differential 16 mA
SSTL-2 Class II
20 mA
t
OP
t
DIP
t
OP
t
DIP
24 mA t
OP
t
DIP
Differential
SSTL-18
ClassI
4 mA t
OP
t
DIP
6 mA t
OP
t
DIP
8 mA t
OP
t
DIP
10 mA t
OP
t
DIP
12 mA t
OP
t
DIP
Differential
SSTL-18
ClassII
8 mA t
OP
t
DIP
16 mA t
OP
t
DIP
18 mA t
OP
t
DIP
20 mA t
OP
t
DIP
Industrial
913
933
896
916
876
896
877
897
872
892
909
929
914
934
894
914
898
918
891
911
883
903
894
914
890
910
890
910
-3-3
-4-5
Speed Speed
Speed Speed Unit
Commercial
Grade Grade
Grade Grade
(3)(4)
957
979
940
962
918
940
919
941
915
937
953
975
958
980
937
959
942
964
936
958
925
947
937
959
933
955
933
955
1715 1799 1971 2041 ps
1781 1869 2047 2131 ps
1672 1754 1921 1991 ps
1738 1824 1997 2081 ps
1609 1688 1849 1918 ps
1675 1758 1925 2008 ps
1598 1676 1836 1905 ps
1664 1746 1912 1995 ps
1596 1674 1834 1903 ps
1662 1744 1910 1993 ps
1690 1773 1942 2012 ps
1756 1843 2018 2102 ps
1656 1737 1903 1973 ps
1722 1807 1979 2063 ps
1640 1721 1885 1954 ps
1706 1791 1961 2044 ps
1638 1718 1882 1952 ps
1704 1788 1958 2042 ps
1626 1706 1869 1938 ps
1692 1776 1945 2028 ps
1597 1675 1835 1904 ps
1663 1745 1911 1994 ps
1578 1655 1813 1882 ps
1644 1725 1889 1972 ps
1585 1663 1821 1890 ps
1651 1733 1897 1980 ps
1583 1661 1819 1888 ps
1649 1731 1895 1978 ps
Differential 8 mA
SSTL-2 Class I
12 mA
Stratix II Device Handbook, Volume 1
2024年5月21日发(作者：冼听云)
I/O Delays
See Tables5–72 through 5–76 for I/O delays.
Table5–72.I/O Delay Parameters
Symbol
t
DIP
t
OP
t
PCOUT
t
PI
Parameter
Delay from I/O datain to output pad
Delay from I/O output register to output pad
Delay from input pad to I/O dataout to core
Delay from input pad to I/O input register
Table5–xII I/O Input Delay for Column Pins(Part 1 of3)
Minimum Timing
I/O Standard
LVTTL
Parameter
t
PI
Industrial
674
-3 Speed-3 Speed
-4 Speed -5 Speed
GradeGrade
Unit
GradeGrade
Commercial
(2)(3)
707 1223 1282 1405 1637 ps
428 787 825 904 1054 ps
717 1210 1269 1390 1619 ps
t
PCOUT
2.5 Vt
PI
t
PCOUT
1.8 Vt
PI
t
PCOUT
1.5 Vt
PI
t
PCOUT
LVCMOS
t
PI
t
PCOUT
SSTL-2 Class It
PI
t
PCOUT
SSTL-2 Class IIt
PI
t
PCOUT
SSTL-18 Class It
PI
t
PCOUT
SSTL-18 Class IIt
PI
t
PCOUT
1.5-V HSTL
ClassI
t
PI
t
PCOUT
408
684
418
747
481
749
483
674
408
507
241
507
241
438 774 812 889 1036 ps
783
504
786
507
707
1366 1433 1570 1829 ps
930 976 1069 1246 ps
1436 1506 1650 1922 ps
1000 1049 1149 1339 ps
1223 1282 1405 1637 ps
428 787 825 904 1054 ps
530 818 857 939 1094 ps
251 382 400 438 511 ps
530 818 857 939 1094 ps
251 382 400 438 511 ps
543 569 898 941 1031 1201 ps
277 290 462 484 530 618 ps
543 569 898 941 1031 1201 ps
277
560
294
290 462 484 530 618 ps
587 993 1041 1141 1329 ps
308 557 584 640 746 ps
Stratix II Device Handbook, Volume 1
DC & Switching Characteristics
Table5–xII I/O Output Delay for Column Pins(Part 3 of8)
Minimum Timing
I/O Standard
Drive
Parameter
Strength
2 mAt
OP
t
DIP
4 mAt
OP
t
DIP
6 mAt
OP
t
DIP
8 mAt
OP
t
DIP
10 mAt
OP
t
DIP
12 mA
(1)
1.5 V2 mA
t
OP
t
DIP
t
OP
t
DIP
4 mAt
OP
t
DIP
6 mAt
OP
t
DIP
8 mA (1)t
OP
t
DIP
SSTL-2 Class I8 mAt
OP
t
DIP
12 mA
(1)
SSTL-2 Class II16 mA
t
OP
t
DIP
t
OP
t
DIP
20 mAt
OP
t
DIP
24 mA
(1)
t
OP
t
DIP
Industrial
1042
1062
1047
1067
974
994
976
996
933
953
934
954
1023
1043
963
983
966
986
926
946
913
933
896
916
876
896
877
897
872
892
-3-3
-4-5
Speed Speed
Speed Speed Unit
Commercial
Grade Grade
Grade Grade
(3)(4)
1093
1115
1098
1120
1022
1044
1024
1046
978
1000
979
1001
1073
1095
1009
1031
1012
1034
971
993
957
979
940
962
918
940
919
941
915
937
2904 3048 3338 3472 ps
2970 3118 3414 3562 ps
2248 2359 2584 2698 ps
2314 2429 2660 2788 ps
2024 2124 2326 2434 ps
2090 2194 2402 2524 ps
1947 2043 2238 2343 ps
2013 2113 2314 2433 ps
1882 1975 2163 2266 ps
1948 2045 2239 2356 ps
1833 1923 2107 2209 ps
1899 1993 2183 2299 ps
2505 2629 2879 3002 ps
2571 2699 2955 3092 ps
2023 2123 2325 2433 ps
2089 2193 2401 2523 ps
1923 2018 2210 2315 ps
1989 2088 2286 2405 ps
1878 1970 2158 2262 ps
1944 2040 2234 2352 ps
1715 1799 1971 2041 ps
1781 1869 2047 2131 ps
1672 1754 1921 1991 ps
1738 1824 1997 2081 ps
1609 1688 1849 1918 ps
1675 1758 1925 2008 ps
1598 1676 1836 1905 ps
1664 1746 1912 1995 ps
1596 1674 1834 1903 ps
1662 1744 1910 1993 ps
1.8 V
Stratix II Device Handbook, Volume 1
Timing Model
Table5–xII I/O Output Delay for Column Pins(Part 4 of8)
Minimum Timing
I/O Standard
Drive
Parameter
Strength
4 mAt
OP
t
DIP
6 mAt
OP
t
DIP
8 mAt
OP
t
DIP
10 mAt
OP
t
DIP
12 mA
(1)
SSTL-18
ClassII
8 mA
t
OP
t
DIP
t
OP
t
DIP
16 mAt
OP
t
DIP
18 mAt
OP
t
DIP
20 mA
(1)
1.8-V HSTL
ClassI
4 mA
t
OP
t
DIP
t
OP
t
DIP
6 mAt
OP
t
DIP
8 mAt
OP
t
DIP
10 mAt
OP
t
DIP
12 mA
(1)
t
OP
t
DIP
Industrial
909
929
914
934
894
914
898
918
891
911
883
903
894
914
890
910
890
910
912
932
917
937
896
916
900
920
892
912
-3-3
-4-5
Speed Speed
Speed Speed Unit
Commercial
Grade Grade
Grade Grade
(3)(4)
953
975
958
980
937
959
942
964
936
958
925
947
937
959
933
955
933
955
956
978
962
984
940
962
944
966
936
958
1690 1773 1942 2012 ps
1756 1843 2018 2102 ps
1656 1737 1903 1973 ps
1722 1807 1979 2063 ps
1640 1721 1885 1954 ps
1706 1791 1961 2044 ps
1638 1718 1882 1952 ps
1704 1788 1958 2042 ps
1626 1706 1869 1938 ps
1692 1776 1945 2028 ps
1597 1675 1835 1904 ps
1663 1745 1911 1994 ps
1578 1655 1813 1882 ps
1644 1725 1889 1972 ps
1585 1663 1821 1890 ps
1651 1733 1897 1980 ps
1583 1661 1819 1888 ps
1649 1731 1895 1978 ps
1608 1687 1848 1943 ps
1674 1757 1924 2033 ps
1595 1673 1833 1928 ps
1661 1743 1909 2018 ps
1586 1664 1823 1917 ps
1652 1734 1899 2007 ps
1591 1669 1828 1923 ps
1657 1739 1904 2013 ps
1585 1663 1821 1916 ps
1651 1733 1897 2006 ps
SSTL-18
ClassI
Stratix II Device Handbook, Volume 1
DC & Switching Characteristics
Altera Corporation
April 2011
Stratix II Device Handbook, Volume 1
Timing Model
Table5–xII I/O Output Delay for Column Pins(Part 6 of8)
Minimum Timing
I/O Standard
Drive
Parameter
Strength
t
OP
t
DIP
t
OP
t
DIP
Differential 16 mA
SSTL-2 Class II
20 mA
t
OP
t
DIP
t
OP
t
DIP
24 mA t
OP
t
DIP
Differential
SSTL-18
ClassI
4 mA t
OP
t
DIP
6 mA t
OP
t
DIP
8 mA t
OP
t
DIP
10 mA t
OP
t
DIP
12 mA t
OP
t
DIP
Differential
SSTL-18
ClassII
8 mA t
OP
t
DIP
16 mA t
OP
t
DIP
18 mA t
OP
t
DIP
20 mA t
OP
t
DIP
Industrial
913
933
896
916
876
896
877
897
872
892
909
929
914
934
894
914
898
918
891
911
883
903
894
914
890
910
890
910
-3-3
-4-5
Speed Speed
Speed Speed Unit
Commercial
Grade Grade
Grade Grade
(3)(4)
957
979
940
962
918
940
919
941
915
937
953
975
958
980
937
959
942
964
936
958
925
947
937
959
933
955
933
955
1715 1799 1971 2041 ps
1781 1869 2047 2131 ps
1672 1754 1921 1991 ps
1738 1824 1997 2081 ps
1609 1688 1849 1918 ps
1675 1758 1925 2008 ps
1598 1676 1836 1905 ps
1664 1746 1912 1995 ps
1596 1674 1834 1903 ps
1662 1744 1910 1993 ps
1690 1773 1942 2012 ps
1756 1843 2018 2102 ps
1656 1737 1903 1973 ps
1722 1807 1979 2063 ps
1640 1721 1885 1954 ps
1706 1791 1961 2044 ps
1638 1718 1882 1952 ps
1704 1788 1958 2042 ps
1626 1706 1869 1938 ps
1692 1776 1945 2028 ps
1597 1675 1835 1904 ps
1663 1745 1911 1994 ps
1578 1655 1813 1882 ps
1644 1725 1889 1972 ps
1585 1663 1821 1890 ps
1651 1733 1897 1980 ps
1583 1661 1819 1888 ps
1649 1731 1895 1978 ps
Differential 8 mA
SSTL-2 Class I
12 mA
Stratix II Device Handbook, Volume 1