2024年10月27日发(作者：野恺歌)
MUN2233, MMUN2233L,
MUN5233, DTC143ZE,
DTC143ZM3, NSBC143ZF3
Digital Transistors (BRT)
R1 = 4.7 kW, R2 = 47 kW
NPN Transistors with Monolithic Bias
Resistor Network
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and
abase−emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
Features
PIN 1
BASE
(INPUT)
PIN CONNECTIONS
PIN 3
COLLECTOR
(OUTPUT)
R1
R2
PIN 2
EMITTER
(GROUND)
•
•
•
•
•
MARKING DIAGRAMS
SC−59
CASE 318D
STYLE 1
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
S and NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
XX MG
G
1
XXX MG
G
1
SOT−23
CASE 318
STYLE 6
MAXIMUM RATINGS
(T
A
= 25°C)
Rating
Collector−Base Voltage
Collector−Emitter Voltage
Collector Current − Continuous
Input Forward Voltage
Input Reverse Voltage
Symbol
V
CBO
V
CEO
I
C
V
IN(fwd)
V
IN(rev)
Max
50
50
100
30
5
Unit
Vdc
Vdc
mAdc
Vdc
Vdc
XX M
1
X M
1
1
XX M
1
XX MG
G
SC−70/SOT−323
CASE 419
STYLE 3
SC−75
CASE 463
STYLE 1
SOT−723
CASE 631AA
STYLE 1
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
SOT−1123
CASE 524AA
STYLE 1
XXX= Specific Device Code
M=Date Code*
G=Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending up-
on manufacturing location.
ORDERING INFORMATION
See detailed ordering, marking, and shipping information in
the package dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2012
1
October, 2016 − Rev. 6
Publication Order Number:
DTC143Z/D
MUN2233, MMUN2233L, MUN5233, DTC143ZE, DTC143ZM3, NSBC143ZF3
Table 1. ORDERING INFORMATION
Device
MUN2233T1G, NSVMUN2233T1G*
MMUN2233LT1G, SMMUN2233LT1G*
NSVMMUN2233LT3G*
MUN5233T1G, SMUN5233T1G*
DTC143ZET1G, NSVDTC143ZET1G*
DTC143ZM3T5G, NSVDTC143ZM3T5G*
NSBC143ZF3T5G
Part Marking
8K
A8K
A8K
8K
8K
8K
R
Package
SC−59
(Pb−Free)
SOT−23
(Pb−Free)
SOT−23
(Pb−Free)
SC−70/SOT−323
(Pb−Free)
SC−75
(Pb−Free)
SOT−723
(Pb−Free)
SOT−1123
(Pb−Free)
Shipping
†
3000 / Tape & Reel
3000 / Tape & Reel
10000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
8000 / Tape & Reel
8000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*S and NSV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable.
300
P
D
,
P
O
W
E
R
D
I
S
S
I
P
A
T
I
O
N
(
m
W
)
250
200
150
100
50
0
−50
(1)(2)(3)(4)(5)
(1) SC−75 and SC−70/SOT−323; Minimum Pad
(2) SC−59; Minimum Pad
(3) SOT−23; Minimum Pad
(4) SOT−1123; 100 mm
2
, 1 oz. copper trace
(5) SOT−723; Minimum Pad
−255150
AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
2
MUN2233, MMUN2233L, MUN5233, DTC143ZE, DTC143ZM3, NSBC143ZF3
Table 2. THERMAL CHARACTERISTICS
Characteristic
THERMAL CHARACTERISTICS (SC−59) (MUN2233)
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction to Ambient
Thermal Resistance,
Junction to Lead
Junction and Storage Temperature Range
THERMAL CHARACTERISTICS (SOT−23) (MMUN2233L)
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction to Ambient
Thermal Resistance,
Junction to Lead
Junction and Storage Temperature Range
THERMAL CHARACTERISTICS (SC−70/SOT−323) (MUN5233)
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction to Ambient
Thermal Resistance,
Junction to Lead
Junction and Storage Temperature Range
THERMAL CHARACTERISTICS (SC−75) (DTC143ZE)
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction to Ambient
Junction and Storage Temperature Range
THERMAL CHARACTERISTICS (SOT−723) (DTC143ZM3)
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction to Ambient
Junction and Storage Temperature Range
1.
2.
3.
4.
FR−4 @ Minimum Pad.
FR−*******.0InchPad.
FR*4 @ 100 mm
2
, 1 oz. copper traces, still air.
FR*4 @ 500 mm
2
, 1 oz. copper traces, still air.
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
P
D
260
600
2.0
4.8
480
205
−55 to +150
mW
mW/°C
°C/W
°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
P
D
200
300
1.6
2.4
600
400
−55 to +150
mW
mW/°C
°C/W
°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
P
D
202
310
1.6
2.5
618
403
280
332
−55 to +150
mW
mW/°C
°C/W
°C/W
°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
P
D
246
400
2.0
3.2
508
311
174
208
−55 to +150
mW
mW/°C
°C/W
°C/W
°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
P
D
230
338
1.8
2.7
540
370
264
287
−55 to +150
mW
mW/°C
°C/W
°C/W
°C
SymbolMaxUnit
R
q
JA
R
q
JL
T
J
, T
stg
R
q
JA
R
q
JL
T
J
, T
stg
R
q
JA
R
q
JL
T
J
, T
stg
R
q
JA
T
J
, T
stg
R
q
JA
T
J
, T
stg
3
MUN2233, MMUN2233L, MUN5233, DTC143ZE, DTC143ZM3, NSBC143ZF3
Table 2. THERMAL CHARACTERISTICS
Characteristic
THERMAL CHARACTERISTICS (SOT−1123) (NSBC143ZF3)
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction to Ambient
Thermal Resistance, Junction to Lead
Junction and Storage Temperature Range
1.
2.
3.
4.
FR−4 @ Minimum Pad.
FR−*******.0InchPad.
FR*4 @ 100 mm
2
, 1 oz. copper traces, still air.
FR*4 @ 500 mm
2
, 1 oz. copper traces, still air.
(Note 3)
(Note 4)
(Note 3)
(Note 4)
(Note 3)
(Note 4)
(Note 3)
P
D
254
297
2.0
2.4
493
421
193
−55 to +150
mW
mW/°C
°C/W
°C/W
°C
SymbolMaxUnit
R
q
JA
R
q
JL
T
J
, T
stg
Table 3. ELECTRICAL CHARACTERISTICS
(T
A
= 25°C, unless otherwise noted)
Characteristic
OFF CHARACTERISTICS
Collector−Base Cutoff Current
(V
CB
= 50 V, I
E
= 0)
Collector−Emitter Cutoff Current
(V
CE
= 50 V, I
B
= 0)
Emitter−Base Cutoff Current
(V
EB
= 6.0 V, I
C
= 0)
Collector−Base Breakdown Voltage
(I
C
= 10 mA, I
E
= 0)
Collector−Emitter Breakdown Voltage (Note 5)
(I
C
= 2.0 mA, I
B
= 0)
ON CHARACTERISTICS
DC Current Gain (Note 5)
(I
C
= 5.0 mA, V
CE
= 10 V)
Collector *Emitter Saturation Voltage (Note 5)
(I
C
= 10 mA, I
B
= 1.0 mA)
Input Voltage (off)
(V
CE
= 5.0 V, I
C
= 100 mA)
Input Voltage (on)
(V
CE
= 0.3 V, I
C
= 5 mA)
Output Voltage (on)
(V
CC
= 5.0 V, V
B
= 2.5 V, R
L
= 1.0 kW)
Output Voltage (off)
(V
CC
= 5.0 V, V
B
= 0.5 V, R
L
= 1.0 kW)
Input Resistor
Resistor Ratio
h
FE
80
V
CE(sat)
−
V
i(off)
V
i(on)
V
OL
−
V
OH
4.9
R1
R
1
/R
2
3.3
0.08
−
4.7
0.1
−
6.1
0.12
kW
−0.2
Vdc
−
1.3
−
0.6
0.9
0.25
Vdc
0.5
Vdc
−
Vdc
200−
Vdc
I
CBO
I
CEO
−
I
EBO
−
V
(BR)CBO
50
V
(BR)CEO
50−−
−−
Vdc
−0.18
Vdc
−500
mAdc
nAdc
−−100
nAdc
SymbolMinTypMaxUnit
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
Condition: Pulse Width = 300 msec, Duty Cycle v 2%.
4
MUN2233, MMUN2233L, MUN5233, DTC143ZE, DTC143ZM3, NSBC143ZF3
TYPICAL CHARACTERISTICS
MUN2233, MMUN2233L, MUN5233, DTC143ZE, DTC143ZM3
1
V
C
E
(
s
a
t
)
,
C
O
L
L
E
C
T
O
R
−
E
M
I
T
T
E
R
S
A
T
U
R
A
T
I
O
N
V
O
L
T
A
G
E
(
V
)
I
C
/I
B
= 10
h
F
E
,
D
C
C
U
R
R
E
N
T
G
A
I
N
150°C
1000
V
CE
= 10 V
0.1
100
25°C
150°C
−55°C
−55°C
25°C
110
I
C
, COLLECTOR CURRENT (mA)
100
0.01
10
110
I
C
, COLLECTOR CURRENT (mA)
100
Figure 2. V
CE(sat)
versus I
C
3.2
2.8
C
o
b
,
C
A
P
A
C
I
T
A
N
C
E
(
p
F
)
2.4
2
1.6
1.2
0.8
0.4
0
I
C
,
C
O
L
L
E
C
T
O
R
C
U
R
R
E
N
T
(
m
A
)
f = 10 kHz
I
E
= 0 A
T
A
= 25°C
100
150°C
10
Figure 3. DC Current Gain
−55°C
1
0.1
0.01
V
O
= 5 V
012
V
in
, INPUT VOLTAGE (V)
34
25°C
0.001
V
R
, REVERSE BIAS VOLTAGE (V)
Figure 4. Output CapacitanceFigure 5. Output Current versus Input Voltage
10
V
i
n
,
I
N
P
U
T
V
O
L
T
A
G
E
(
V
)
−55°C
1
150°C
25°C
V
O
= 0.2 V
0.1
010203040
I
C
, COLLECTOR CURRENT (mA)
50
Figure 6. Input Voltage versus Output Current
5
MUN2233, MMUN2233L, MUN5233, DTC143ZE, DTC143ZM3, NSBC143ZF3
TYPICAL CHARACTERISTICS
NSBC143ZF3
1
V
C
E
(
s
a
t
)
,
C
O
L
L
E
C
T
O
R
−
E
M
I
T
T
E
R
S
A
T
U
R
A
T
I
O
N
V
O
L
T
A
G
E
(
V
)
1000
V
CE
= 10 V
h
F
E
,
D
C
C
U
R
R
E
N
T
G
A
I
N
150°C
100
25°C
10
−55°C
I
C
/I
B
= 10
0.1
150°C
−55°C
25°C
0.01
1
0.1110100
I
C
, COLLECTOR CURRENT (mA)I
C
, COLLECTOR CURRENT (mA)
Figure 7. V
CE(sat)
versus I
C
2.4
I
C
,
C
O
L
L
E
C
T
O
R
C
U
R
R
E
N
T
(
m
A
)
2
1.6
1.2
0.8
0.4
0
V
R
, REVERSE BIAS VOLTAGE (V)
f = 10 kHz
I
E
= 0 A
T
A
= 25°C
100
150°C
10
1
0.1
0.01
Figure 8. DC Current Gain
C
o
b
,
C
A
P
A
C
I
T
A
N
C
E
(
p
F
)
−55°C
25°C
0.001
012
V
in
, INPUT VOLTAGE (V)
3
V
O
= 5 V
4
Figure 9. Output CapacitanceFigure 10. Output Current versus Input Voltage
100
V
i
n
,
I
N
P
U
T
V
O
L
T
A
G
E
(
V
)
10
25°C
−55°C
1
150°C
V
O
= 0.2 V
010203040
I
C
, COLLECTOR CURRENT (mA)
50
0.1
Figure 11. Input Voltage versus Output Current
6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AS
SCALE 4:1
D
0.25
3
DATE 30 JAN 2018
NOTES:
IONING AND TOLERANCING PER ASME Y14.5M, 1994.
LLING DIMENSION: MILLIMETERS.
M LEAD THICKNESS INCLUDES LEAD FINISH.
MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF
THE BASE MATERIAL.
IONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
DIM
A
A1
b
c
D
E
e
L
L1
H
E
T
MIN
0.89
0.01
0.37
0.08
2.80
1.20
1.78
0.30
0.35
2.10
0°
MILLIMETERS
NOMMAX
1.001.11
0.060.10
0.440.50
0.140.20
2.903.04
1.301.40
1.902.04
0.430.55
0.540.69
2.402.64
−−−10°
MIN
0.035
0.000
0.015
0.003
0.110
0.047
0.070
0.012
0.014
0.083
0°
INCHES
NOM
0.039
0.002
0.017
0.006
0.114
0.051
0.075
0.017
0.021
0.094
−−−
MAX
0.044
0.004
0.020
0.008
0.120
0.055
0.080
0.022
0.027
0.104
10°
E
1
2
H
E
L
L1
VIEW C
T
3X
b
e
TOP VIEW
A
A1
SIDE VIEW
SEE VIEW C
c
END VIEW
GENERIC
MARKING DIAGRAM*
XXXMG
G
1
RECOMMENDED
SOLDERING FOOTPRINT
2.90
0.90
3X
XXX= Specific Device Code
M= Date Code
G= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
STYLE 7:
PIN R
TOR
STYLE 8:
PIN
CONNECTION
E
STYLE 13:
PIN
STYLE 14:
PIN E
3X
0.80
0.95
PITCH
DIMENSIONS: MILLIMETERS
STYLE 1 THRU 5:
CANCELLED
STYLE 6:
PIN
R
TOR
STYLE 10:
PIN
STYLE 16:
PIN
E
E
STYLE 22:
PIN
STYLE 28:
PIN
STYLE 9:
PIN
E
STYLE 15:
PIN
E
STYLE 21:
PIN
STYLE 27:
PIN E
E
E
STYLE 11:STYLE 12:
PIN IN E
E
E−
STYLE 17:
PIN CONNECTION
E
STYLE 23:
PIN
E
STYLE 18:STYLE 19:STYLE 20:
PIN CONNECTIONPIN EPIN E
E−
STYLE 24:
PIN
STYLE 25:
PIN
E
STYLE 26:
PIN E
CONNECTION
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42226B
SOT−23 (TO−236)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−59
CASE 318D−04
ISSUE H
SCALE 2:1
D
DATE 28 JUN 2012
NOTES:
IONING AND TOLERANCING PER ANSI Y14.5M, 1982.
LLING DIMENSION: MILLIMETER.
DIM
A
A1
b
c
D
E
e
L
H
E
MIN
1.00
0.01
0.35
0.09
2.70
1.30
1.70
0.20
2.50
MILLIMETERS
NOMMAX
1.151.30
0.060.10
0.430.50
0.140.18
2.903.10
1.501.70
1.902.10
0.400.60
2.803.00
MIN
0.039
0.001
0.014
0.003
0.106
0.051
0.067
0.008
0.099
INCHES
NOM
0.045
0.002
0.017
0.005
0.114
0.059
0.075
0.016
0.110
MAX
0.051
0.004
0.020
0.007
0.122
0.067
0.083
0.024
0.118
H
E
3
1
2
E
b
e
C
L
A
A1
GENERIC
MARKING DIAGRAM
XXX MG
G
1
XXX
M
G
= Specific Device Code
= Date Code
= Pb−Free Package*
SOLDERING FOOTPRINT*
0.95
0.037
0.95
0.037
(*Note: Microdot may be in either location)
2.4
0.094
1.0
0.039
0.8
0.031
SCALE 10:1
mm
Ǔǒ
inches
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
STYLE 1:
PIN
R
TOR
STYLE 2:
PIN
2.N.C.
E
STYLE 3:
PIN
E
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
STYLE 4:
PIN E
2.N.C.
STYLE 5:
PIN E
E
STYLE 6:
PIN
E
/CATHODE
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42664B
SC−59
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−70 (SOT−323)
CASE 419
ISSUE P
SCALE 4:1
DATE 07 OCT 2021
GENERIC
MARKING DIAGRAM
XX MG
G
1
XX
M
G
= Specific Device Code
= Date Code
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLE 1:
CANCELLED
STYLE 2:
PIN
2.N.C.
E
STYLE 7:
PIN
R
TOR
STYLE 3:
PIN
R
TOR
STYLE 8:
PIN
STYLE 4:
PIN E
E
STYLE 9:
PIN
E
E-ANODE
STYLE 5:
PIN
E
STYLE 10:
PIN E
-CATHODE
STYLE 11:
PIN E
E
E
STYLE 6:
PIN R
TOR
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42819B
SC−70 (SOT−323)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
3
1
2
SC−75/SOT−416
CASE 463−01
ISSUE G
DATE 07 AUG 2015
SCALE 4:1
−E−
2
3
NOTES:
IONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
LLING DIMENSION: MILLIMETER.
e
1
−D−
b
3 PL
0.20 (0.008)
M
D
H
E
0.20 (0.008)E
DIM
A
A1
b
C
D
E
e
L
H
E
MILLIMETERS
MINNOMMAX
0.700.800.90
0.000.050.10
0.150.200.30
0.100.150.25
1.551.601.65
0.700.800.90
1.00 BSC
0.100.150.20
1.501.601.70
INCHES
NOMMAX
0.0310.035
0.0020.004
0.0080.012
0.0060.010
0.0630.065
0.0310.035
0.04 BSC
0.0040.0060.008
0.0600.0630.067
MIN
0.027
0.000
0.006
0.004
0.061
0.027
C
A
L
A1
GENERIC
MARKING DIAGRAM*
XX M
G
1
XX= Specific Device Code
M= Date Code
G= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
STYLE 1:
PIN
R
TOR
STYLE 4:
PIN E
E
STYLE 2:
PIN
2.N/C
E
STYLE 5:
PIN
STYLE 3:
PIN
E
SOLDERING FOOTPRINT*
0.356
0.014
1.803
0.071
0.787
0.031
0.508
0.020
1.000
0.039
SCALE 10:1
mm
Ǔǒ
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB15184C
SC−75/SOT−416
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−1123
CASE 524AA
ISSUE C
SCALE 8:1
DATE 29 NOV 2011
NOTES:
IONING AND TOLERANCING PER ASME
Y14.5M, 1994.
LLING DIMENSION: MILLIMETERS.
M LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
IONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
DIM
A
b
b1
c
D
E
e
H
E
L
L2
MILLIMETERS
MINMAX
0.340.40
0.150.28
0.100.20
0.070.17
0.750.85
0.550.65
0.350.40
0.951.05
0.185 REF
0.050.15
D
1
2
3
−X−
−Y−
E
TOP VIEW
A
c
H
E
SIDE VIEW
3X
L2
b
0.08XY
e
3X
GENERIC
MARKING DIAGRAM*
X M
X
M
= Specific Device Code
= Date Code
2X
b1
L
BOTTOM VIEW
SOLDERING FOOTPRINT*
1.20
3X
0.34
1
0.26
*This information is generic. Please refer
to device data sheet for actual part
marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
0.38
0.20
2X
PACKAGE
OUTLINE
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
STYLE 1:
PIN
R
TOR
STYLE 2:
PIN
2.N/C
E
STYLE 3:
PIN
E
STYLE 4:
PIN E
E
STYLE 5:
PIN
DOCUMENT NUMBER:
DESCRIPTION:
98AON23134D
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
SOT−1123, 3−LEAD, 1.0X0.6X0.37, 0.35P
PAGE 1 OF 1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−723
CASE 631AA−01
ISSUE D
SCALE 4:1
−X−
b1
D
3
DATE 10 AUG 2009
NOTES:
IONING AND TOLERANCING PER ASME
Y14.5M, 1994.
LLING DIMENSION: MILLIMETERS.
M LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
IONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
DIM
A
b
b1
C
D
E
e
H
E
L
L2
MILLIMETERS
MINNOMMAX
0.450.500.55
0.150.210.27
0.250.310.37
0.070.120.17
1.151.201.25
0.750.800.85
0.40 BSC
1.151.201.25
0.29 REF
0.150.200.25
A
−Y−
E
H
E
b
0.08XY
C
SIDE VIEW
1
2X
2
2X
e
TOP VIEW
3X
1
L
3X
L2
BOTTOM VIEW
GENERIC
MARKING DIAGRAM*
STYLE 3:
PIN
E
STYLE 4:
PIN E
E
STYLE 5:
PIN
STYLE 1:
PIN
R
TOR
STYLE 2:
PIN
2.N/C
E
XX M
1
XX
M
= Specific Device Code
= Date Code
RECOMMENDED
SOLDERING FOOTPRINT*
0.40
2X
PACKAGE
OUTLINE
2X
0.27
*This information is generic. Please refer
to device data sheet for actual part
marking. Pb−Free indicator, “G”, may
or not be present.
1.50
3X
0.52
0.36
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON12989D
SOT−723
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
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PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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◊
2024年10月27日发(作者：野恺歌)
MUN2233, MMUN2233L,
MUN5233, DTC143ZE,
DTC143ZM3, NSBC143ZF3
Digital Transistors (BRT)
R1 = 4.7 kW, R2 = 47 kW
NPN Transistors with Monolithic Bias
Resistor Network
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and
abase−emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
Features
PIN 1
BASE
(INPUT)
PIN CONNECTIONS
PIN 3
COLLECTOR
(OUTPUT)
R1
R2
PIN 2
EMITTER
(GROUND)
•
•
•
•
•
MARKING DIAGRAMS
SC−59
CASE 318D
STYLE 1
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
S and NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
XX MG
G
1
XXX MG
G
1
SOT−23
CASE 318
STYLE 6
MAXIMUM RATINGS
(T
A
= 25°C)
Rating
Collector−Base Voltage
Collector−Emitter Voltage
Collector Current − Continuous
Input Forward Voltage
Input Reverse Voltage
Symbol
V
CBO
V
CEO
I
C
V
IN(fwd)
V
IN(rev)
Max
50
50
100
30
5
Unit
Vdc
Vdc
mAdc
Vdc
Vdc
XX M
1
X M
1
1
XX M
1
XX MG
G
SC−70/SOT−323
CASE 419
STYLE 3
SC−75
CASE 463
STYLE 1
SOT−723
CASE 631AA
STYLE 1
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
SOT−1123
CASE 524AA
STYLE 1
XXX= Specific Device Code
M=Date Code*
G=Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending up-
on manufacturing location.
ORDERING INFORMATION
See detailed ordering, marking, and shipping information in
the package dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2012
1
October, 2016 − Rev. 6
Publication Order Number:
DTC143Z/D
MUN2233, MMUN2233L, MUN5233, DTC143ZE, DTC143ZM3, NSBC143ZF3
Table 1. ORDERING INFORMATION
Device
MUN2233T1G, NSVMUN2233T1G*
MMUN2233LT1G, SMMUN2233LT1G*
NSVMMUN2233LT3G*
MUN5233T1G, SMUN5233T1G*
DTC143ZET1G, NSVDTC143ZET1G*
DTC143ZM3T5G, NSVDTC143ZM3T5G*
NSBC143ZF3T5G
Part Marking
8K
A8K
A8K
8K
8K
8K
R
Package
SC−59
(Pb−Free)
SOT−23
(Pb−Free)
SOT−23
(Pb−Free)
SC−70/SOT−323
(Pb−Free)
SC−75
(Pb−Free)
SOT−723
(Pb−Free)
SOT−1123
(Pb−Free)
Shipping
†
3000 / Tape & Reel
3000 / Tape & Reel
10000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
8000 / Tape & Reel
8000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*S and NSV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable.
300
P
D
,
P
O
W
E
R
D
I
S
S
I
P
A
T
I
O
N
(
m
W
)
250
200
150
100
50
0
−50
(1)(2)(3)(4)(5)
(1) SC−75 and SC−70/SOT−323; Minimum Pad
(2) SC−59; Minimum Pad
(3) SOT−23; Minimum Pad
(4) SOT−1123; 100 mm
2
, 1 oz. copper trace
(5) SOT−723; Minimum Pad
−255150
AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
2
MUN2233, MMUN2233L, MUN5233, DTC143ZE, DTC143ZM3, NSBC143ZF3
Table 2. THERMAL CHARACTERISTICS
Characteristic
THERMAL CHARACTERISTICS (SC−59) (MUN2233)
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction to Ambient
Thermal Resistance,
Junction to Lead
Junction and Storage Temperature Range
THERMAL CHARACTERISTICS (SOT−23) (MMUN2233L)
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction to Ambient
Thermal Resistance,
Junction to Lead
Junction and Storage Temperature Range
THERMAL CHARACTERISTICS (SC−70/SOT−323) (MUN5233)
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction to Ambient
Thermal Resistance,
Junction to Lead
Junction and Storage Temperature Range
THERMAL CHARACTERISTICS (SC−75) (DTC143ZE)
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction to Ambient
Junction and Storage Temperature Range
THERMAL CHARACTERISTICS (SOT−723) (DTC143ZM3)
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction to Ambient
Junction and Storage Temperature Range
1.
2.
3.
4.
FR−4 @ Minimum Pad.
FR−*******.0InchPad.
FR*4 @ 100 mm
2
, 1 oz. copper traces, still air.
FR*4 @ 500 mm
2
, 1 oz. copper traces, still air.
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
P
D
260
600
2.0
4.8
480
205
−55 to +150
mW
mW/°C
°C/W
°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
P
D
200
300
1.6
2.4
600
400
−55 to +150
mW
mW/°C
°C/W
°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
P
D
202
310
1.6
2.5
618
403
280
332
−55 to +150
mW
mW/°C
°C/W
°C/W
°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
P
D
246
400
2.0
3.2
508
311
174
208
−55 to +150
mW
mW/°C
°C/W
°C/W
°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
P
D
230
338
1.8
2.7
540
370
264
287
−55 to +150
mW
mW/°C
°C/W
°C/W
°C
SymbolMaxUnit
R
q
JA
R
q
JL
T
J
, T
stg
R
q
JA
R
q
JL
T
J
, T
stg
R
q
JA
R
q
JL
T
J
, T
stg
R
q
JA
T
J
, T
stg
R
q
JA
T
J
, T
stg
3
MUN2233, MMUN2233L, MUN5233, DTC143ZE, DTC143ZM3, NSBC143ZF3
Table 2. THERMAL CHARACTERISTICS
Characteristic
THERMAL CHARACTERISTICS (SOT−1123) (NSBC143ZF3)
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction to Ambient
Thermal Resistance, Junction to Lead
Junction and Storage Temperature Range
1.
2.
3.
4.
FR−4 @ Minimum Pad.
FR−*******.0InchPad.
FR*4 @ 100 mm
2
, 1 oz. copper traces, still air.
FR*4 @ 500 mm
2
, 1 oz. copper traces, still air.
(Note 3)
(Note 4)
(Note 3)
(Note 4)
(Note 3)
(Note 4)
(Note 3)
P
D
254
297
2.0
2.4
493
421
193
−55 to +150
mW
mW/°C
°C/W
°C/W
°C
SymbolMaxUnit
R
q
JA
R
q
JL
T
J
, T
stg
Table 3. ELECTRICAL CHARACTERISTICS
(T
A
= 25°C, unless otherwise noted)
Characteristic
OFF CHARACTERISTICS
Collector−Base Cutoff Current
(V
CB
= 50 V, I
E
= 0)
Collector−Emitter Cutoff Current
(V
CE
= 50 V, I
B
= 0)
Emitter−Base Cutoff Current
(V
EB
= 6.0 V, I
C
= 0)
Collector−Base Breakdown Voltage
(I
C
= 10 mA, I
E
= 0)
Collector−Emitter Breakdown Voltage (Note 5)
(I
C
= 2.0 mA, I
B
= 0)
ON CHARACTERISTICS
DC Current Gain (Note 5)
(I
C
= 5.0 mA, V
CE
= 10 V)
Collector *Emitter Saturation Voltage (Note 5)
(I
C
= 10 mA, I
B
= 1.0 mA)
Input Voltage (off)
(V
CE
= 5.0 V, I
C
= 100 mA)
Input Voltage (on)
(V
CE
= 0.3 V, I
C
= 5 mA)
Output Voltage (on)
(V
CC
= 5.0 V, V
B
= 2.5 V, R
L
= 1.0 kW)
Output Voltage (off)
(V
CC
= 5.0 V, V
B
= 0.5 V, R
L
= 1.0 kW)
Input Resistor
Resistor Ratio
h
FE
80
V
CE(sat)
−
V
i(off)
V
i(on)
V
OL
−
V
OH
4.9
R1
R
1
/R
2
3.3
0.08
−
4.7
0.1
−
6.1
0.12
kW
−0.2
Vdc
−
1.3
−
0.6
0.9
0.25
Vdc
0.5
Vdc
−
Vdc
200−
Vdc
I
CBO
I
CEO
−
I
EBO
−
V
(BR)CBO
50
V
(BR)CEO
50−−
−−
Vdc
−0.18
Vdc
−500
mAdc
nAdc
−−100
nAdc
SymbolMinTypMaxUnit
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
Condition: Pulse Width = 300 msec, Duty Cycle v 2%.
4
MUN2233, MMUN2233L, MUN5233, DTC143ZE, DTC143ZM3, NSBC143ZF3
TYPICAL CHARACTERISTICS
MUN2233, MMUN2233L, MUN5233, DTC143ZE, DTC143ZM3
1
V
C
E
(
s
a
t
)
,
C
O
L
L
E
C
T
O
R
−
E
M
I
T
T
E
R
S
A
T
U
R
A
T
I
O
N
V
O
L
T
A
G
E
(
V
)
I
C
/I
B
= 10
h
F
E
,
D
C
C
U
R
R
E
N
T
G
A
I
N
150°C
1000
V
CE
= 10 V
0.1
100
25°C
150°C
−55°C
−55°C
25°C
110
I
C
, COLLECTOR CURRENT (mA)
100
0.01
10
110
I
C
, COLLECTOR CURRENT (mA)
100
Figure 2. V
CE(sat)
versus I
C
3.2
2.8
C
o
b
,
C
A
P
A
C
I
T
A
N
C
E
(
p
F
)
2.4
2
1.6
1.2
0.8
0.4
0
I
C
,
C
O
L
L
E
C
T
O
R
C
U
R
R
E
N
T
(
m
A
)
f = 10 kHz
I
E
= 0 A
T
A
= 25°C
100
150°C
10
Figure 3. DC Current Gain
−55°C
1
0.1
0.01
V
O
= 5 V
012
V
in
, INPUT VOLTAGE (V)
34
25°C
0.001
V
R
, REVERSE BIAS VOLTAGE (V)
Figure 4. Output CapacitanceFigure 5. Output Current versus Input Voltage
10
V
i
n
,
I
N
P
U
T
V
O
L
T
A
G
E
(
V
)
−55°C
1
150°C
25°C
V
O
= 0.2 V
0.1
010203040
I
C
, COLLECTOR CURRENT (mA)
50
Figure 6. Input Voltage versus Output Current
5
MUN2233, MMUN2233L, MUN5233, DTC143ZE, DTC143ZM3, NSBC143ZF3
TYPICAL CHARACTERISTICS
NSBC143ZF3
1
V
C
E
(
s
a
t
)
,
C
O
L
L
E
C
T
O
R
−
E
M
I
T
T
E
R
S
A
T
U
R
A
T
I
O
N
V
O
L
T
A
G
E
(
V
)
1000
V
CE
= 10 V
h
F
E
,
D
C
C
U
R
R
E
N
T
G
A
I
N
150°C
100
25°C
10
−55°C
I
C
/I
B
= 10
0.1
150°C
−55°C
25°C
0.01
1
0.1110100
I
C
, COLLECTOR CURRENT (mA)I
C
, COLLECTOR CURRENT (mA)
Figure 7. V
CE(sat)
versus I
C
2.4
I
C
,
C
O
L
L
E
C
T
O
R
C
U
R
R
E
N
T
(
m
A
)
2
1.6
1.2
0.8
0.4
0
V
R
, REVERSE BIAS VOLTAGE (V)
f = 10 kHz
I
E
= 0 A
T
A
= 25°C
100
150°C
10
1
0.1
0.01
Figure 8. DC Current Gain
C
o
b
,
C
A
P
A
C
I
T
A
N
C
E
(
p
F
)
−55°C
25°C
0.001
012
V
in
, INPUT VOLTAGE (V)
3
V
O
= 5 V
4
Figure 9. Output CapacitanceFigure 10. Output Current versus Input Voltage
100
V
i
n
,
I
N
P
U
T
V
O
L
T
A
G
E
(
V
)
10
25°C
−55°C
1
150°C
V
O
= 0.2 V
010203040
I
C
, COLLECTOR CURRENT (mA)
50
0.1
Figure 11. Input Voltage versus Output Current
6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AS
SCALE 4:1
D
0.25
3
DATE 30 JAN 2018
NOTES:
IONING AND TOLERANCING PER ASME Y14.5M, 1994.
LLING DIMENSION: MILLIMETERS.
M LEAD THICKNESS INCLUDES LEAD FINISH.
MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF
THE BASE MATERIAL.
IONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
DIM
A
A1
b
c
D
E
e
L
L1
H
E
T
MIN
0.89
0.01
0.37
0.08
2.80
1.20
1.78
0.30
0.35
2.10
0°
MILLIMETERS
NOMMAX
1.001.11
0.060.10
0.440.50
0.140.20
2.903.04
1.301.40
1.902.04
0.430.55
0.540.69
2.402.64
−−−10°
MIN
0.035
0.000
0.015
0.003
0.110
0.047
0.070
0.012
0.014
0.083
0°
INCHES
NOM
0.039
0.002
0.017
0.006
0.114
0.051
0.075
0.017
0.021
0.094
−−−
MAX
0.044
0.004
0.020
0.008
0.120
0.055
0.080
0.022
0.027
0.104
10°
E
1
2
H
E
L
L1
VIEW C
T
3X
b
e
TOP VIEW
A
A1
SIDE VIEW
SEE VIEW C
c
END VIEW
GENERIC
MARKING DIAGRAM*
XXXMG
G
1
RECOMMENDED
SOLDERING FOOTPRINT
2.90
0.90
3X
XXX= Specific Device Code
M= Date Code
G= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
STYLE 7:
PIN R
TOR
STYLE 8:
PIN
CONNECTION
E
STYLE 13:
PIN
STYLE 14:
PIN E
3X
0.80
0.95
PITCH
DIMENSIONS: MILLIMETERS
STYLE 1 THRU 5:
CANCELLED
STYLE 6:
PIN
R
TOR
STYLE 10:
PIN
STYLE 16:
PIN
E
E
STYLE 22:
PIN
STYLE 28:
PIN
STYLE 9:
PIN
E
STYLE 15:
PIN
E
STYLE 21:
PIN
STYLE 27:
PIN E
E
E
STYLE 11:STYLE 12:
PIN IN E
E
E−
STYLE 17:
PIN CONNECTION
E
STYLE 23:
PIN
E
STYLE 18:STYLE 19:STYLE 20:
PIN CONNECTIONPIN EPIN E
E−
STYLE 24:
PIN
STYLE 25:
PIN
E
STYLE 26:
PIN E
CONNECTION
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42226B
SOT−23 (TO−236)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−59
CASE 318D−04
ISSUE H
SCALE 2:1
D
DATE 28 JUN 2012
NOTES:
IONING AND TOLERANCING PER ANSI Y14.5M, 1982.
LLING DIMENSION: MILLIMETER.
DIM
A
A1
b
c
D
E
e
L
H
E
MIN
1.00
0.01
0.35
0.09
2.70
1.30
1.70
0.20
2.50
MILLIMETERS
NOMMAX
1.151.30
0.060.10
0.430.50
0.140.18
2.903.10
1.501.70
1.902.10
0.400.60
2.803.00
MIN
0.039
0.001
0.014
0.003
0.106
0.051
0.067
0.008
0.099
INCHES
NOM
0.045
0.002
0.017
0.005
0.114
0.059
0.075
0.016
0.110
MAX
0.051
0.004
0.020
0.007
0.122
0.067
0.083
0.024
0.118
H
E
3
1
2
E
b
e
C
L
A
A1
GENERIC
MARKING DIAGRAM
XXX MG
G
1
XXX
M
G
= Specific Device Code
= Date Code
= Pb−Free Package*
SOLDERING FOOTPRINT*
0.95
0.037
0.95
0.037
(*Note: Microdot may be in either location)
2.4
0.094
1.0
0.039
0.8
0.031
SCALE 10:1
mm
Ǔǒ
inches
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
STYLE 1:
PIN
R
TOR
STYLE 2:
PIN
2.N.C.
E
STYLE 3:
PIN
E
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
STYLE 4:
PIN E
2.N.C.
STYLE 5:
PIN E
E
STYLE 6:
PIN
E
/CATHODE
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42664B
SC−59
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−70 (SOT−323)
CASE 419
ISSUE P
SCALE 4:1
DATE 07 OCT 2021
GENERIC
MARKING DIAGRAM
XX MG
G
1
XX
M
G
= Specific Device Code
= Date Code
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLE 1:
CANCELLED
STYLE 2:
PIN
2.N.C.
E
STYLE 7:
PIN
R
TOR
STYLE 3:
PIN
R
TOR
STYLE 8:
PIN
STYLE 4:
PIN E
E
STYLE 9:
PIN
E
E-ANODE
STYLE 5:
PIN
E
STYLE 10:
PIN E
-CATHODE
STYLE 11:
PIN E
E
E
STYLE 6:
PIN R
TOR
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42819B
SC−70 (SOT−323)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
3
1
2
SC−75/SOT−416
CASE 463−01
ISSUE G
DATE 07 AUG 2015
SCALE 4:1
−E−
2
3
NOTES:
IONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
LLING DIMENSION: MILLIMETER.
e
1
−D−
b
3 PL
0.20 (0.008)
M
D
H
E
0.20 (0.008)E
DIM
A
A1
b
C
D
E
e
L
H
E
MILLIMETERS
MINNOMMAX
0.700.800.90
0.000.050.10
0.150.200.30
0.100.150.25
1.551.601.65
0.700.800.90
1.00 BSC
0.100.150.20
1.501.601.70
INCHES
NOMMAX
0.0310.035
0.0020.004
0.0080.012
0.0060.010
0.0630.065
0.0310.035
0.04 BSC
0.0040.0060.008
0.0600.0630.067
MIN
0.027
0.000
0.006
0.004
0.061
0.027
C
A
L
A1
GENERIC
MARKING DIAGRAM*
XX M
G
1
XX= Specific Device Code
M= Date Code
G= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
STYLE 1:
PIN
R
TOR
STYLE 4:
PIN E
E
STYLE 2:
PIN
2.N/C
E
STYLE 5:
PIN
STYLE 3:
PIN
E
SOLDERING FOOTPRINT*
0.356
0.014
1.803
0.071
0.787
0.031
0.508
0.020
1.000
0.039
SCALE 10:1
mm
Ǔǒ
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB15184C
SC−75/SOT−416
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−1123
CASE 524AA
ISSUE C
SCALE 8:1
DATE 29 NOV 2011
NOTES:
IONING AND TOLERANCING PER ASME
Y14.5M, 1994.
LLING DIMENSION: MILLIMETERS.
M LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
IONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
DIM
A
b
b1
c
D
E
e
H
E
L
L2
MILLIMETERS
MINMAX
0.340.40
0.150.28
0.100.20
0.070.17
0.750.85
0.550.65
0.350.40
0.951.05
0.185 REF
0.050.15
D
1
2
3
−X−
−Y−
E
TOP VIEW
A
c
H
E
SIDE VIEW
3X
L2
b
0.08XY
e
3X
GENERIC
MARKING DIAGRAM*
X M
X
M
= Specific Device Code
= Date Code
2X
b1
L
BOTTOM VIEW
SOLDERING FOOTPRINT*
1.20
3X
0.34
1
0.26
*This information is generic. Please refer
to device data sheet for actual part
marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
0.38
0.20
2X
PACKAGE
OUTLINE
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
STYLE 1:
PIN
R
TOR
STYLE 2:
PIN
2.N/C
E
STYLE 3:
PIN
E
STYLE 4:
PIN E
E
STYLE 5:
PIN
DOCUMENT NUMBER:
DESCRIPTION:
98AON23134D
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
SOT−1123, 3−LEAD, 1.0X0.6X0.37, 0.35P
PAGE 1 OF 1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−723
CASE 631AA−01
ISSUE D
SCALE 4:1
−X−
b1
D
3
DATE 10 AUG 2009
NOTES:
IONING AND TOLERANCING PER ASME
Y14.5M, 1994.
LLING DIMENSION: MILLIMETERS.
M LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
IONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
DIM
A
b
b1
C
D
E
e
H
E
L
L2
MILLIMETERS
MINNOMMAX
0.450.500.55
0.150.210.27
0.250.310.37
0.070.120.17
1.151.201.25
0.750.800.85
0.40 BSC
1.151.201.25
0.29 REF
0.150.200.25
A
−Y−
E
H
E
b
0.08XY
C
SIDE VIEW
1
2X
2
2X
e
TOP VIEW
3X
1
L
3X
L2
BOTTOM VIEW
GENERIC
MARKING DIAGRAM*
STYLE 3:
PIN
E
STYLE 4:
PIN E
E
STYLE 5:
PIN
STYLE 1:
PIN
R
TOR
STYLE 2:
PIN
2.N/C
E
XX M
1
XX
M
= Specific Device Code
= Date Code
RECOMMENDED
SOLDERING FOOTPRINT*
0.40
2X
PACKAGE
OUTLINE
2X
0.27
*This information is generic. Please refer
to device data sheet for actual part
marking. Pb−Free indicator, “G”, may
or not be present.
1.50
3X
0.52
0.36
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON12989D
SOT−723
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at /site/pdf/Patent−. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
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