2024年3月24日发(作者：拱思涵)
元器件交易网
74VHCT374A Octal D-Type Flip-Flop with 3-STATE Outputs
July 1997
Revised April 1999
74VHCT374A
Octal D-Type Flip-Flop with 3-STATE Outputs
General Description
The VHCT374A is an advanced high speed CMOS octal
flip-flop with 3-STATE output fabricated with silicon gate
CMOS technology. It achieves the high speed operation
similar to equivalent Bipolar Schottky TTL while maintain-
ing the CMOS low power dissipation. This 8-bit D-type flip-
flop is controlled by a clock input (CP) and an output
enable input (OE). When the OE input is HIGH, the eight
outputs are in a high impedance state.
Protection circuits ensure that 0V to 7V can be applied to
the input and output (Note 1) pins without regard to the
supply voltage. This device can be used to interface 3V to
5V systems and two supply systems such as battery back
up. This circuit prevents device destruction due to mis-
matched supply and input voltages.
Note 1: Outputs in OFF-State.
Features
sHigh speed: f
MAX
= 140 MHz (typ) at T
A
= 25°C
sHigh noise immunity: V
IH
= 2.0V, V
IL
= 0.8V
sPower down protection is provided on all inputs and out-
puts
sLow power dissipation:
I
CC
= 4 µA (max) @ T
A
= 25°C
sPin and function compatible with 74HCT374
Ordering Code:
Order Number
74VHCT374AM
74VHCT374ASJ
74VHCT374AMTC
74VHCT374AN
Package Number
M20B
M20D
MTC20
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names
D
0
–D
7
CP
OE
O
0
–O
7
Description
Data Inputs
Clock Pulse Input 3-STATE
Output Enable Input 3-STATE
Outputs
© 1999 Fairchild Semiconductor
元器件交易网
7
4
V
H
C
T
3
7
4
A
Functional Description
The VHCT374A consists of eight edge-triggered flip-flops
with individual D-type inputs and 3-STATE true outputs.
The buffered clock and buffered Output Enable are com-
mon to all flip-flops. The eight flip-flops will store the state
of their individual D inputs that meet the setup and hold
time requirements on the LOW-to-HIGH Clock (CP) transi-
tion. With the Output Enable (OE) LOW, the contents of the
eight flip-flops are available at the outputs. When the OE is
HIGH, the outputs go to the high impedance state. Opera-
tion of the OE input does not affect the state of the flip-
flops.
Truth Table
Inputs
D
n
H
L
X
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
2024年3月24日发(作者：拱思涵)
元器件交易网
74VHCT374A Octal D-Type Flip-Flop with 3-STATE Outputs
July 1997
Revised April 1999
74VHCT374A
Octal D-Type Flip-Flop with 3-STATE Outputs
General Description
The VHCT374A is an advanced high speed CMOS octal
flip-flop with 3-STATE output fabricated with silicon gate
CMOS technology. It achieves the high speed operation
similar to equivalent Bipolar Schottky TTL while maintain-
ing the CMOS low power dissipation. This 8-bit D-type flip-
flop is controlled by a clock input (CP) and an output
enable input (OE). When the OE input is HIGH, the eight
outputs are in a high impedance state.
Protection circuits ensure that 0V to 7V can be applied to
the input and output (Note 1) pins without regard to the
supply voltage. This device can be used to interface 3V to
5V systems and two supply systems such as battery back
up. This circuit prevents device destruction due to mis-
matched supply and input voltages.
Note 1: Outputs in OFF-State.
Features
sHigh speed: f
MAX
= 140 MHz (typ) at T
A
= 25°C
sHigh noise immunity: V
IH
= 2.0V, V
IL
= 0.8V
sPower down protection is provided on all inputs and out-
puts
sLow power dissipation:
I
CC
= 4 µA (max) @ T
A
= 25°C
sPin and function compatible with 74HCT374
Ordering Code:
Order Number
74VHCT374AM
74VHCT374ASJ
74VHCT374AMTC
74VHCT374AN
Package Number
M20B
M20D
MTC20
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names
D
0
–D
7
CP
OE
O
0
–O
7
Description
Data Inputs
Clock Pulse Input 3-STATE
Output Enable Input 3-STATE
Outputs
© 1999 Fairchild Semiconductor
元器件交易网
7
4
V
H
C
T
3
7
4
A
Functional Description
The VHCT374A consists of eight edge-triggered flip-flops
with individual D-type inputs and 3-STATE true outputs.
The buffered clock and buffered Output Enable are com-
mon to all flip-flops. The eight flip-flops will store the state
of their individual D inputs that meet the setup and hold
time requirements on the LOW-to-HIGH Clock (CP) transi-
tion. With the Output Enable (OE) LOW, the contents of the
eight flip-flops are available at the outputs. When the OE is
HIGH, the outputs go to the high impedance state. Opera-
tion of the OE input does not affect the state of the flip-
flops.
Truth Table
Inputs
D
n
H
L
X
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance