最新消息: USBMI致力于为网友们分享Windows、安卓、IOS等主流手机系统相关的资讯以及评测、同时提供相关教程、应用、软件下载等服务。

IRF530参数介绍

IT圈 admin 25浏览 0评论

2024年3月26日发(作者:殳胜)

IRF530, SiHF530

Vishay Siliconix

Power MOSFET

PRODUCT SUMMARY

V

DS

(V)

R

DS(on)

(Ω)

Q

g

(Max.) (nC)

Q

gs

(nC)

Q

gd

(nC)

Configuration

V

GS

= 10 V

26

5.5

11

Single

D

FEATURES

100

0.16

Dynamic dV/dt Rating

Repetitive Avalanche Rated

175 °C Operating Temperature

Fast Switching

Ease of Paralleling

Simple Drive Requirements

Lead (Pb)-free Available

Available

RoHS*

COMPLIANT

TO-220

DESCRIPTION

Third generation Power MOSFETs from Vishay provide the

designer with the best combination of fast switching,

ruggedized device design, low on-resistance and

cost-effectiveness.

The TO-220 package is universally preferred for all

commercial-industrial applications at power dissipation

levels to approximately 50 W. The low thermal resistance

and low package cost of the TO-220 contribute to its wide

acceptance throughout the industry.

G

G

D

S

S

N-Channel MOSFET

ORDERING INFORMATION

Package

Lead (Pb)-free

SnPb

TO-220

IRF530PbF

SiHF530-E3

IRF530

SiHF530

ABSOLUTE MAXIMUM RATINGS T

C

= 25 °C, unless otherwise noted

ARAMETER SYMBOL

Drain-Source Voltage

Gate-Source Voltage

Continuous Drain Current

Pulsed Drain Current

a

Linear Derating Factor

Single Pulse Avalanche Energy

b

Repetitive Avalanche Current

a

Repetitive Avalanche Energy

a

Maximum Power Dissipation

Peak Diode Recovery dV/dt

c

Operating Junction and Storage Temperature Range

Soldering Recommendations (Peak Temperature)

Mounting Torque

for 10 s

6-32 or M3 screw

T

C

= 25 °C

E

AS

I

AR

E

AR

P

D

T

J

, T

stg

V

GS

at 10 V

T

C

= 25 °C

T

C

= 100 °C

V

DS

LIMIT

100

14

10

0.59

69

14

8.8

88

- 55 to + 175

300

d

10

1.1

A

W/°C

mJ

A

mJ

W

UNIT

V

20 V

GS

±

I

D

I

DM

56

dV/dt 5.5V/ns

°C

lbf · in

N · m

Notes

tive rating; pulse width limited by maximum junction temperature (see fig. 11).

b.V

DD

= 25 V, starting T

J

= 25 °C, L = 528 µH, R

G

= 25 Ω, I

AS

= 14 A (see fig. 12).

c.I

SD

≤ 14 A, dI/dt ≤ 140 A/µs, V

DD

≤ V

DS

, T

J

≤ 175 °C.

d.1.6 mm from case.

* Pb containing terminations are not RoHS compliant, exemptions may apply

Document Number: 91019

S-81240-Rev. A, 16-Jun-08

1

IRF530, SiHF530

Vishay Siliconix

THERMAL RESISTANCE RATINGS

ARAMETER SYMBOL

Maximum Junction-to-Ambient

Case-to-Sink, Flat, Greased Surface

Maximum Junction-to-Case (Drain)

R

thJA

R

thCS

R

thJC

TY.

-

0.50

-

MAX.

62

-

1.7

°C/W

UNIT

SPECIFICATIONS T

J

= 25 °C, unless otherwise noted

ARAMETER SYMBOL

Static

Drain-Source Breakdown Voltage

V

DS

Temperature Coefficient

Gate-Source Threshold Voltage

Gate-Source Leakage

Zero Gate Voltage Drain Current

Drain-Source On-State Resistance

Forward Transconductance

Dynamic

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

Total Gate Charge

Gate-Source Charge

Gate-Drain Charge

Turn-On Delay Time

Rise Time

Turn-Off Delay Time

Fall Time

Internal Drain Inductance

Internal Source Inductance

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current

Pulsed Diode Forward Current

a

Body Diode Voltage

Body Diode Reverse Recovery Time

Body Diode Reverse Recovery Charge

Forward Turn-On Time

I

S

I

SM

V

SD

t

rr

Q

rr

t

on

MOSFET symbol

showing the

integral reverse

p - n junction diode

D

TEST CONDITIONS .

V

GS

= 0 V, I

D

= 250 µA

Reference to 25 °C, I

D

= 1 mA

V

DS

= V

GS

, I

D

= 250 µA

V

GS

= ± 20 V

V

DS

= 100 V, V

GS

= 0 V

V

DS

= 80 V, V

GS

= 0 V, T

J

= 150 °C

V

GS

= 10 V

100

-

2.0

-

-

-

-

0.12

-

-

-

-

-

-

4.0

± 100

25

250

0.16

-

-

-

-

26

5.5

11

-

-

-

-

-

UNIT

V

DS

ΔV

DS

/T

J

V

GS(th)

I

GSS

I

DSS

R

DS(on)

g

fs

C

iss

V

V/°C

V

nA

µA

Ω

S

I

D

= 8.4 A

b

--

P

b

V

DS

= 50 V, I

D

= 8.4 A5.1-

V

GS

= 0 V,

-670

250

60

-

-

-

10

34

23

24

4.5

7.5

C

oss

-V

DS

= 25 V,

P

C

rss

-

f = 1.0 MHz, see fig. 5

I

D

= 14 A, V

DS

= 80 V,

Q

gs

V

GS

= 10 V

see fig. 6 and 13

b

Q

gd

t

d(on)

V

DD

= 50 V, I

D

= 14 A

R = 12 Ω, R

D

= 3.6 Ω, see fig. 10

b

G

t

d(off)

t

f

L

D

L

S

Between lead,

6 mm (0.25") from

package and center of

die contact

D

pF

Q

g

-

-

-

-

-

-

-

-

-

S

nC

t

r

ns

G

nH

-

-

-

-

-

-

-

-

-

150

0.85

14

A

56

2.5

280

1.7

V

ns

µC

G

S

T

J

= 25 °C, I

S

= 14 A, V

GS

= 0 V

b

T

J

= 25 °C, I

F

= 14 A, dI/dt = 100 A/µs

b

Intrinsic turn-on time is negligible (turn-on is dominated by L

S

and L

D

)

Notes

tive rating; pulse width limited by maximum junction temperature (see fig. 11).

width ≤ 300 µs; duty cycle ≤ 2 %.

2

Document Number: 91019

S-81240-Rev. A, 16-Jun-08

IRF530, SiHF530

Vishay Siliconix

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

Fig. 1 - Typical Output Characteristics, T

C

= 25 °CFig. 3 - Typical Transfer Characteristics

Fig. 2 - Typical Output Characteristics, T

C

= 175 °CFig. 4 - Normalized On-Resistance vs. Temperature

Document Number: 91019

S-81240-Rev. A, 16-Jun-08

3

IRF530, SiHF530

Vishay Siliconix

Fig. 5 - Typical Capacitance vs. Drain-to-Source VoltageFig. 7 - Typical Source-Drain Diode Forward Voltage

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

Fig. 8 - Maximum Safe Operating Area

4

Document Number: 91019

S-81240-Rev. A, 16-Jun-08

IRF530, SiHF530

Vishay Siliconix

R

D

V

DS

V

GS

R

G

D.U.T.

+

-

V

DD

10 V

Pulse width ≤ 1 µs

Duty factor ≤ 0.1 %

Fig. 10a - Switching Time Test Circuit

V

DS

90 %

10 %

V

GS

t

d(on)

t

r

t

d(off)

t

f

Fig. 9 - Maximum Drain Current vs. Case Temperature

Fig. 10b - Switching Time Waveforms

Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

L

Vary t

p

to obtain

required I

AS

R

G

V

DS

V

DS

t

p

V

DD

D.U.T

I

AS

+

-

V

DD

V

DS

10 V

t

p

0.01 Ω

I

AS

Fig. 12b - Unclamped Inductive Waveforms

Fig. 12a - Unclamped Inductive Test Circuit

Document Number: 91019

S-81240-Rev. A, 16-Jun-08

5

IRF530, SiHF530

Vishay Siliconix

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

Current regulator

Same type as D.U.T.

Q

G

12 V

50 kΩ

0.2 µF

0.3 µF

10 V

Q

GS

Q

GD

D.U.T.

+

-

V

DS

V

G

V

GS

3 mA

Charge

I

G

I

D

Current sampling resistors

Fig. 13a - Basic Gate Charge Waveform

Fig. 13b - Gate Charge Test Circuit

6

Document Number: 91019

S-81240-Rev. A, 16-Jun-08

IRF530, SiHF530

Vishay Siliconix

Peak Diode Recovery dV/dt Test Circuit

D.U.T.

+

Circuit layout considerations

• Low stray inductance

• Ground plane

• Low leakage inductance

current transformer

-

+

-

+

-

R

G

• dV/dt controlled by R

G

• Driver same type as D.U.T.

• I

SD

controlled by duty factor "D"

• D.U.T. - device under test

+

-

V

DD

Driver gate drive

P.W.

Period

D =

P.W.

Period

V

GS

= 10 V*

D.U.T. I

SD

waveform

Reverse

recovery

current

Body diode forward

current

dI/dt

D.U.T. V

DS

waveform

Diode recovery

dV/dt

V

DD

Re-applied

voltage

Inductor current

Body diode forward drop

Ripple≤5 %

I

SD

*

V

GS

= 5 V for logic level devices

Fig. 14 - For N-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon

Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and

reliability data, see /ppg?91019.

Document Number: 91019

S-81240-Rev. A, 16-Jun-08

7

Legal Disclaimer Notice

Vishay

Disclaimer

All product specifications and data are subject to change without notice.

Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf

(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein

or in any other disclosure relating to any product.

Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any

information provided herein to the maximum extent permitted by law. The product specifications do not expand or

otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed

therein, which apply to these products.

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this

document or by any conduct of Vishay.

The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless

otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such

applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting

from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding

products designed for such applications.

Product names and markings noted herein may be trademarks of their respective owners.

Document Number: 91000

Revision: 18-Jul-08

1

This datasheet has been downloaded from:

Free Download

Daily Updated Database

100% Free Datasheet Search Site

100% Free IC Replacement Search Site

Convenient Electronic Dictionary

Fast Search System

All Datasheets Cannot Be Modified Without Permission

Copyright © Each Manufacturing Company

2024年3月26日发(作者:殳胜)

IRF530, SiHF530

Vishay Siliconix

Power MOSFET

PRODUCT SUMMARY

V

DS

(V)

R

DS(on)

(Ω)

Q

g

(Max.) (nC)

Q

gs

(nC)

Q

gd

(nC)

Configuration

V

GS

= 10 V

26

5.5

11

Single

D

FEATURES

100

0.16

Dynamic dV/dt Rating

Repetitive Avalanche Rated

175 °C Operating Temperature

Fast Switching

Ease of Paralleling

Simple Drive Requirements

Lead (Pb)-free Available

Available

RoHS*

COMPLIANT

TO-220

DESCRIPTION

Third generation Power MOSFETs from Vishay provide the

designer with the best combination of fast switching,

ruggedized device design, low on-resistance and

cost-effectiveness.

The TO-220 package is universally preferred for all

commercial-industrial applications at power dissipation

levels to approximately 50 W. The low thermal resistance

and low package cost of the TO-220 contribute to its wide

acceptance throughout the industry.

G

G

D

S

S

N-Channel MOSFET

ORDERING INFORMATION

Package

Lead (Pb)-free

SnPb

TO-220

IRF530PbF

SiHF530-E3

IRF530

SiHF530

ABSOLUTE MAXIMUM RATINGS T

C

= 25 °C, unless otherwise noted

ARAMETER SYMBOL

Drain-Source Voltage

Gate-Source Voltage

Continuous Drain Current

Pulsed Drain Current

a

Linear Derating Factor

Single Pulse Avalanche Energy

b

Repetitive Avalanche Current

a

Repetitive Avalanche Energy

a

Maximum Power Dissipation

Peak Diode Recovery dV/dt

c

Operating Junction and Storage Temperature Range

Soldering Recommendations (Peak Temperature)

Mounting Torque

for 10 s

6-32 or M3 screw

T

C

= 25 °C

E

AS

I

AR

E

AR

P

D

T

J

, T

stg

V

GS

at 10 V

T

C

= 25 °C

T

C

= 100 °C

V

DS

LIMIT

100

14

10

0.59

69

14

8.8

88

- 55 to + 175

300

d

10

1.1

A

W/°C

mJ

A

mJ

W

UNIT

V

20 V

GS

±

I

D

I

DM

56

dV/dt 5.5V/ns

°C

lbf · in

N · m

Notes

tive rating; pulse width limited by maximum junction temperature (see fig. 11).

b.V

DD

= 25 V, starting T

J

= 25 °C, L = 528 µH, R

G

= 25 Ω, I

AS

= 14 A (see fig. 12).

c.I

SD

≤ 14 A, dI/dt ≤ 140 A/µs, V

DD

≤ V

DS

, T

J

≤ 175 °C.

d.1.6 mm from case.

* Pb containing terminations are not RoHS compliant, exemptions may apply

Document Number: 91019

S-81240-Rev. A, 16-Jun-08

1

IRF530, SiHF530

Vishay Siliconix

THERMAL RESISTANCE RATINGS

ARAMETER SYMBOL

Maximum Junction-to-Ambient

Case-to-Sink, Flat, Greased Surface

Maximum Junction-to-Case (Drain)

R

thJA

R

thCS

R

thJC

TY.

-

0.50

-

MAX.

62

-

1.7

°C/W

UNIT

SPECIFICATIONS T

J

= 25 °C, unless otherwise noted

ARAMETER SYMBOL

Static

Drain-Source Breakdown Voltage

V

DS

Temperature Coefficient

Gate-Source Threshold Voltage

Gate-Source Leakage

Zero Gate Voltage Drain Current

Drain-Source On-State Resistance

Forward Transconductance

Dynamic

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

Total Gate Charge

Gate-Source Charge

Gate-Drain Charge

Turn-On Delay Time

Rise Time

Turn-Off Delay Time

Fall Time

Internal Drain Inductance

Internal Source Inductance

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current

Pulsed Diode Forward Current

a

Body Diode Voltage

Body Diode Reverse Recovery Time

Body Diode Reverse Recovery Charge

Forward Turn-On Time

I

S

I

SM

V

SD

t

rr

Q

rr

t

on

MOSFET symbol

showing the

integral reverse

p - n junction diode

D

TEST CONDITIONS .

V

GS

= 0 V, I

D

= 250 µA

Reference to 25 °C, I

D

= 1 mA

V

DS

= V

GS

, I

D

= 250 µA

V

GS

= ± 20 V

V

DS

= 100 V, V

GS

= 0 V

V

DS

= 80 V, V

GS

= 0 V, T

J

= 150 °C

V

GS

= 10 V

100

-

2.0

-

-

-

-

0.12

-

-

-

-

-

-

4.0

± 100

25

250

0.16

-

-

-

-

26

5.5

11

-

-

-

-

-

UNIT

V

DS

ΔV

DS

/T

J

V

GS(th)

I

GSS

I

DSS

R

DS(on)

g

fs

C

iss

V

V/°C

V

nA

µA

Ω

S

I

D

= 8.4 A

b

--

P

b

V

DS

= 50 V, I

D

= 8.4 A5.1-

V

GS

= 0 V,

-670

250

60

-

-

-

10

34

23

24

4.5

7.5

C

oss

-V

DS

= 25 V,

P

C

rss

-

f = 1.0 MHz, see fig. 5

I

D

= 14 A, V

DS

= 80 V,

Q

gs

V

GS

= 10 V

see fig. 6 and 13

b

Q

gd

t

d(on)

V

DD

= 50 V, I

D

= 14 A

R = 12 Ω, R

D

= 3.6 Ω, see fig. 10

b

G

t

d(off)

t

f

L

D

L

S

Between lead,

6 mm (0.25") from

package and center of

die contact

D

pF

Q

g

-

-

-

-

-

-

-

-

-

S

nC

t

r

ns

G

nH

-

-

-

-

-

-

-

-

-

150

0.85

14

A

56

2.5

280

1.7

V

ns

µC

G

S

T

J

= 25 °C, I

S

= 14 A, V

GS

= 0 V

b

T

J

= 25 °C, I

F

= 14 A, dI/dt = 100 A/µs

b

Intrinsic turn-on time is negligible (turn-on is dominated by L

S

and L

D

)

Notes

tive rating; pulse width limited by maximum junction temperature (see fig. 11).

width ≤ 300 µs; duty cycle ≤ 2 %.

2

Document Number: 91019

S-81240-Rev. A, 16-Jun-08

IRF530, SiHF530

Vishay Siliconix

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

Fig. 1 - Typical Output Characteristics, T

C

= 25 °CFig. 3 - Typical Transfer Characteristics

Fig. 2 - Typical Output Characteristics, T

C

= 175 °CFig. 4 - Normalized On-Resistance vs. Temperature

Document Number: 91019

S-81240-Rev. A, 16-Jun-08

3

IRF530, SiHF530

Vishay Siliconix

Fig. 5 - Typical Capacitance vs. Drain-to-Source VoltageFig. 7 - Typical Source-Drain Diode Forward Voltage

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

Fig. 8 - Maximum Safe Operating Area

4

Document Number: 91019

S-81240-Rev. A, 16-Jun-08

IRF530, SiHF530

Vishay Siliconix

R

D

V

DS

V

GS

R

G

D.U.T.

+

-

V

DD

10 V

Pulse width ≤ 1 µs

Duty factor ≤ 0.1 %

Fig. 10a - Switching Time Test Circuit

V

DS

90 %

10 %

V

GS

t

d(on)

t

r

t

d(off)

t

f

Fig. 9 - Maximum Drain Current vs. Case Temperature

Fig. 10b - Switching Time Waveforms

Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

L

Vary t

p

to obtain

required I

AS

R

G

V

DS

V

DS

t

p

V

DD

D.U.T

I

AS

+

-

V

DD

V

DS

10 V

t

p

0.01 Ω

I

AS

Fig. 12b - Unclamped Inductive Waveforms

Fig. 12a - Unclamped Inductive Test Circuit

Document Number: 91019

S-81240-Rev. A, 16-Jun-08

5

IRF530, SiHF530

Vishay Siliconix

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

Current regulator

Same type as D.U.T.

Q

G

12 V

50 kΩ

0.2 µF

0.3 µF

10 V

Q

GS

Q

GD

D.U.T.

+

-

V

DS

V

G

V

GS

3 mA

Charge

I

G

I

D

Current sampling resistors

Fig. 13a - Basic Gate Charge Waveform

Fig. 13b - Gate Charge Test Circuit

6

Document Number: 91019

S-81240-Rev. A, 16-Jun-08

IRF530, SiHF530

Vishay Siliconix

Peak Diode Recovery dV/dt Test Circuit

D.U.T.

+

Circuit layout considerations

• Low stray inductance

• Ground plane

• Low leakage inductance

current transformer

-

+

-

+

-

R

G

• dV/dt controlled by R

G

• Driver same type as D.U.T.

• I

SD

controlled by duty factor "D"

• D.U.T. - device under test

+

-

V

DD

Driver gate drive

P.W.

Period

D =

P.W.

Period

V

GS

= 10 V*

D.U.T. I

SD

waveform

Reverse

recovery

current

Body diode forward

current

dI/dt

D.U.T. V

DS

waveform

Diode recovery

dV/dt

V

DD

Re-applied

voltage

Inductor current

Body diode forward drop

Ripple≤5 %

I

SD

*

V

GS

= 5 V for logic level devices

Fig. 14 - For N-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon

Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and

reliability data, see /ppg?91019.

Document Number: 91019

S-81240-Rev. A, 16-Jun-08

7

Legal Disclaimer Notice

Vishay

Disclaimer

All product specifications and data are subject to change without notice.

Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf

(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein

or in any other disclosure relating to any product.

Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any

information provided herein to the maximum extent permitted by law. The product specifications do not expand or

otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed

therein, which apply to these products.

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this

document or by any conduct of Vishay.

The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless

otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such

applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting

from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding

products designed for such applications.

Product names and markings noted herein may be trademarks of their respective owners.

Document Number: 91000

Revision: 18-Jul-08

1

This datasheet has been downloaded from:

Free Download

Daily Updated Database

100% Free Datasheet Search Site

100% Free IC Replacement Search Site

Convenient Electronic Dictionary

Fast Search System

All Datasheets Cannot Be Modified Without Permission

Copyright © Each Manufacturing Company

发布评论

评论列表 (0)

  1. 暂无评论