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5815中文资料

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2024年4月23日发(作者:壤驷心怡)

元器件交易网

5815

UCN5815A

ENABLE

STROBE

IN

1

IN

2

IN

3

IN

4

IN

5

IN

6

IN

7

IN

8

GROUND

1

2

3

4

5

6

7

8

9

10

11

L

A

T

C

H

E

S

BiMOS II 8-BIT

LATCHED SOURCE DRIVERS

Designed primarily for use with high-voltage vacuum-fluorescent

displays, the UCN5815A and UCN5815EP BiMOS II integrated

circuits consist of eight npn Darlington source drivers with output pull-

down resistors, a CMOS latch for each driver, and common STROBE,

BLANKING, and ENABLE functions.

BiMOS II devices have considerably better data-input rates than

the original BiMOS circuits. With a 5 V logic supply, they will operate

to at least 4.4 MHz. With a 12 V supply, significantly higher speeds

are obtained. The CMOS inputs cause minimum loading and are

compatible with standard CMOS and NMOS logic commonly found in

microprocessor designs. TTL circuits may require the use of appropri-

ate pull-up resistors.

The bipolar outputs may be used as segment, dot (matrix), bar, or

digit drivers in vacuum-fluorescent displays. All eight outputs can be

activated simultaneously at ambient temperatures in excess of 75°C.

To simplify printed wiring board layout, output connections are

opposite the inputs. A minimum component display subsystem,

requiring few or no discrete components, can be assembled using the

UCN5815A/EP with the UCN5810AF/EPF/LWF, UCN5812AF/EPF,

or UCN5818AF/EPF serial-to-parallel latched drivers.

Suffix ‘A’ devices are furnished in a standard 22-pin plastic DIP;

suffix ‘EP’ indicates a 28-lead PLCC.

Data Sheet

26183.10A*

22

V

DD

21

20

19

18

17

16

15

14

13

V

BB

12

BLANKING

LOGIC

SUPPLY

OUT

1

OUT

2

OUT

3

OUT

4

OUT

5

OUT

6

OUT

7

OUT

8

LOAD

SUPPLY

Dwg. PP-015-3

ABSOLUTE MAXIMUM RATINGS

at +25°C Free-Air Temperature

Output Voltage, V

OUT

.. . . . . . . . . . . . . 60 V

Logic Supply Voltage Range,

V

DD

.. . . . . . . . . . . . . . . . . 4.5 V to 15 V

Load Supply Voltage Range,

V

BB

. . . . . . . . . . . . . . . . . . 5.0 V to 60 V

Input Voltage Range,

V

IN

.. . . . . . . . . . -0.3 V to V

DD

+ 0.3 V

Continuous Output Current,

I

OUT

. . . . . . . . . . . . . . . . . . . . . . -40 mA

Package Power Dissipation, P

D

(UCN5815A). . . . . . . . . . . . . . . 2.5 W*

(UCN5815EP). . . . . . . . . . . . . 2.27 W*

Operating Temperature Range,

T

A

. . . . . . . . . . . . . . . . . -20

°

C to +85

°

C

Storage Temperature Range,

T

S

. . . . . . . . . . . . . . . . -55

°

C to +150

°

C

* Derate linearly to 0 W at +150°C.

Caution: CMOS devices have input static

protection but are susceptible to damage

when exposed to extremely high static

electrical charges.

FEATURES

I

I

I

I

I

I

To 4.4 MHz Date-lnput Rate

High-Voltage Source Outputs

CMOS, NMOS, TTL Compatible Inputs

Low-Power CMOS Latches

Internal Pull-Down Resistors

Wide Supply-Voltage Range

Always order by complete part number:

Part Number

UCN5815A

UCN5815EP

Package

22-Pin DIP

28-Lead PLCC

元器件交易网

5815

BiMOS II

8-BIT LATCHED

SOURCE DRIVERS

ELECTRICAL CHARACTERISTICS at T

A

= +25

°

C, V

BB

= 60 V, V

DD

= 5 V and 12 V

(unless otherwise noted).

Characteristic

Output Off Voltage

Output On Voltage

Output Pull-Down Current

Output Leakage Current

Input Voltage

Symbol

V

OUT

V

OUT

I

OUT

I

OUT

V

IN(1)

I

OUT

= -25 mA, V

BB

= 60 V

V

OUT

= V

BB

T

A

= 70°C

V

DD

= 5.0 V

V

DD

= 12 V

V

IN(0)

Input CurrentI

IN(1)

V

DD

= V

IN

= 5.0 V

V

DD

= V

IN

= 12 V

Input lmpedance

Supply Current

Z

IN

l

BB

V

DD

= 5.0 V

All outputs on, All outputs open

All outputs off, All outputs open

l

DD

V

DD

= 5.0 V, All outputs off, All inputs = 0 V

V

DD

= 12 V, All outputs off, All inputs = 0 V

V

DD

= 5.0 V, One output on, All inputs = 0 V

V

DD

= 12 V, One output on, All inputs = 0 V

NOTE: Positive (negative) current is defined as going into (coming out of) the specified device pin.

Test ConditionsMin.

57.5

400

3.5

10.5

-0.3

50

Limits

Max.

1.0

850

-15

5.3

12.3

+0.8

100

240

10.5

100

100

200

1.0

3.0

Units

V

V

µA

µA

V

V

V

µA

µA

kΩ

mA

µA

µA

µA

mA

mA

TYPICAL INPUT

CIRCUIT

V

DD

TYPICAL OUTPUT

DRIVER

V

BB

IN

100 K

OUT

Dwg. No. EP-010-4ADwg. No. EP-021-3

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

Copyright © 1984, 2000 Allegro MicroSystems, Inc.

2024年4月23日发(作者:壤驷心怡)

元器件交易网

5815

UCN5815A

ENABLE

STROBE

IN

1

IN

2

IN

3

IN

4

IN

5

IN

6

IN

7

IN

8

GROUND

1

2

3

4

5

6

7

8

9

10

11

L

A

T

C

H

E

S

BiMOS II 8-BIT

LATCHED SOURCE DRIVERS

Designed primarily for use with high-voltage vacuum-fluorescent

displays, the UCN5815A and UCN5815EP BiMOS II integrated

circuits consist of eight npn Darlington source drivers with output pull-

down resistors, a CMOS latch for each driver, and common STROBE,

BLANKING, and ENABLE functions.

BiMOS II devices have considerably better data-input rates than

the original BiMOS circuits. With a 5 V logic supply, they will operate

to at least 4.4 MHz. With a 12 V supply, significantly higher speeds

are obtained. The CMOS inputs cause minimum loading and are

compatible with standard CMOS and NMOS logic commonly found in

microprocessor designs. TTL circuits may require the use of appropri-

ate pull-up resistors.

The bipolar outputs may be used as segment, dot (matrix), bar, or

digit drivers in vacuum-fluorescent displays. All eight outputs can be

activated simultaneously at ambient temperatures in excess of 75°C.

To simplify printed wiring board layout, output connections are

opposite the inputs. A minimum component display subsystem,

requiring few or no discrete components, can be assembled using the

UCN5815A/EP with the UCN5810AF/EPF/LWF, UCN5812AF/EPF,

or UCN5818AF/EPF serial-to-parallel latched drivers.

Suffix ‘A’ devices are furnished in a standard 22-pin plastic DIP;

suffix ‘EP’ indicates a 28-lead PLCC.

Data Sheet

26183.10A*

22

V

DD

21

20

19

18

17

16

15

14

13

V

BB

12

BLANKING

LOGIC

SUPPLY

OUT

1

OUT

2

OUT

3

OUT

4

OUT

5

OUT

6

OUT

7

OUT

8

LOAD

SUPPLY

Dwg. PP-015-3

ABSOLUTE MAXIMUM RATINGS

at +25°C Free-Air Temperature

Output Voltage, V

OUT

.. . . . . . . . . . . . . 60 V

Logic Supply Voltage Range,

V

DD

.. . . . . . . . . . . . . . . . . 4.5 V to 15 V

Load Supply Voltage Range,

V

BB

. . . . . . . . . . . . . . . . . . 5.0 V to 60 V

Input Voltage Range,

V

IN

.. . . . . . . . . . -0.3 V to V

DD

+ 0.3 V

Continuous Output Current,

I

OUT

. . . . . . . . . . . . . . . . . . . . . . -40 mA

Package Power Dissipation, P

D

(UCN5815A). . . . . . . . . . . . . . . 2.5 W*

(UCN5815EP). . . . . . . . . . . . . 2.27 W*

Operating Temperature Range,

T

A

. . . . . . . . . . . . . . . . . -20

°

C to +85

°

C

Storage Temperature Range,

T

S

. . . . . . . . . . . . . . . . -55

°

C to +150

°

C

* Derate linearly to 0 W at +150°C.

Caution: CMOS devices have input static

protection but are susceptible to damage

when exposed to extremely high static

electrical charges.

FEATURES

I

I

I

I

I

I

To 4.4 MHz Date-lnput Rate

High-Voltage Source Outputs

CMOS, NMOS, TTL Compatible Inputs

Low-Power CMOS Latches

Internal Pull-Down Resistors

Wide Supply-Voltage Range

Always order by complete part number:

Part Number

UCN5815A

UCN5815EP

Package

22-Pin DIP

28-Lead PLCC

元器件交易网

5815

BiMOS II

8-BIT LATCHED

SOURCE DRIVERS

ELECTRICAL CHARACTERISTICS at T

A

= +25

°

C, V

BB

= 60 V, V

DD

= 5 V and 12 V

(unless otherwise noted).

Characteristic

Output Off Voltage

Output On Voltage

Output Pull-Down Current

Output Leakage Current

Input Voltage

Symbol

V

OUT

V

OUT

I

OUT

I

OUT

V

IN(1)

I

OUT

= -25 mA, V

BB

= 60 V

V

OUT

= V

BB

T

A

= 70°C

V

DD

= 5.0 V

V

DD

= 12 V

V

IN(0)

Input CurrentI

IN(1)

V

DD

= V

IN

= 5.0 V

V

DD

= V

IN

= 12 V

Input lmpedance

Supply Current

Z

IN

l

BB

V

DD

= 5.0 V

All outputs on, All outputs open

All outputs off, All outputs open

l

DD

V

DD

= 5.0 V, All outputs off, All inputs = 0 V

V

DD

= 12 V, All outputs off, All inputs = 0 V

V

DD

= 5.0 V, One output on, All inputs = 0 V

V

DD

= 12 V, One output on, All inputs = 0 V

NOTE: Positive (negative) current is defined as going into (coming out of) the specified device pin.

Test ConditionsMin.

57.5

400

3.5

10.5

-0.3

50

Limits

Max.

1.0

850

-15

5.3

12.3

+0.8

100

240

10.5

100

100

200

1.0

3.0

Units

V

V

µA

µA

V

V

V

µA

µA

kΩ

mA

µA

µA

µA

mA

mA

TYPICAL INPUT

CIRCUIT

V

DD

TYPICAL OUTPUT

DRIVER

V

BB

IN

100 K

OUT

Dwg. No. EP-010-4ADwg. No. EP-021-3

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

Copyright © 1984, 2000 Allegro MicroSystems, Inc.

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