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FPGA可编程逻辑器件芯片XC6VLX760-1FFG1760C中文规格书

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2024年5月9日发(作者:康雨筠)

Pin Name

VFS_0

Direction

Input

Description

e power supply pin for programming. When not used, connect to GND.

Dedicated System Monitor Pins

AVDD_0

(3)

AVSS_0

(3)

VP_0

(3)

VN_0

(3)

VREFP_0

(3)

VREFN_ 0

(3)

N/A

N/A

Input

Input

N/A

N/A

System Monitor’s ADC analog positive supply voltage. Default connection is to

V

CCAUX

.

System Monitor’s ADC analog ground reference. Default connection is to

system GND via a ferrite bead.

System Monitor dedicated differential analog input (positive side).

System Monitor dedicated differential analog input (negative side).

1.25V reference input. Default connection is AVSS to enable the on-chip

reference.

1.25V reference GND reference. Default connection is AVSS to enable the on-

chip reference.

RocketIO Serial Transceiver Pins (GTXE1 and GTHE1_QUAD)

MGTRXP[0:3]

MGTRXN[0:3]

MGTTXP[0:3]

MGTTXN[0:3]

MGTAVCC

MGTAVCC_N

MGTAVCC_S

MGTAVTT

MGTAVTT_N

MGTAVTT_S

MGTAVCC_LN

MGTAVCC_LS

MGTAVCC_RN

MGTAVCC_RS

MGTAVTT_LN

MGTAVTT_LS

MGTAVTT_RN

MGTAVTT_RS

Input

Input

Output

Output

N/A

Positive differential receive port.

Negative differential receive port.

Positive differential transmit port.

Negative differential transmit port.

Power-supply pin for GTXE1 transceiver’s mixed-signal circuitry and PLLs

(4)

.

Only available in Virtex-6 LXT and SXT devices.

Power-supply pin for GTXE1 transceiver’s TX and RX circuitry.

(4)

.

N/A

Only available in Virtex-6 LXT and SXT devices.

Power-supply pin for transceiver mixed-signal circuitry left/north. Virtex-6

HXT devices only.

Power-supply pin for transceiver mixed-signal circuitry left/south. Virtex-6

HXT devices only.

Power-supply pin for transceiver mixed-signal circuitry right/north. Virtex-6

HXT devices only.

Power-supply pin for transceiver mixed-signal circuitry right/south. Virtex-6

HXT devices only.

Power-supply pin for TX and RX circuitry left/north. Virtex-6 HXT devices

only.

Power-supply pin for TX and RX circuitry left/south. Virtex-6 HXT devices

only.

Power-supply pin for TX and RX circuitry right/north. Virtex-6 HXT devices

only.

Power-supply pin for TX and RX circuitry right/south. Virtex-6 HXT devices

only.

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

Virtex-6 FPGA Packaging

UG365 (v2.6) October 3, 2018

FF784/RF784 Package—LX75T, LX130T, LX195T, and LX240T

Virtex-6 FPGA Packaging

UG365 (v2.6) October 3, 2018

2024年5月9日发(作者:康雨筠)

Pin Name

VFS_0

Direction

Input

Description

e power supply pin for programming. When not used, connect to GND.

Dedicated System Monitor Pins

AVDD_0

(3)

AVSS_0

(3)

VP_0

(3)

VN_0

(3)

VREFP_0

(3)

VREFN_ 0

(3)

N/A

N/A

Input

Input

N/A

N/A

System Monitor’s ADC analog positive supply voltage. Default connection is to

V

CCAUX

.

System Monitor’s ADC analog ground reference. Default connection is to

system GND via a ferrite bead.

System Monitor dedicated differential analog input (positive side).

System Monitor dedicated differential analog input (negative side).

1.25V reference input. Default connection is AVSS to enable the on-chip

reference.

1.25V reference GND reference. Default connection is AVSS to enable the on-

chip reference.

RocketIO Serial Transceiver Pins (GTXE1 and GTHE1_QUAD)

MGTRXP[0:3]

MGTRXN[0:3]

MGTTXP[0:3]

MGTTXN[0:3]

MGTAVCC

MGTAVCC_N

MGTAVCC_S

MGTAVTT

MGTAVTT_N

MGTAVTT_S

MGTAVCC_LN

MGTAVCC_LS

MGTAVCC_RN

MGTAVCC_RS

MGTAVTT_LN

MGTAVTT_LS

MGTAVTT_RN

MGTAVTT_RS

Input

Input

Output

Output

N/A

Positive differential receive port.

Negative differential receive port.

Positive differential transmit port.

Negative differential transmit port.

Power-supply pin for GTXE1 transceiver’s mixed-signal circuitry and PLLs

(4)

.

Only available in Virtex-6 LXT and SXT devices.

Power-supply pin for GTXE1 transceiver’s TX and RX circuitry.

(4)

.

N/A

Only available in Virtex-6 LXT and SXT devices.

Power-supply pin for transceiver mixed-signal circuitry left/north. Virtex-6

HXT devices only.

Power-supply pin for transceiver mixed-signal circuitry left/south. Virtex-6

HXT devices only.

Power-supply pin for transceiver mixed-signal circuitry right/north. Virtex-6

HXT devices only.

Power-supply pin for transceiver mixed-signal circuitry right/south. Virtex-6

HXT devices only.

Power-supply pin for TX and RX circuitry left/north. Virtex-6 HXT devices

only.

Power-supply pin for TX and RX circuitry left/south. Virtex-6 HXT devices

only.

Power-supply pin for TX and RX circuitry right/north. Virtex-6 HXT devices

only.

Power-supply pin for TX and RX circuitry right/south. Virtex-6 HXT devices

only.

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

Virtex-6 FPGA Packaging

UG365 (v2.6) October 3, 2018

FF784/RF784 Package—LX75T, LX130T, LX195T, and LX240T

Virtex-6 FPGA Packaging

UG365 (v2.6) October 3, 2018

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