2024年7月31日发(作者:谈韶)
Datasheet TLE 6228 GP
Smart Quad Channel Low-Side Switch
Features
Product Summary
• Shorted Circuit Protection
• Overtemperature Protection
• Overvoltage Protection
• Parallel Control of the Inputs (PWM Applications)
• Seperate Diagnostic Pin for Each Channel
• Power - SO 20 - Package with integrated
cooling area
• Standby mode with low current consumption
• µC compatible Input
• Electrostatic Discharge (ESD) Protection
Supply voltage
Drain source voltage
On resistance
Output current
4.8 - 32V
V
S
V
DS(AZ)max
60 V
R
ON 1,2
0.23 Ω
R
ON 3,4
0.28 Ω
I
D 1,2 (max)
2 x 5 A
I
D 3,4 (max)
2 x 3 A
Application
• All kinds of resistive and inductive loads (relays,electromagnetic valves)
• µC compatible power switch for 12 and 24 V applications
• Solenoid control switch in automotive and industrial control systems
• Robotic Controls
P-DSO-20-12
Ordering Code:
Q67006-A9364
General description
Quad channel Low-Side-Switch (2x5A/2x3A) in Smart Power Technology (SPT) with four separate in-
puts and four open drain DMOS output stages. The TLE 6228 GP is fully protected by embedded pro-
tection functions and designed for automotive and industrial applications. Each channel has its own
status signal for diagnostic feedback. Therefore the TLE 6228 GP is particularly suitable for ABS or
Powertrain Systems.
Block Diagram
STBY
GND
VS
ENA
normal function
V
BB
IN1
IN2
IN3
IN4
ST1
as Ch. 1
as Ch. 1
as Ch. 1
SCB / overload
LOGIC
overtemperature
open load/sh. to gnd
Output Stage
OUT1
1
as ST 1
as ST 1
as ST 1
4
4
ST2
ST3
ST4
Gate Control
OUT4
GND
V3.1Page
1
26. Aug. 2002
Datasheet TLE 6228 GP
Detailed Block Diagram
VS
STBY
internal supply
Overtemperature
Channel 4
ENA
Overtemperature
Channel 1
Open Load
IN1
ST1
LOGIC
Overload
OUT1
Open Load
IPD
IN4
LOGIC
Overload
OUT
ST4
Overtemperature
Channel 3
Overtemperature
Channel 2
Open Load
IPD
IN2
ST2
LOGIC
Overload
OUT
Open Load
IPD
IN3
LOGIC
Overload
OUT
ST3
IPD
GND
V3.1Page
2
26. Aug. 2002
Datasheet TLE 6228 GP
Pin Description Pin Configuration (Top view)
PinSymbolFunction
1GNDGround
2OUT1Power Output channel 1
3ST1Status Output channel 1
4IN4Control Input channel 4
5VSSupply Voltage
6STBYStandby
7IN3Control Input channel 3
8ST2Status Output channel 2
9OUT2Power Output channel 2
10GNDGround
11GNDGround
12OUT3Power Output channel 3
13ST3Status Output channel 3
14IN2Control Input channel 2
15GNDGround Logic
16ENAEnable Input for all four channels
17IN1Control Input channel 1
18ST4Status Output channel 4
19OUT4Power Output channel 4
20GNDGround
Heat slug internally connected to ground pins
V3.1Page
3
GND1
•
20GND
OUT1219OUT4
ST1318ST4
IN4417IN1
VS516ENA
STBY615GNDL
IN3714IN2
ST2813ST3
OUT2912OUT3
GND1011GND
P - DSO - 20 - 12
26. Aug. 2002
Datasheet TLE 6228 GP
Maximum Ratings for T
j
= – 40°C to 150°C
The maximum ratings may not be exceeded under any circumstances, not even momentarily and
individually, as permanent damage to the IC will result.
Parameter
Supply voltage
Continuous drain source voltage (OUT4)
Input voltage IN1 to IN4, ENA
Input voltage STBY
Status output voltage
Load Dump Protection V
Load Dump
= U
P
+U
S
; U
P
=13.5 V
R
I
1
)
=2 Ω; t
d
=400ms; IN = low or high
With R
L
= 5 Ω for Ch. 1,2; 10 Ω for Ch. 3,4
(I
D
= 2,7A respectively 1,35A)
Operating temperature range
Storage temperature range
Output current per channel (see page 6)
Status output current
Inductive load switch off energy (single pulse) T
j
= 25°C
Electrostatic Discharge Voltage (human body model)
according to MIL STD 883D, method 3015.7 and EOS/ESD
assn. standard S5.1 - 1993
DIN Humidity Category, DIN 40 040
IEC Climatic Category, DIN IEC 68-1
Thermal resistance
junction – case (die soldered on the frame)
junction - ambient @ min. footprint
junction - ambient @ 6 cm
2
cooling area
R
thJC
R
thJA
Symbol
V
S
V
DS
V
IN
, V
ENA
V
STBY
V
ST
V
Load Dump
2
)
Values
-0.3 ... + 40
45
- 0.3 ... + 6
- 0.3 ... + 40
- 0.3 ... + 32
55
V
V
Unit
V
V
V
T
j
T
stg
I
D(lim)
I
ST
E
AS
V
ESD
- 40 ... + 150
- 55 ... + 150
I
D(lim) min
- 5 ... + 5
50
2000
°C
A
mA
mJ
V
E
40/150/56
K/W
2
50
38
Minimum footprint
PCB with heat pipes,
2
backside 6 cm cooling area
1
)
2
)
R
I
=internal resistance of the load dump test pulse generator LD200
V
LoadDump
is setup without DUT connected to the generator per ISO 7637-1 and DIN 40 839.
Page
4
26. Aug. 2002V3.1
Datasheet TLE 6228 GP
Electrical Characteristics
Parameter and Conditions
V
S
= 4.8 to 18 V ; T
j
= - 40 °C to + 150 °C
(unless otherwise specified)
1. Power Supply (V
S
)
Supply current (Outputs ON)
Supply current (Outputs OFF)
V
ENA
= L, V
STBY
= H
Standby current
Operating voltage
2. Power Outputs
ON state resistance Channel 1,2
I
D
= 1A; V
S
≥ 9.5 V
ON state resistance Channel 3,4
I
D
= 1A; V
S
≥ 9.5 V
Z-Diode clamping voltage (4)
Pull down current
Output leakage current
3
T
j
= 25 ° C
T
j
= 150°C
T
j
= 25 ° C
T
j
= 150°C
I
D
≥ 100 mA
V
STBY
= H, V
IN
= L
V
STBY
= L, 0V ≤ V
DS
≤ 20V
I
D
= 1 A
I
D
= 1 A
I
D
= 1 A
I
D
= 1 A
R
DS(ON)
R
DS(ON)
V
DS(AZ)
I
PD
I
Dlk
t
on
t
off
t
fall
t
rise
t
DSO
t
D
t
D-failure
t
D-IN
t
fOL(off)
3
3
3
3
20
500
500
500
10
15
20
10
5
60
1200
1200
1200
30
45
1020
0.23
0.28
0.26
0.5
0.4
0.75
60
50
5
50
60
30
30
100
3000
3000
3000
100
Ω
Ω
V
µA
µA
µs
V
STBY
= L
I
S
I
S
I
S
V
S
4.8
8
4
10
32
mA
mA
µA
V
SymbolValues
min
Unit
typmax
Output turn on time
4
Output turn off time
4
Output on fall time
4
Output off rise time
4
Overload switch-off delay time
4
Output off status delay time
4
Failure extension Time for Status Report
Input Suppression Time
Open Load (off) filtering Time
5
3. Digital Inputs (IN1, IN2, IN3, IN4, ENA)
Input low voltage
Input high voltage
Input voltage hysteresis
5
V
INL
V
INH
V
INHys
I
IN
I
ENA
- 0.3
2.0
50
10
10
200
30
20
1.0
6.0
60
40
V
V
mV
µA
µA
Input pull down current V
IN
= 5 V; V
S
≥ 6.5 V
Enable pull down current V
ENA
= 5 V; V
S
≥ 6.5 V
4. Digital Status Outputs (ST1 - ST4) Open Drain
Output voltage low
Leakage current high
I
ST
= 2 mAV
STL
I
STH
0.5
2
V
µA
3
4
If the output voltage exceeds 35V, this current (zener current of a internal structure) can rise up to 1mA
See timing diagram, resistive load condition; V
S
≥ 9 V
5
This parameter will not be testet but assured by design
V3.1Page
5
26. Aug. 2002
Datasheet TLE 6228 GP
Electrical Characteristics
Parameter and Conditions
V
S
= 4.8 to 18 V ; T
j
= – 40 °C to + 150 °C
(unless otherwise specified)
5. Standby Input (STBY)
Input low voltage
Input high voltage
Input current
6. Diagnostic Functions
Open load detection voltage
V
ENA
= X, V
IN
= L
Open load detection current channel 1,2
V
ENA
= V
IN
= H
Open load detection current channel 3,4
V
ENA
= V
IN
= H
Overload detection current channel 1,2
Overload detection current channel 3,4
Overtemperature shutdown threshold
5
Hysteresis
Pulse Width for static diagnostic output
V
S
≥ 6.5 V
V
S
≥ 6.5 V
V
S
≥ 6.5 V
V
S
≥ 6.5 V
V
S
≥ 6.5 V
V
DS(OL)
I
D(OL) 1,2
I
D(OL) 3,4
I
D(lim) 1,2
I
D(lim) 3,4
T
th
T
hys
t
IN
0.3*
V
S
0.33*
V
S
0.36*
V
S
100
100
5
3
170
10
500
160
160
7.5
5.5
200
250
250
V
mA
mA
A
A
°C
K
µs
V
STBY
= 18 V
V
STBY
V
STBY
I
STBY
0
3.5
1
V
S
300
V
V
µA
SymbolValues
min
Unit
typmax
5
This parameter will not be tested but assured by design
Page
6
26. Aug. 2002V3.1
Datasheet TLE 6228 GP
Application Description
This IC is especially designed to drive inductive loads (relays, electromagnetic valves).
Integrated clamp-diodes limit the output voltage when inductive loads are discharged.
Four open-drain logic outputs indicate the status of the integrated ciruit. The following conditions are
monitored and signalled:
- overloading of output (also shorted load to supply) in active mode
- open and shorted load to ground in active and inactive mode
- overtemperature
Circuit Description
Input Circuits
The control and enable inputs, both active high, consist of schmitt triggers with hysteresis. All inputs
are provided with pull-down current sources. Not connected inputs are interpreted as low and the re-
spective output stages are switched off.
In standby mode (STBY = LOW ) the current consumption is greatly reduced.
The circuit is active when STBY = HIGH.
If the standby function is not used, it is allowed to connect the standby pin directly to VS.
Status Signals: The status signals are undefined for 2ms after a power up event or a STBY low to high
transition.
Output Stages
The four power outputs consist of DMOS-power transistors with open drains. The output stages are
short circuit protected throughout the operating range. Each output has it's own zenerclamp. This
causes a voltage limitation at the power transistor when inductive loads are switched off.
Parallel to the DMOS transistors there are internal pull down current sources. They are provided to
detect an open load condition in the off state. They will be disconnected in the standby mode.
Due to EMI measures there is an internal zenerclamp in parallel to the output stage. It gets active
above 33V drain source voltage. This leads to an increasing leakage current up to 1 mA @ V
DS
= 40V.
Protective Circuits
The outputs are protected against current overload and overtemperature. If the output current in-
creases above the overload detection threshold I
QO
for a longer time then t
DSO
or the temperature in-
creases above T
th
, then the power transistor is immediately switched off. It remains off until the control
signal at the input is switched off and on again.
Fault Detection
The status outputs indicate the switching state of the output stage. Under normal conditions is: ST =
low Output off; ST = high Output on. If an error occurs, the logic level of the status output is in-
verted, as listed in the diagnostic table.
6)
6)
The integrated protection functions prevent an IC destruction under fault conditions and may not be used in
normal operation or permanently.
Page
7
26. Aug. 2002V3.1
Datasheet TLE 6228 GP
If current overload or overtemperature occurs for a longer time than t
DSO
, the fault condition is latched
into an internal register and the output is shutdown. The reset is done by switching off the correspond-
ing control input for a time longer than t
D-IN
.
Open load is detected for all four channels in on and off mode.
In the on mode the load current is monitored. If it drops below the specified threshold value IQU then
an open load condition is detected.
In the off mode, the output voltage is monitored. An open load condition is detected when the output
voltage of a given channel is below the threshold V
DS(OL)
, which is typ. 33 % of the supply voltage VS.
To prevent an open load diagnosis in case of transient Voltages on the outputs the open load detection
in off mode uses a filter of typ. 50µs.
Status output at pulse width operation
If the input is operated with a pulsed signal, the status does not follow each single pulse of the input
signal. An internal delay t
D
of typ. 1.2ms ( min 500 µs) enables a continuous status output signal. See
the timing diagrams on the following pages for further information.
This internal status delay simplifies diagnostic software for pwm applications.
Diagnostic Table
In general the status follows the input signal in normal operating conditions.
If any error is detected the status is inverted.
Operating Condition
Standby
Normal function
Standby
Input
STBY
L
H
H
H
H
H
H
H
H
H
H
H
H
H
Enable
Input
ENA
X
L
H
H
L
L
H
H
H
H
L
H
H
L
Control
Input
IN
X
X
L
H
L
H
L
H
H
H → L
X
H
H → L
X
Power
Output
Q
off
off
off
ON
off
off
off
ON
off
off
off
off
off
off
Status
Output
ST
H
L
L
H
H
H
H
L
L
L
L
L
L
L
Open load or short to ground
Overload or short to supply
1)
reset latch
2)
Overtemperature
1)
reset latch
2)
Note 1) : overload/short-to-supply/overtemperature - events shorter than min. time t
DSO
specified in
2.10 will not be latched and not reported at the status pin.
V3.1Page
8
26. Aug. 2002
Datasheet TLE 6228 GP
Note 2) : to reset latched status-output in case of overload/short-to-supply/overtemperature the control
input has to go low and stay low for longer than max. input suppression time t
D-IN
specified in 2.13 of
the characteristics
Failure Situations and Status Report
Logic Block Diagram
Overtemperature
1.....overtemperature
0.....normal cond.
Gate Driver
1... Output
0....Output
ENA
1....enabled
0... disabled
Input
1....On
0... Off
IN
Delay D
SET
t
D
t
DSO
Delay
60µs
S
R
Q
OUT
1,2ms typ.
CLR
Q
Delay
60µs
IN
OUT
t
D
60µs typ.
Overload
0.....overload
1.....normal cond.
t
D
t
D-IN
when
load
EN
IN
Delay D
OUT
Open load "off"
1.....open load
0.....normal cond.
HI
Filter
30µs
Filter
t
D-failure
EN
IN
Delay D
OUT
Status
0....High
1....Low
Open load "on"
0.....open load
1.... normal cond.
EN
IN
t
D-failure
Delay D
OUT
V3.1Page
9
26. Aug. 2002
Datasheet TLE 6228 GP
Timing Diagrams
Output Slope
V
IN
V
INH
V
INL
t
V
DS
V
S
85%
t
on
t
off
15%
t
t
f
t
r
V
ST
t
D
t
Fig. 1
Overload Switch OFF Delay
I
D
I
D(lim)
I
D(OL)
t
t
D
S
O
V
ST
t
D-failure
t
Fig. 2
V3.1Page
10
26. Aug. 2002
V3.1
Test Circuit
V
D
=
5
V
V
S
1
0
k
R
L
2
I
V
S
1
0
k
1
0
k
1
0
k
R
L
4
R
L
3
R
L
1
S
T
1
I
S
T
1
V
S
S
T
1
O
U
T
1
S
T
2
I
D
2
I
D
1
O
U
T
1
S
T
2
I
S
T
2
I
S
T
3
S
T
3
S
T
3
O
U
T
2
I
S
T
4
O
U
T
2
S
T
4
S
T
4
I
N
1
O
U
T
3
I
N
2
I
N
3
I
N
4
I
I
N
4
I
I
N
1
TLE 6228 GP
Page
I
I
N
2
I
N
1
I
N
2
I
N
3
I
I
N
3
T
L
E
6
2
2
7
I
D
4
I
D
3
O
U
T
3
11
O
U
T
4
O
U
T
4
I
N
4
E
N
A
S
T
B
Y
V
D
S
(
O
U
T
4
)
V
D
S
(
O
U
T
3
)
V
D
S
(
O
U
T
2
)
V
D
S
(
O
U
T
1
)
E
N
A
V
I
N
2
V
I
N
3
V
E
N
A
I
S
T
B
Y
V
S
T
B
Y
V
I
N
4
I
E
N
A
V
S
T
1
V
S
T
2
V
S
T
3
V
S
T
4
V
I
N
1
Datasheet TLE 6228 GP
26. Aug. 2002
G
N
D
Datasheet TLE 6228 GP
Application Circuit
+
1
2
V
L
1
L
2
L
3
L
4
S
T
B
Y
V
S
S
T
1
O
U
T
1
S
T
2
S
T
3
S
T
4
T
L
E
O
U
T
2
I
N
1
6
2
2
8
O
U
T
3
I
N
2
O
U
T
4
I
N
3
I
N
4
C
o
n
t
r
o
l
I
n
p
u
t
s
1
0
k
1
0
k
1
0
k
1
0
k
V
D
=
5
V
C
S
t
a
t
u
s
O
u
t
p
u
t
The blocking capacitor C is recommended to avoid critical negative voltage spikes on VS in case of
battery interruption during OFF-commutation.
V3.1Page
12
26. Aug. 2002
E
n
a
b
l
e
I
n
p
u
t
E
N
A
G
N
D
Datasheet TLE 6228 GP
Timing Diagrams of Diagnostic with Pulsed Input Signal
Normal condition, resistive load, pulsed input signal
V
IN
t
IN
I
D
V
ST
t
D
t
D
Fig. 3
Current Overload
F
t
INoff
V
IN
I
D(lim)
current overload condition
I
D
V
ST
t
DSO
t
D-IN
t
DSO
t
INoff
< t
D-IN
: Input suppression time avoids a restart after overtemperature
Fig. 4
V3.1Page
13
26. Aug. 2002
Datasheet TLE 6228 GP
Diagnostic status output at different open load current conditions
V
IN
I
D(OL)
t
D-failure
V
ST
I
D
t
D
Fig. 5
V
IN
t
INoff
I
D
t
D-failure
V
ST
t
INOFF
< t
D
leads to a static status signal
t
D
I
D(OL)
Fig. 6
V
IN
t
INoff
I
D(OL)
I
D
t
D-failure
t
D-failure
t
D
t
D-failure
V
ST
t
INoff
> t
D
: Intermittend status signal Fig. 7
V3.1Page
14
26. Aug. 2002
Datasheet TLE 6228 GP
Normal operation, followed by open load condition
~ 55V
Open load voltage condition
V
DS
12V
33%
V
IN
I
D(OL)
t
fOL(off)-
I
D
t
D-failure
V
ST
t
D
t
D-failure
Fig. 8
Overtemperature
Overtemperature
V
IN
t
INoff
> t
D-IN
I
D(OL)
I
D
t
D-failure
t
D-failure
Reset of overload
Flip Flop
V
ST
t
DSO
Fig. 9
V3.1Page
15
26. Aug. 2002
Datasheet TLE 6228 GP
Typical electrical Characteristics
Drain-Source on-resistance
R
DS(ON)
= f (T
j
) ; V
s
= 9,5V
Typical Drain- Source ON-Resistance
0,45
Channel 1, 2
Channel 3, 4
0,4
R
D
S
(
O
N
)
[
O
h
m
]
0,35
0,3
0,25
0,2
0,15
-50-2502550
Tj[°C]
751
Figure 6 :
Typical ON Resistance versus Junction-Temperature
Channel 1-4
Output Clamping Voltage
V
DS(AZ)
= f (T
j
) ; I
D
= 100mA
Typical Clamping Voltage
55
54
53
Channel 1-4
V
D
S
(
A
Z
)
[
V
]
52
51
50
49
48
-50-2502550
Tj[°C]
751
Figure 7 :
Typical Clamp Voltage versus Junction-Temperature
Channel 1-4
V3.1Page
16
26. Aug. 2002
Datasheet TLE 6228 GP
Package and ordering code
all dimensions in mm
P - DSO - 20 - 12
TLE 6228 GP
Ordering code
Q67006-A9364
V3.1
15.74
+/- 0.1
13.7
-0.2
9 x =1.2711.43
1.27
0.4
+0.13
0.25
M
A
2011
1
.
0
1
.
-
/
0
+
-
/
2
+
.
3
9
.
5
110
1 x 45°
PIN 1 INDEX MARKING
+/-0.15
A
15.9
1.2
-0.3
0.1
3
.
1
8°
2.8
8°8°
6.3
8°
11
+/-0.15
1)
14.2
+/-0.3
Page
17
26. Aug. 2002
Datasheet TLE 6228 GP
Published by
Infineon Technologies AG,
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For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Tech-
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V3.1Page
18
26. Aug. 2002
2024年7月31日发(作者:谈韶)
Datasheet TLE 6228 GP
Smart Quad Channel Low-Side Switch
Features
Product Summary
• Shorted Circuit Protection
• Overtemperature Protection
• Overvoltage Protection
• Parallel Control of the Inputs (PWM Applications)
• Seperate Diagnostic Pin for Each Channel
• Power - SO 20 - Package with integrated
cooling area
• Standby mode with low current consumption
• µC compatible Input
• Electrostatic Discharge (ESD) Protection
Supply voltage
Drain source voltage
On resistance
Output current
4.8 - 32V
V
S
V
DS(AZ)max
60 V
R
ON 1,2
0.23 Ω
R
ON 3,4
0.28 Ω
I
D 1,2 (max)
2 x 5 A
I
D 3,4 (max)
2 x 3 A
Application
• All kinds of resistive and inductive loads (relays,electromagnetic valves)
• µC compatible power switch for 12 and 24 V applications
• Solenoid control switch in automotive and industrial control systems
• Robotic Controls
P-DSO-20-12
Ordering Code:
Q67006-A9364
General description
Quad channel Low-Side-Switch (2x5A/2x3A) in Smart Power Technology (SPT) with four separate in-
puts and four open drain DMOS output stages. The TLE 6228 GP is fully protected by embedded pro-
tection functions and designed for automotive and industrial applications. Each channel has its own
status signal for diagnostic feedback. Therefore the TLE 6228 GP is particularly suitable for ABS or
Powertrain Systems.
Block Diagram
STBY
GND
VS
ENA
normal function
V
BB
IN1
IN2
IN3
IN4
ST1
as Ch. 1
as Ch. 1
as Ch. 1
SCB / overload
LOGIC
overtemperature
open load/sh. to gnd
Output Stage
OUT1
1
as ST 1
as ST 1
as ST 1
4
4
ST2
ST3
ST4
Gate Control
OUT4
GND
V3.1Page
1
26. Aug. 2002
Datasheet TLE 6228 GP
Detailed Block Diagram
VS
STBY
internal supply
Overtemperature
Channel 4
ENA
Overtemperature
Channel 1
Open Load
IN1
ST1
LOGIC
Overload
OUT1
Open Load
IPD
IN4
LOGIC
Overload
OUT
ST4
Overtemperature
Channel 3
Overtemperature
Channel 2
Open Load
IPD
IN2
ST2
LOGIC
Overload
OUT
Open Load
IPD
IN3
LOGIC
Overload
OUT
ST3
IPD
GND
V3.1Page
2
26. Aug. 2002
Datasheet TLE 6228 GP
Pin Description Pin Configuration (Top view)
PinSymbolFunction
1GNDGround
2OUT1Power Output channel 1
3ST1Status Output channel 1
4IN4Control Input channel 4
5VSSupply Voltage
6STBYStandby
7IN3Control Input channel 3
8ST2Status Output channel 2
9OUT2Power Output channel 2
10GNDGround
11GNDGround
12OUT3Power Output channel 3
13ST3Status Output channel 3
14IN2Control Input channel 2
15GNDGround Logic
16ENAEnable Input for all four channels
17IN1Control Input channel 1
18ST4Status Output channel 4
19OUT4Power Output channel 4
20GNDGround
Heat slug internally connected to ground pins
V3.1Page
3
GND1
•
20GND
OUT1219OUT4
ST1318ST4
IN4417IN1
VS516ENA
STBY615GNDL
IN3714IN2
ST2813ST3
OUT2912OUT3
GND1011GND
P - DSO - 20 - 12
26. Aug. 2002
Datasheet TLE 6228 GP
Maximum Ratings for T
j
= – 40°C to 150°C
The maximum ratings may not be exceeded under any circumstances, not even momentarily and
individually, as permanent damage to the IC will result.
Parameter
Supply voltage
Continuous drain source voltage (OUT4)
Input voltage IN1 to IN4, ENA
Input voltage STBY
Status output voltage
Load Dump Protection V
Load Dump
= U
P
+U
S
; U
P
=13.5 V
R
I
1
)
=2 Ω; t
d
=400ms; IN = low or high
With R
L
= 5 Ω for Ch. 1,2; 10 Ω for Ch. 3,4
(I
D
= 2,7A respectively 1,35A)
Operating temperature range
Storage temperature range
Output current per channel (see page 6)
Status output current
Inductive load switch off energy (single pulse) T
j
= 25°C
Electrostatic Discharge Voltage (human body model)
according to MIL STD 883D, method 3015.7 and EOS/ESD
assn. standard S5.1 - 1993
DIN Humidity Category, DIN 40 040
IEC Climatic Category, DIN IEC 68-1
Thermal resistance
junction – case (die soldered on the frame)
junction - ambient @ min. footprint
junction - ambient @ 6 cm
2
cooling area
R
thJC
R
thJA
Symbol
V
S
V
DS
V
IN
, V
ENA
V
STBY
V
ST
V
Load Dump
2
)
Values
-0.3 ... + 40
45
- 0.3 ... + 6
- 0.3 ... + 40
- 0.3 ... + 32
55
V
V
Unit
V
V
V
T
j
T
stg
I
D(lim)
I
ST
E
AS
V
ESD
- 40 ... + 150
- 55 ... + 150
I
D(lim) min
- 5 ... + 5
50
2000
°C
A
mA
mJ
V
E
40/150/56
K/W
2
50
38
Minimum footprint
PCB with heat pipes,
2
backside 6 cm cooling area
1
)
2
)
R
I
=internal resistance of the load dump test pulse generator LD200
V
LoadDump
is setup without DUT connected to the generator per ISO 7637-1 and DIN 40 839.
Page
4
26. Aug. 2002V3.1
Datasheet TLE 6228 GP
Electrical Characteristics
Parameter and Conditions
V
S
= 4.8 to 18 V ; T
j
= - 40 °C to + 150 °C
(unless otherwise specified)
1. Power Supply (V
S
)
Supply current (Outputs ON)
Supply current (Outputs OFF)
V
ENA
= L, V
STBY
= H
Standby current
Operating voltage
2. Power Outputs
ON state resistance Channel 1,2
I
D
= 1A; V
S
≥ 9.5 V
ON state resistance Channel 3,4
I
D
= 1A; V
S
≥ 9.5 V
Z-Diode clamping voltage (4)
Pull down current
Output leakage current
3
T
j
= 25 ° C
T
j
= 150°C
T
j
= 25 ° C
T
j
= 150°C
I
D
≥ 100 mA
V
STBY
= H, V
IN
= L
V
STBY
= L, 0V ≤ V
DS
≤ 20V
I
D
= 1 A
I
D
= 1 A
I
D
= 1 A
I
D
= 1 A
R
DS(ON)
R
DS(ON)
V
DS(AZ)
I
PD
I
Dlk
t
on
t
off
t
fall
t
rise
t
DSO
t
D
t
D-failure
t
D-IN
t
fOL(off)
3
3
3
3
20
500
500
500
10
15
20
10
5
60
1200
1200
1200
30
45
1020
0.23
0.28
0.26
0.5
0.4
0.75
60
50
5
50
60
30
30
100
3000
3000
3000
100
Ω
Ω
V
µA
µA
µs
V
STBY
= L
I
S
I
S
I
S
V
S
4.8
8
4
10
32
mA
mA
µA
V
SymbolValues
min
Unit
typmax
Output turn on time
4
Output turn off time
4
Output on fall time
4
Output off rise time
4
Overload switch-off delay time
4
Output off status delay time
4
Failure extension Time for Status Report
Input Suppression Time
Open Load (off) filtering Time
5
3. Digital Inputs (IN1, IN2, IN3, IN4, ENA)
Input low voltage
Input high voltage
Input voltage hysteresis
5
V
INL
V
INH
V
INHys
I
IN
I
ENA
- 0.3
2.0
50
10
10
200
30
20
1.0
6.0
60
40
V
V
mV
µA
µA
Input pull down current V
IN
= 5 V; V
S
≥ 6.5 V
Enable pull down current V
ENA
= 5 V; V
S
≥ 6.5 V
4. Digital Status Outputs (ST1 - ST4) Open Drain
Output voltage low
Leakage current high
I
ST
= 2 mAV
STL
I
STH
0.5
2
V
µA
3
4
If the output voltage exceeds 35V, this current (zener current of a internal structure) can rise up to 1mA
See timing diagram, resistive load condition; V
S
≥ 9 V
5
This parameter will not be testet but assured by design
V3.1Page
5
26. Aug. 2002
Datasheet TLE 6228 GP
Electrical Characteristics
Parameter and Conditions
V
S
= 4.8 to 18 V ; T
j
= – 40 °C to + 150 °C
(unless otherwise specified)
5. Standby Input (STBY)
Input low voltage
Input high voltage
Input current
6. Diagnostic Functions
Open load detection voltage
V
ENA
= X, V
IN
= L
Open load detection current channel 1,2
V
ENA
= V
IN
= H
Open load detection current channel 3,4
V
ENA
= V
IN
= H
Overload detection current channel 1,2
Overload detection current channel 3,4
Overtemperature shutdown threshold
5
Hysteresis
Pulse Width for static diagnostic output
V
S
≥ 6.5 V
V
S
≥ 6.5 V
V
S
≥ 6.5 V
V
S
≥ 6.5 V
V
S
≥ 6.5 V
V
DS(OL)
I
D(OL) 1,2
I
D(OL) 3,4
I
D(lim) 1,2
I
D(lim) 3,4
T
th
T
hys
t
IN
0.3*
V
S
0.33*
V
S
0.36*
V
S
100
100
5
3
170
10
500
160
160
7.5
5.5
200
250
250
V
mA
mA
A
A
°C
K
µs
V
STBY
= 18 V
V
STBY
V
STBY
I
STBY
0
3.5
1
V
S
300
V
V
µA
SymbolValues
min
Unit
typmax
5
This parameter will not be tested but assured by design
Page
6
26. Aug. 2002V3.1
Datasheet TLE 6228 GP
Application Description
This IC is especially designed to drive inductive loads (relays, electromagnetic valves).
Integrated clamp-diodes limit the output voltage when inductive loads are discharged.
Four open-drain logic outputs indicate the status of the integrated ciruit. The following conditions are
monitored and signalled:
- overloading of output (also shorted load to supply) in active mode
- open and shorted load to ground in active and inactive mode
- overtemperature
Circuit Description
Input Circuits
The control and enable inputs, both active high, consist of schmitt triggers with hysteresis. All inputs
are provided with pull-down current sources. Not connected inputs are interpreted as low and the re-
spective output stages are switched off.
In standby mode (STBY = LOW ) the current consumption is greatly reduced.
The circuit is active when STBY = HIGH.
If the standby function is not used, it is allowed to connect the standby pin directly to VS.
Status Signals: The status signals are undefined for 2ms after a power up event or a STBY low to high
transition.
Output Stages
The four power outputs consist of DMOS-power transistors with open drains. The output stages are
short circuit protected throughout the operating range. Each output has it's own zenerclamp. This
causes a voltage limitation at the power transistor when inductive loads are switched off.
Parallel to the DMOS transistors there are internal pull down current sources. They are provided to
detect an open load condition in the off state. They will be disconnected in the standby mode.
Due to EMI measures there is an internal zenerclamp in parallel to the output stage. It gets active
above 33V drain source voltage. This leads to an increasing leakage current up to 1 mA @ V
DS
= 40V.
Protective Circuits
The outputs are protected against current overload and overtemperature. If the output current in-
creases above the overload detection threshold I
QO
for a longer time then t
DSO
or the temperature in-
creases above T
th
, then the power transistor is immediately switched off. It remains off until the control
signal at the input is switched off and on again.
Fault Detection
The status outputs indicate the switching state of the output stage. Under normal conditions is: ST =
low Output off; ST = high Output on. If an error occurs, the logic level of the status output is in-
verted, as listed in the diagnostic table.
6)
6)
The integrated protection functions prevent an IC destruction under fault conditions and may not be used in
normal operation or permanently.
Page
7
26. Aug. 2002V3.1
Datasheet TLE 6228 GP
If current overload or overtemperature occurs for a longer time than t
DSO
, the fault condition is latched
into an internal register and the output is shutdown. The reset is done by switching off the correspond-
ing control input for a time longer than t
D-IN
.
Open load is detected for all four channels in on and off mode.
In the on mode the load current is monitored. If it drops below the specified threshold value IQU then
an open load condition is detected.
In the off mode, the output voltage is monitored. An open load condition is detected when the output
voltage of a given channel is below the threshold V
DS(OL)
, which is typ. 33 % of the supply voltage VS.
To prevent an open load diagnosis in case of transient Voltages on the outputs the open load detection
in off mode uses a filter of typ. 50µs.
Status output at pulse width operation
If the input is operated with a pulsed signal, the status does not follow each single pulse of the input
signal. An internal delay t
D
of typ. 1.2ms ( min 500 µs) enables a continuous status output signal. See
the timing diagrams on the following pages for further information.
This internal status delay simplifies diagnostic software for pwm applications.
Diagnostic Table
In general the status follows the input signal in normal operating conditions.
If any error is detected the status is inverted.
Operating Condition
Standby
Normal function
Standby
Input
STBY
L
H
H
H
H
H
H
H
H
H
H
H
H
H
Enable
Input
ENA
X
L
H
H
L
L
H
H
H
H
L
H
H
L
Control
Input
IN
X
X
L
H
L
H
L
H
H
H → L
X
H
H → L
X
Power
Output
Q
off
off
off
ON
off
off
off
ON
off
off
off
off
off
off
Status
Output
ST
H
L
L
H
H
H
H
L
L
L
L
L
L
L
Open load or short to ground
Overload or short to supply
1)
reset latch
2)
Overtemperature
1)
reset latch
2)
Note 1) : overload/short-to-supply/overtemperature - events shorter than min. time t
DSO
specified in
2.10 will not be latched and not reported at the status pin.
V3.1Page
8
26. Aug. 2002
Datasheet TLE 6228 GP
Note 2) : to reset latched status-output in case of overload/short-to-supply/overtemperature the control
input has to go low and stay low for longer than max. input suppression time t
D-IN
specified in 2.13 of
the characteristics
Failure Situations and Status Report
Logic Block Diagram
Overtemperature
1.....overtemperature
0.....normal cond.
Gate Driver
1... Output
0....Output
ENA
1....enabled
0... disabled
Input
1....On
0... Off
IN
Delay D
SET
t
D
t
DSO
Delay
60µs
S
R
Q
OUT
1,2ms typ.
CLR
Q
Delay
60µs
IN
OUT
t
D
60µs typ.
Overload
0.....overload
1.....normal cond.
t
D
t
D-IN
when
load
EN
IN
Delay D
OUT
Open load "off"
1.....open load
0.....normal cond.
HI
Filter
30µs
Filter
t
D-failure
EN
IN
Delay D
OUT
Status
0....High
1....Low
Open load "on"
0.....open load
1.... normal cond.
EN
IN
t
D-failure
Delay D
OUT
V3.1Page
9
26. Aug. 2002
Datasheet TLE 6228 GP
Timing Diagrams
Output Slope
V
IN
V
INH
V
INL
t
V
DS
V
S
85%
t
on
t
off
15%
t
t
f
t
r
V
ST
t
D
t
Fig. 1
Overload Switch OFF Delay
I
D
I
D(lim)
I
D(OL)
t
t
D
S
O
V
ST
t
D-failure
t
Fig. 2
V3.1Page
10
26. Aug. 2002
V3.1
Test Circuit
V
D
=
5
V
V
S
1
0
k
R
L
2
I
V
S
1
0
k
1
0
k
1
0
k
R
L
4
R
L
3
R
L
1
S
T
1
I
S
T
1
V
S
S
T
1
O
U
T
1
S
T
2
I
D
2
I
D
1
O
U
T
1
S
T
2
I
S
T
2
I
S
T
3
S
T
3
S
T
3
O
U
T
2
I
S
T
4
O
U
T
2
S
T
4
S
T
4
I
N
1
O
U
T
3
I
N
2
I
N
3
I
N
4
I
I
N
4
I
I
N
1
TLE 6228 GP
Page
I
I
N
2
I
N
1
I
N
2
I
N
3
I
I
N
3
T
L
E
6
2
2
7
I
D
4
I
D
3
O
U
T
3
11
O
U
T
4
O
U
T
4
I
N
4
E
N
A
S
T
B
Y
V
D
S
(
O
U
T
4
)
V
D
S
(
O
U
T
3
)
V
D
S
(
O
U
T
2
)
V
D
S
(
O
U
T
1
)
E
N
A
V
I
N
2
V
I
N
3
V
E
N
A
I
S
T
B
Y
V
S
T
B
Y
V
I
N
4
I
E
N
A
V
S
T
1
V
S
T
2
V
S
T
3
V
S
T
4
V
I
N
1
Datasheet TLE 6228 GP
26. Aug. 2002
G
N
D
Datasheet TLE 6228 GP
Application Circuit
+
1
2
V
L
1
L
2
L
3
L
4
S
T
B
Y
V
S
S
T
1
O
U
T
1
S
T
2
S
T
3
S
T
4
T
L
E
O
U
T
2
I
N
1
6
2
2
8
O
U
T
3
I
N
2
O
U
T
4
I
N
3
I
N
4
C
o
n
t
r
o
l
I
n
p
u
t
s
1
0
k
1
0
k
1
0
k
1
0
k
V
D
=
5
V
C
S
t
a
t
u
s
O
u
t
p
u
t
The blocking capacitor C is recommended to avoid critical negative voltage spikes on VS in case of
battery interruption during OFF-commutation.
V3.1Page
12
26. Aug. 2002
E
n
a
b
l
e
I
n
p
u
t
E
N
A
G
N
D
Datasheet TLE 6228 GP
Timing Diagrams of Diagnostic with Pulsed Input Signal
Normal condition, resistive load, pulsed input signal
V
IN
t
IN
I
D
V
ST
t
D
t
D
Fig. 3
Current Overload
F
t
INoff
V
IN
I
D(lim)
current overload condition
I
D
V
ST
t
DSO
t
D-IN
t
DSO
t
INoff
< t
D-IN
: Input suppression time avoids a restart after overtemperature
Fig. 4
V3.1Page
13
26. Aug. 2002
Datasheet TLE 6228 GP
Diagnostic status output at different open load current conditions
V
IN
I
D(OL)
t
D-failure
V
ST
I
D
t
D
Fig. 5
V
IN
t
INoff
I
D
t
D-failure
V
ST
t
INOFF
< t
D
leads to a static status signal
t
D
I
D(OL)
Fig. 6
V
IN
t
INoff
I
D(OL)
I
D
t
D-failure
t
D-failure
t
D
t
D-failure
V
ST
t
INoff
> t
D
: Intermittend status signal Fig. 7
V3.1Page
14
26. Aug. 2002
Datasheet TLE 6228 GP
Normal operation, followed by open load condition
~ 55V
Open load voltage condition
V
DS
12V
33%
V
IN
I
D(OL)
t
fOL(off)-
I
D
t
D-failure
V
ST
t
D
t
D-failure
Fig. 8
Overtemperature
Overtemperature
V
IN
t
INoff
> t
D-IN
I
D(OL)
I
D
t
D-failure
t
D-failure
Reset of overload
Flip Flop
V
ST
t
DSO
Fig. 9
V3.1Page
15
26. Aug. 2002
Datasheet TLE 6228 GP
Typical electrical Characteristics
Drain-Source on-resistance
R
DS(ON)
= f (T
j
) ; V
s
= 9,5V
Typical Drain- Source ON-Resistance
0,45
Channel 1, 2
Channel 3, 4
0,4
R
D
S
(
O
N
)
[
O
h
m
]
0,35
0,3
0,25
0,2
0,15
-50-2502550
Tj[°C]
751
Figure 6 :
Typical ON Resistance versus Junction-Temperature
Channel 1-4
Output Clamping Voltage
V
DS(AZ)
= f (T
j
) ; I
D
= 100mA
Typical Clamping Voltage
55
54
53
Channel 1-4
V
D
S
(
A
Z
)
[
V
]
52
51
50
49
48
-50-2502550
Tj[°C]
751
Figure 7 :
Typical Clamp Voltage versus Junction-Temperature
Channel 1-4
V3.1Page
16
26. Aug. 2002
Datasheet TLE 6228 GP
Package and ordering code
all dimensions in mm
P - DSO - 20 - 12
TLE 6228 GP
Ordering code
Q67006-A9364
V3.1
15.74
+/- 0.1
13.7
-0.2
9 x =1.2711.43
1.27
0.4
+0.13
0.25
M
A
2011
1
.
0
1
.
-
/
0
+
-
/
2
+
.
3
9
.
5
110
1 x 45°
PIN 1 INDEX MARKING
+/-0.15
A
15.9
1.2
-0.3
0.1
3
.
1
8°
2.8
8°8°
6.3
8°
11
+/-0.15
1)
14.2
+/-0.3
Page
17
26. Aug. 2002
Datasheet TLE 6228 GP
Published by
Infineon Technologies AG,
Bereichs Kommunikation
St.-Martin-Strasse 76,
D-81541 München
© Infineon Technologies AG 1999
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as warranted characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits,
descriptions and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Tech-
nologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of
Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support
device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are in-
tended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it
is reasonable to assume that the health of the user or other persons may be endangered.
V3.1Page
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26. Aug. 2002