2024年3月18日发(作者：少华美)
元器件交易网
DS90CR287/DS90CR288A
+3.3V
Rising
Edge
Data
Strobe
LVDS
28-Bit
Channel
Link-85
MHZ
October1999
DS90CR287/DS90CR288A
+3.3VRisingEdgeDataStrobeLVDS28-BitChannel
Link-85MHZ
GeneralDescription
TheDS90CR287transmitterconverts28bitsofCMOS/TTL
dataintofourLVDS(LowVoltageDifferentialSignaling)data
-lockedtransmitclockistransmittedinpar-
ycle
ofthetransmitclock28bitsofinputdataaresampledand
90CR288Areceiverconvertsthefour
LVDSdatastreamsbackinto28bitsofCMOS/
atransmitclockfrequencyof85MHZ,28bitsofTTLdataare
transmittedatarateof595MbpsperLVDSdatachannel.
Usinga85MHZclock,thedatathroughputis2.38Gbit/s
(297.5Mbytes/sec).
ThischipsetisanidealmeanstosolveEMIandcablesize
problemsassociatedwithwide,highspeedTTLinterfaces.
Features
n
n
n
n
n
n
n
n
n
n
n
n
n
20to85MHZshiftclocksupport
50%dutycycleonreceiveroutputclock
Best–in–ClassSet&HoldTimesonTxINPUTs
Lowpowerconsumption
±
1Vcommonmoderange(around+1.2V)
Narrowbusreducescablesizeandcost
Upto2.38Gbpsthroughput
Upto297.5Megabytes/secbandwidth
345mV(typ)swingLVDSdevicesforlowEMI
PLLrequiresnoexternalcomponents
Risingedgedatastrobe
CompatiblewithTIA/EIA-644LVDSstandard
Lowprofile56-leadTSSOPpackage
BlockDiagrams
DS90CR287
DS90CR288A
DS101087-1
DS101087-27
OrderNumberDS90CR287MTD
SeeNSPackageNumberMTD56
OrderNumberDS90CR288AMTD
SeeNSPackageNumberMTD56
TRI-STATE
®
isaregisteredtrademarkofNationalSemiconductorCorporation.
©
元器件交易网
D
S
9
0
C
R
2
8
7
/
D
S
9
0
C
R
2
8
8
A
PinDiagrams
DS90CR287DS90CR288A
DS101087-21DS101087-22
TypicalApplication
DS101087-23
2
2024年3月18日发(作者：少华美)
元器件交易网
DS90CR287/DS90CR288A
+3.3V
Rising
Edge
Data
Strobe
LVDS
28-Bit
Channel
Link-85
MHZ
October1999
DS90CR287/DS90CR288A
+3.3VRisingEdgeDataStrobeLVDS28-BitChannel
Link-85MHZ
GeneralDescription
TheDS90CR287transmitterconverts28bitsofCMOS/TTL
dataintofourLVDS(LowVoltageDifferentialSignaling)data
-lockedtransmitclockistransmittedinpar-
ycle
ofthetransmitclock28bitsofinputdataaresampledand
90CR288Areceiverconvertsthefour
LVDSdatastreamsbackinto28bitsofCMOS/
atransmitclockfrequencyof85MHZ,28bitsofTTLdataare
transmittedatarateof595MbpsperLVDSdatachannel.
Usinga85MHZclock,thedatathroughputis2.38Gbit/s
(297.5Mbytes/sec).
ThischipsetisanidealmeanstosolveEMIandcablesize
problemsassociatedwithwide,highspeedTTLinterfaces.
Features
n
n
n
n
n
n
n
n
n
n
n
n
n
20to85MHZshiftclocksupport
50%dutycycleonreceiveroutputclock
Best–in–ClassSet&HoldTimesonTxINPUTs
Lowpowerconsumption
±
1Vcommonmoderange(around+1.2V)
Narrowbusreducescablesizeandcost
Upto2.38Gbpsthroughput
Upto297.5Megabytes/secbandwidth
345mV(typ)swingLVDSdevicesforlowEMI
PLLrequiresnoexternalcomponents
Risingedgedatastrobe
CompatiblewithTIA/EIA-644LVDSstandard
Lowprofile56-leadTSSOPpackage
BlockDiagrams
DS90CR287
DS90CR288A
DS101087-1
DS101087-27
OrderNumberDS90CR287MTD
SeeNSPackageNumberMTD56
OrderNumberDS90CR288AMTD
SeeNSPackageNumberMTD56
TRI-STATE
®
isaregisteredtrademarkofNationalSemiconductorCorporation.
©
元器件交易网
D
S
9
0
C
R
2
8
7
/
D
S
9
0
C
R
2
8
8
A
PinDiagrams
DS90CR287DS90CR288A
DS101087-21DS101087-22
TypicalApplication
DS101087-23
2