2024年10月3日发(作者：顾怡乐)
元器件交易网
Small Outline, 5 Lead, High
CMR, High Speed, Logic Gate
Optocouplers
Technical Data
HCPL-M600
HCPL-M601
HCPL-M611
Features
Description
• Surface Mountable
These small outline high CMR,
• Very Small, Low Profile
high speed, logic gate optocoup-
JEDEC Registered Package
lers are single channel devices in
Outline
a five lead miniature footprint.
• Compatible with Infrared
They are electrically equivalent to
Vapor Phase Reflow and
the following Agilent
Wave Soldering Processes
optocouplers (except there is no
• Internal Shield for High
output enable feature):
Common Mode Rejection
(CMR)
SO-5 PackageStandard DIPSO-8 Package
HCPL-M601: 10,000 V/µs atHCPL-M6006N137HCPL-0600
V
CM
= 50 V
HCPL-M611: 15,000 V/µs at
HCPL-M601HCPL-2601HCPL-0601
V
CM
= 1000 V
HCPL-M611HCPL-2611HCPL-0611
• High Speed: 10 Mbd
• LSTTL/TTL Compatible
The SO-5 JEDEC registered (MO-
Schottky-clamped transistor. The
• Low Input Current
155) package outline does not
internal shield provides a
Capability: 5 mA
require “through holes” in a PCB.
guaranteed common mode
• Guaranteed ac and dc
This package occupies
transient immunity specification of
Performance over
approximately one fourth the
5,000 V/µs for the HCPL-M601,
Temperature: -40
°
C to 85
°
C
footprint area of the standard
and 10,000 V/µs for the HCPL-
dual-in-line package. The lead
M611.
• Recognized under the
profile is designed to be com-
Component Program of U.L.
patible with standard surface
This unique design provides
(File No. E55361) for
mount processes.
maximum ac and dc circuit
Dielectric Withstand Proof
isolation while achieving TTL
Test Voltage of 2500 Vac, 1
The HCPL-M600/01/11 optically
compatibility. The optocoupler ac
Minute
coupled gates combine a GaAsP
and dc operational parameters are
light emitting diode and an
guaranteed from -40°C to 85°C
integrated high gain photon
allowing trouble free system
detector. The output of the
performance.
detector I.C. is an Open-collector
CAUTION: The small device geometries inherent to the design of this bipolar component increase the component's
susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken
in handling and assembly of this component to prevent damage and/or degradation which may be induced by
ESD.
元器件交易网
2
The HCPL-M600/01/11 are
suitable for high speed logic
interfacing, input/output
buffering, as line receivers in
environments that conventional
line receivers cannot tolerate, and
are recommended for use in
extremely high ground or induced
noise environments.
Applications
• Isolated Line Receiver
• Simplex/Multiplex Data
Transmission
• Computer-Peripheral
Interface
• Microprocessor System
Interface
• Digital Isolation for A/D, D/A
Conversion
• Switching Power Supply
• Instrument Input/Output
Isolation
• Ground Loop Elimination
• Pulse Transformer
Replacement
Outline Drawing (JEDEC MO-155)
ANODE
1
4.4 ± 0.1
2024年10月3日发(作者：顾怡乐)
元器件交易网
Small Outline, 5 Lead, High
CMR, High Speed, Logic Gate
Optocouplers
Technical Data
HCPL-M600
HCPL-M601
HCPL-M611
Features
Description
• Surface Mountable
These small outline high CMR,
• Very Small, Low Profile
high speed, logic gate optocoup-
JEDEC Registered Package
lers are single channel devices in
Outline
a five lead miniature footprint.
• Compatible with Infrared
They are electrically equivalent to
Vapor Phase Reflow and
the following Agilent
Wave Soldering Processes
optocouplers (except there is no
• Internal Shield for High
output enable feature):
Common Mode Rejection
(CMR)
SO-5 PackageStandard DIPSO-8 Package
HCPL-M601: 10,000 V/µs atHCPL-M6006N137HCPL-0600
V
CM
= 50 V
HCPL-M611: 15,000 V/µs at
HCPL-M601HCPL-2601HCPL-0601
V
CM
= 1000 V
HCPL-M611HCPL-2611HCPL-0611
• High Speed: 10 Mbd
• LSTTL/TTL Compatible
The SO-5 JEDEC registered (MO-
Schottky-clamped transistor. The
• Low Input Current
155) package outline does not
internal shield provides a
Capability: 5 mA
require “through holes” in a PCB.
guaranteed common mode
• Guaranteed ac and dc
This package occupies
transient immunity specification of
Performance over
approximately one fourth the
5,000 V/µs for the HCPL-M601,
Temperature: -40
°
C to 85
°
C
footprint area of the standard
and 10,000 V/µs for the HCPL-
dual-in-line package. The lead
M611.
• Recognized under the
profile is designed to be com-
Component Program of U.L.
patible with standard surface
This unique design provides
(File No. E55361) for
mount processes.
maximum ac and dc circuit
Dielectric Withstand Proof
isolation while achieving TTL
Test Voltage of 2500 Vac, 1
The HCPL-M600/01/11 optically
compatibility. The optocoupler ac
Minute
coupled gates combine a GaAsP
and dc operational parameters are
light emitting diode and an
guaranteed from -40°C to 85°C
integrated high gain photon
allowing trouble free system
detector. The output of the
performance.
detector I.C. is an Open-collector
CAUTION: The small device geometries inherent to the design of this bipolar component increase the component's
susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken
in handling and assembly of this component to prevent damage and/or degradation which may be induced by
ESD.
元器件交易网
2
The HCPL-M600/01/11 are
suitable for high speed logic
interfacing, input/output
buffering, as line receivers in
environments that conventional
line receivers cannot tolerate, and
are recommended for use in
extremely high ground or induced
noise environments.
Applications
• Isolated Line Receiver
• Simplex/Multiplex Data
Transmission
• Computer-Peripheral
Interface
• Microprocessor System
Interface
• Digital Isolation for A/D, D/A
Conversion
• Switching Power Supply
• Instrument Input/Output
Isolation
• Ground Loop Elimination
• Pulse Transformer
Replacement
Outline Drawing (JEDEC MO-155)
ANODE
1
4.4 ± 0.1