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MEMORY存储芯片STM8S003F3P6中文规格书

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2024年5月21日发(作者:柏小蕊)

Value line, 16-MHz STM8S 8-bit MCU, 8-Kbyte Flash memory,

128-byte data EEPROM, 10-bit ADC, 3 timers, UART, SPI, I²C

Datasheet

-

production data

Features

Core

•16 MHz advanced STM8 core with Harvard

architecture and 3-stage pipeline

•Extended instruction set

LQFP32

7x7 mm

TSSOP20

6.5x6.4 mm

UFQFPN20

3x3 mm

Memories

•Program memory: 8 Kbyte Flash memory; data

retention 20 years at 55 °C after 100 cycles

•RAM: 1 Kbyte

•Data memory: 128 bytes true data EEPROM;

endurance up to 100 k write/erase cycles

Timers

•Advanced control timer: 16-bit, 4 CAPCOM

channels, 3 complementary outputs, dead-time

insertion and flexible synchronization

•16-bit general purpose timer, with 3 CAPCOM

channels (IC, OC or PWM)

•8-bit basic timer with 8-bit prescaler

•Auto wakeup timer

•Window and independent watchdog timers

Clock, reset and supply management

•2.95 V to 5.5 V operating voltage

•Flexible clock control, 4 master clock sources

–Low-power crystal resonator oscillator

–External clock input

–Internal, user-trimmable 16 MHz RC

–Internal low-power 128 kHz RC

•Clock security system with clock monitor

•Power management

–Low-power modes (wait, active-halt, halt)

–Switch-off peripheral clocks individually

–Permanently active, low-consumption

power-on and power-down reset

Communications interfaces

•UART with clock output for synchronous

operation, SmartCard, IrDA, LIN master mode

•SPI interface up to 8 Mbit/s

•I

2

C interface up to 400 Kbit/s

Analog to digital converter (ADC)

•10-bit ADC, ± 1 LSB ADC with up to 5

multiplexed channels, scan mode and analog

watchdog

Interrupt management

•Nested interrupt controller with 32 interrupts

•Up to 27 external interrupts on 6 vectors

I/Os

•Up to 28 I/Os on a 32-pin package including 21

high-sink outputs

•Highly robust I/O design, immune against

current injection

Development support

•Embedded single-wire interface module

(SWIM) for fast on-chip programming and non-

intrusive debugging

August 2018

This is information on a product in full production.

DS7147 Rev 10

DescriptionSTM8S003F3 STM8S003K3

2 Description

The STM8S003F3/K3 value line 8-bit microcontrollers offer 8 Kbytes of Flash program

memory, plus integrated true data EEPROM. They are referred to as low-density devices in

the STM8S microcontroller family reference manual (RM0016).

The STM8S003F3/K3 value line devices provide the following benefits: performance,

robustness and reduced system cost.

Device performance and robustness are ensured by true data EEPROM supporting up to

100000 write/erase cycles, advanced core and peripherals made in a state-of-the-art

technology at 16 MHz clock frequency, robust I/Os, independent watchdogs with separate

clock source, and a clock security system.

The system cost is reduced thanks to a high system integration level with internal clock

oscillators, watchdog, and brown-out reset.

Full documentation is offered as well as a wide choice of development tools.

Table 1. STM8S003F3/K3 value line features

Features

Pin count

Max. number of GPIOs (I/O)

External interrupt pins

Timer CAPCOM channels

Timer complementary outputs

A/D converter channels

High-sink I/Os

Low-density Flash program

memory (byte)

RAM (byte)

True data EEPROM (byte)

Peripheral set

t read-while-write capability.

STM8S003K3

32

28

27

7

3

4

21

8 K

1 K

128

(1)

STM8S003F3

20

16

16

7

2

5

12

8 K

1 K

128

(1)

Multi purpose timer (TIM1), SPI, I2C, UART, Window WDG,

independent WDG, ADC, PWM timer (TIM2), 8-bit timer (TIM4)

DS7147 Rev 10

STM8S003F3 STM8S003K3Block diagram

3 Block diagram

Figure 1. STM8S003F3/K3 value line block diagram

Reset block

Clock controller

Reset

Reset

XTAL 1-16 MHz

RC int. 16 MHz

Detector

BOR

RC int. 128 kHz

POR

Clock to peripherals and core

Window WDG

STM8 core

Independent WDG

Single wire

debug interface

Debug/SWIM

8 Kbyte

program Flash

128 byte

data EEPROM

400Kbit/s

I2C

A

d

d

r

e

s

s

a

n

d

d

a

t

a

b

u

s

1 Kbyte RAM

Up to

4 CAPCOM

channels

+ 3 complementary

outputs

Up to

3 CAPCOM

channels

8Mbit/s

SPI

16-bit advanced control

timer (TIM1)

LIN master

SPI emul.

UART1

16-bit general purpose

timer (TIM2)

ADC1

8-bit basic timer

(TIM4)

Beeper

AWU timer

up to 5

channels

1/2/4 kHz beep

DS7147 Rev 10

STM8S003F3 STM8S003K3Product overview

DS7147 Rev 10

Product overviewSTM8S003F3 STM8S003K3

4.12 TIM4 - 8-bit basic timer

8-bit autoreload, adjustable prescaler ratio to any power of 2 from 1 to 128

Clock source: CPU clock

Interrupt source: 1 x overflow/update

Table 3. TIM timer features

Timer

Counter

size

(bits)

16

16

8

Prescaler

Counting

CAPCOM

Complem. Ext.

mode

trigger

channels

outputs

Up/down

Up

Up

4

3

0

3

0

0

Yes

No

No

Timer

synchr-

onization/

chaining

TIM1

TIM2

TIM4

Any integer from 1 to 65536

Any power of 2 from 1 to 32768

Any power of 2 from 1 to 128

No

4.13 Analog-to-digital converter (ADC1)

STM8S003F3/K3 value line products contain a 10-bit successive approximation A/D

converter (ADC1) with up to 5 external multiplexed input channels and the following main

features:

Input voltage range: 0 to V

DDA

Conversion time: 14 clock cycles

Single and continuous, buffered continuous conversion modes

Buffer size (10 x 10 bits)

Scan mode for single and continuous conversion of a sequence of channels

Analog watchdog capability with programmable upper and lower thresholds

Analog watchdog interrupt

External trigger input

Trigger from TIM1 TRGO

End of conversion (EOC) interrupt

Note:Additional AIN12 analog input is not selectable in ADC scan mode or with analog watchdog.

Values converted from AIN12 are stored only into the ADC_DRH/ADC_DRL registers.

4.14 Communication interfaces

The following communication interfaces are implemented:

UART1: full feature UART, synchronous mode, SPI master mode, SmartCard mode,

IrDA mode, LIN2.1 master capability

SPI: full and half-duplex, 8 Mbit/s

I²C: up to 400 Kbit/s

DS7147 Rev 10

2024年5月21日发(作者:柏小蕊)

Value line, 16-MHz STM8S 8-bit MCU, 8-Kbyte Flash memory,

128-byte data EEPROM, 10-bit ADC, 3 timers, UART, SPI, I²C

Datasheet

-

production data

Features

Core

•16 MHz advanced STM8 core with Harvard

architecture and 3-stage pipeline

•Extended instruction set

LQFP32

7x7 mm

TSSOP20

6.5x6.4 mm

UFQFPN20

3x3 mm

Memories

•Program memory: 8 Kbyte Flash memory; data

retention 20 years at 55 °C after 100 cycles

•RAM: 1 Kbyte

•Data memory: 128 bytes true data EEPROM;

endurance up to 100 k write/erase cycles

Timers

•Advanced control timer: 16-bit, 4 CAPCOM

channels, 3 complementary outputs, dead-time

insertion and flexible synchronization

•16-bit general purpose timer, with 3 CAPCOM

channels (IC, OC or PWM)

•8-bit basic timer with 8-bit prescaler

•Auto wakeup timer

•Window and independent watchdog timers

Clock, reset and supply management

•2.95 V to 5.5 V operating voltage

•Flexible clock control, 4 master clock sources

–Low-power crystal resonator oscillator

–External clock input

–Internal, user-trimmable 16 MHz RC

–Internal low-power 128 kHz RC

•Clock security system with clock monitor

•Power management

–Low-power modes (wait, active-halt, halt)

–Switch-off peripheral clocks individually

–Permanently active, low-consumption

power-on and power-down reset

Communications interfaces

•UART with clock output for synchronous

operation, SmartCard, IrDA, LIN master mode

•SPI interface up to 8 Mbit/s

•I

2

C interface up to 400 Kbit/s

Analog to digital converter (ADC)

•10-bit ADC, ± 1 LSB ADC with up to 5

multiplexed channels, scan mode and analog

watchdog

Interrupt management

•Nested interrupt controller with 32 interrupts

•Up to 27 external interrupts on 6 vectors

I/Os

•Up to 28 I/Os on a 32-pin package including 21

high-sink outputs

•Highly robust I/O design, immune against

current injection

Development support

•Embedded single-wire interface module

(SWIM) for fast on-chip programming and non-

intrusive debugging

August 2018

This is information on a product in full production.

DS7147 Rev 10

DescriptionSTM8S003F3 STM8S003K3

2 Description

The STM8S003F3/K3 value line 8-bit microcontrollers offer 8 Kbytes of Flash program

memory, plus integrated true data EEPROM. They are referred to as low-density devices in

the STM8S microcontroller family reference manual (RM0016).

The STM8S003F3/K3 value line devices provide the following benefits: performance,

robustness and reduced system cost.

Device performance and robustness are ensured by true data EEPROM supporting up to

100000 write/erase cycles, advanced core and peripherals made in a state-of-the-art

technology at 16 MHz clock frequency, robust I/Os, independent watchdogs with separate

clock source, and a clock security system.

The system cost is reduced thanks to a high system integration level with internal clock

oscillators, watchdog, and brown-out reset.

Full documentation is offered as well as a wide choice of development tools.

Table 1. STM8S003F3/K3 value line features

Features

Pin count

Max. number of GPIOs (I/O)

External interrupt pins

Timer CAPCOM channels

Timer complementary outputs

A/D converter channels

High-sink I/Os

Low-density Flash program

memory (byte)

RAM (byte)

True data EEPROM (byte)

Peripheral set

t read-while-write capability.

STM8S003K3

32

28

27

7

3

4

21

8 K

1 K

128

(1)

STM8S003F3

20

16

16

7

2

5

12

8 K

1 K

128

(1)

Multi purpose timer (TIM1), SPI, I2C, UART, Window WDG,

independent WDG, ADC, PWM timer (TIM2), 8-bit timer (TIM4)

DS7147 Rev 10

STM8S003F3 STM8S003K3Block diagram

3 Block diagram

Figure 1. STM8S003F3/K3 value line block diagram

Reset block

Clock controller

Reset

Reset

XTAL 1-16 MHz

RC int. 16 MHz

Detector

BOR

RC int. 128 kHz

POR

Clock to peripherals and core

Window WDG

STM8 core

Independent WDG

Single wire

debug interface

Debug/SWIM

8 Kbyte

program Flash

128 byte

data EEPROM

400Kbit/s

I2C

A

d

d

r

e

s

s

a

n

d

d

a

t

a

b

u

s

1 Kbyte RAM

Up to

4 CAPCOM

channels

+ 3 complementary

outputs

Up to

3 CAPCOM

channels

8Mbit/s

SPI

16-bit advanced control

timer (TIM1)

LIN master

SPI emul.

UART1

16-bit general purpose

timer (TIM2)

ADC1

8-bit basic timer

(TIM4)

Beeper

AWU timer

up to 5

channels

1/2/4 kHz beep

DS7147 Rev 10

STM8S003F3 STM8S003K3Product overview

DS7147 Rev 10

Product overviewSTM8S003F3 STM8S003K3

4.12 TIM4 - 8-bit basic timer

8-bit autoreload, adjustable prescaler ratio to any power of 2 from 1 to 128

Clock source: CPU clock

Interrupt source: 1 x overflow/update

Table 3. TIM timer features

Timer

Counter

size

(bits)

16

16

8

Prescaler

Counting

CAPCOM

Complem. Ext.

mode

trigger

channels

outputs

Up/down

Up

Up

4

3

0

3

0

0

Yes

No

No

Timer

synchr-

onization/

chaining

TIM1

TIM2

TIM4

Any integer from 1 to 65536

Any power of 2 from 1 to 32768

Any power of 2 from 1 to 128

No

4.13 Analog-to-digital converter (ADC1)

STM8S003F3/K3 value line products contain a 10-bit successive approximation A/D

converter (ADC1) with up to 5 external multiplexed input channels and the following main

features:

Input voltage range: 0 to V

DDA

Conversion time: 14 clock cycles

Single and continuous, buffered continuous conversion modes

Buffer size (10 x 10 bits)

Scan mode for single and continuous conversion of a sequence of channels

Analog watchdog capability with programmable upper and lower thresholds

Analog watchdog interrupt

External trigger input

Trigger from TIM1 TRGO

End of conversion (EOC) interrupt

Note:Additional AIN12 analog input is not selectable in ADC scan mode or with analog watchdog.

Values converted from AIN12 are stored only into the ADC_DRH/ADC_DRL registers.

4.14 Communication interfaces

The following communication interfaces are implemented:

UART1: full feature UART, synchronous mode, SPI master mode, SmartCard mode,

IrDA mode, LIN2.1 master capability

SPI: full and half-duplex, 8 Mbit/s

I²C: up to 400 Kbit/s

DS7147 Rev 10

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