2024年8月3日发(作者:粟芃)
元器件交易网
Preliminary
◆Manual Reset Input
◆Watchdog Functions
◆Built-in Delay Circuit
◆CMOS Voltage Detector
■APPLICATIONS
●Microprocessor reset circuits
●Memory battery backup circuits
●System power-on reset circuits
●Power failure detection
◆Detect Voltage Range: 1.6~5.0V, ± 2%
◆Reset Function is Selectable
V
DFL
(Low When Detected)
V
DFH
(High When Detected)
■GENERAL DESCRIPTION
■FEATURES
Detect Voltage Range : 1.6V ~ 5.0V, +2%
(100mV increments)
Hysteresis Range : V
DF
x 5%, TYP.
(XC6101~XC6107)
V
DF
x 0.1%, TYP.
(XC6111~XC6117)
Operating Voltage Range : 1.0V ~ 6.0V
Detect Voltage Temperature
Characteristics : +100ppm/
O
C (TYP.)
Output Configuration : N-channel open drain,
CMOS
Watchdog Pin : Watchdog input
If watchdog input maintains
‘H’ or ‘L’ within the watchdog
timeout period, a reset signal
is output to the RESET
output pin
Manual Reset Pin : When driven ‘H’ to ‘L’level
signal, the MRB pin voltage
asserts forced reset on the
output pin.
Release Delay Time : 1.6sec, 400msec, 200msec,
100msec, 50msec, 25msec,
3.13msec (TYP.) can be
selectable.
Watchdog Timeout Period : 1.6sec, 400msec, 200msec,
100msec, 50msec,
6.25msec (TYP.) can be
selectable.
The XC6101~XC6107, XC6111~XC6117 series are
groups of high-precision, low current consumption voltage
detectors with manual reset input function and watchdog
functions incorporating CMOS process technology. The
series consist of a reference voltage source, delay circuit,
comparator, and output driver.
With the built-in delay circuit, the XC6101 ~ XC6107,
XC6111 ~ XC6117 series’ ICs do not require any external
components to output signals with release delay time.
Moreover, with the manual reset function, reset can be
asserted at any time. The ICs produce two types of
output; V
DFL
(low when detected) and V
DFH
(high when
detected).
With the XC6101 ~ XC6105, XC6111 ~ XC6115 series’
ICs, the WD pin can be left open if the watchdog function
is not used.
Whenever the watchdog pin is opened, the internal
counter clears before the watchdog timeout occurs.
Since the manual reset pin is internally pulled up to the V
IN
pin voltage level, the ICs can be used with the manual
reset pin left unconnected if the pin is unused.
The detect voltages are internally fixed 1.6V ~ 5.0V in
increments of 100mV, using laser trimming technology.
Six watchdog timeout period settings are available in a
range from 6.25msec to 1.6sec.
Seven release delay time 1 are available in a range from
3.13msec to 1.6sec.
* Not necessary with CMOS output products.
■TYPICAL APPLICATION CIRCUIT
■TYPICAL PERFORMANCE
CHARACTERISTICS
●Supply Current vs. Input Voltage
XC61X1~XC61X5 (2.7V)
30
S
u
p
p
l
y
C
u
r
r
e
n
t
:
I
S
S
(
µ
A
)
25
20
15
10
5
0
012345
Input Voltage:
VIN (V)
6
Ta=-40
℃
Ta=25
℃
Ta=85
℃
* ‘x’ represents both ‘0’ and ‘1’. (ex. XC61x1⇒XC6101 and XC6111)
XC6101_07_XC6111_17 ETR0207_009
1/26
元器件交易网
XC6101~XC6107, XC6111~XC6117 Series
PIN CONFIGURATION ■
●SOT-25
XC6101, XC6102 Series
XC6111, XC6112 Series
V
IN
5
WD
4
XC6103 & XC6113 Series
V
IN
5
WD
4
XC6104, XC6105 Series
XC6114, XC6115 Series
V
IN
5
WD
4
XC6106, XC6107 Series
XC6116, XC6117 Series
V
IN
5
MRB
4
1
RESETB
2
V
SS
3
MRB
1
RESET
2
V
SS
3
MRB
1
RESETB
23
1
RESETB
23
V
SS
RESET
V
SS
RESET
SOT-25 (TOP VIEW)
SOT-25 (TOP VIEW)
SOT-25 (TOP VIEW)
SOT-25 (TOP VIEW)
●USP-6C
XC6101, XC6102 Series
XC6111, XC6112 Series
XC6103 & XC6113 Series
XC6104, XC6105 Series
XC6114, XC6115 Series
XC6106, XC6107 Series
XC6116, XC6117 Series
USP-6C (BOTTOM VIEW)
USP-6C (BOTTOM VIEW)USP-6C (BOTTOM VIEW)
USP-6C (BOTTOM VIEW)
* The dissipation pad for the USP-6C package should be
solder-plated in recommended mount pattern and metal
masking so as to enhance mounting strength and heat
release. If the pad needs to be connected to other pins, it
should be connected to the V
SS
pin.
■PIN ASSIGNMENT
PIN NUMBER
XC6101, XC6102 XC6103 XC6104, XC6105XC6106, XC6107
PIN NAME
XC6111, XC6112 XC6113 XC6114, XC6115XC6116, XC6117
SOT-25 USP-6C SOT-25 USP-6C SOT-25 USP-6CSOT-25USP-6C
R
ESETB
1 4 - - 1 4 1 4
2 5 2 5 2 5 2 5
V
SS
FUNCTION
Reset Output
(V
DFL
: Low Level When Detected)
Ground
3 2 3 2 - - 4 1 M
RB
Manual Reset
4 1 4 1 4 1 - - WD Watchdog
5 6 5 6 5 6 5 6 V
IN
Power Input
Reset Output
- - 1 4 3 2 3 2 RESET
(V
DFH:
High Level When Detected)
2/26
元器件交易网
XC6101 ~ XC6107, XC6111~ XC6117
Series
■PRODUCT CLASSIFICATION
●Selection Guide
SERIES WATCHDOG
MANUAL
RESET
Available
RESET OUTPUT
V
DFL
(RESETB)
CMOS
-
CMOS
CMOS
N-channel open drain
V
DFH
(RESET)
-
-
CMOS
CMOS
CMOS
CMOS
CMOS
XC6101 XC6111 Available Available
XC6102 XC6112 Available
XC6103 XC6113 Available
XC6105
XC6107
Available
Not Available
Available
XC6104 XC6114 Available Not Available
XC6115
XC6117
Available
Not Available
XC6106 XC6116 Not Available Available
N-channel open drain
N-channel open drain
●Ordering Information
XC61①②③④⑤⑥⑦⑧
DESIGNATOR DESCRIPTION SYMBOL DESCRIPTION
① Hysteresis Range
Functions and
Type of Reset Output
0 : V
DF
x 5% (TYP.) with hysteresis
1 : V
DF
x 0.1% (TYP.) without hysteresis
: Watchdog and manual functions, and reset
output type as per Selection Guide in the above
chart
A
B
C
: 3.13msec (TYP.)
: 25msec (TYP.)
: 50msec (TYP.)
: 100msec (TYP.)
: 200msec (TYP.)
: 400msec (TYP.)
: 1.6sec (TYP.)
: No WD timeout period for
XC6106, XC6107, XC6116, XC6117 Series
: 6.25msec (TYP.)
: 50msec (TYP.)
: 100msec (TYP.)
: 200msec (TYP.)
: 400msec (TYP.)
: 1.6sec (TYP.)
: Detect voltage
ex.) 4.5V: ⑤⇒4, ⑥⇒5
②
1 ~ 7
③ Release Delay Time *
D
E
F
H
0
1
④ Watchdog Timeout Period
2
3
4
5
6
⑤⑥ Detect Voltage 16 ~ 50
⑦ Package
⑧ Device Orientation
M : SOT-25
E : USP-6C
R
L
: Embossed tape, standard feed
: Embossed tape, reverse feed
* Please set the release delay time shorter than or equal to the watchdog timeout period.
ex.) XC6101D427MR or XC6101D327MR
3/26
元器件交易网
XC6101~XC6107, XC6111~XC6117 Series
■PACKAGING INFORMATION
●SOT-25
●USP-6C
4/26
元器件交易网
XC6101 ~ XC6107, XC6111~ XC6117
Series
■MARKING RULE
●SOT-25
① Represents product series
①②③④
SOT-25
(TOP VIEW)
MARK PRODUCT SERIES MARK PRODUCT SERIES
0 XC6101xxxxxx 7 XC6111xxxxxx
1 XC6102xxxxxx 8 XC6112xxxxxx
2 XC6103xxxxxx 9 XC6113xxxxxx
3 XC6104xxxxxx A XC6114xxxxxx
4 XC6105xxxxxx B XC6115xxxxxx
5 XC6106xxxxxx C XC6116xxxxxx
6 XC6107xxxxxx D XC6117xxxxxx
② Represents release delay time and watchdog timeout period
RELEASE RELEASE
WATCH DOG PRODUCT WATCH DOG
MARK
DELAY
MARK
DELAY
TIMEOUT PERIOD SERIES TIMEOUT PERIOD
TIME TIME
A 3.13msec XC61X6, XC61X7 series XC61xxA0xxxxE 50msec400msec
0 3.13msec 6.25msec XC61xxA1xxxxF 50msec1.6sec
1 3.13msec 50msec XC61xxA2xxxxD 100msecXC61X6, XC61X7 series
2 3.13msec 100msec XC61xxA3xxxxH 100msec100msec
3 3.13msec 200msec XC61xxA4xxxxK 100msec200msec
4 3.13msec 400msec XC61xxA5xxxxL 100msec400msec
5 3.13msec 1.6sec XC61xxA6xxxxM 100msec1.6sec
B 25msec XC61X6, XC61X7 series XC61xxB0xxxxE 200msecXC61X6, XC61X7 series
6 25msec 50msec XC61xxB2xxxxP 200msec200msec
7 25msec 100msec XC61xxB3xxxxR 200msec400msec
8 25msec 200msec XC61xxB4xxxxS 200msec1.6sec
9 25msec 400msec XC61xxB5xxxxF 400msecXC61X6, XC61X7 series
A 25msec 1.6sec XC61xxB6xxxxT 400msec400msec
C 50msec XC61X6, XC61X7 series XC61xxC0xxxxU 400msec1.6sec
B 50msec 50msec XC61xxC2xxxxH 1.6sec XC61X6, XC61X7 series
C 50msec 100msec XC61xxC3xxxxV 1.6sec 1.6sec
D 50msec 200msec XC61xxC4xxxx
PRODUCT
SERIES
XC61xxC5xxxx
XC61xxC6xxxx
XC61xxD0xxxx
XC61xxD3xxxx
XC61xxD4xxxx
XC61xxD5xxxx
XC61xxD6xxxx
XC61xxE0xxxx
XC61xxE4xxxx
XC61xxE5xxxx
XC61xxE6xxxx
XC61xxF0xxxx
XC61xxF5xxxx
XC61xxF6xxxx
XC61xxH0xxxx
XC61xxH6xxxx
③ Represents detect voltage
MARK DETECT VOLTAGE PRODUCT SERIES MARK DETECT VOLTAGE PRODUCT SERIES
F 1.6 XC61Xxxx16xx 3 3.4 XC61Xxxx34xx
H 1.7 XC61Xxxx17xx 4 3.5 XC61Xxxx35xx
K 1.8 XC61Xxxx18xx 5 3.6 XC61Xxxx36xx
L 1.9 XC61Xxxx19xx 6 3.7 XC61Xxxx37xx
M 2.0 XC61Xxxx20xx 7 3.8 XC61Xxxx38xx
N 2.1 XC61Xxxx21xx 8 3.9 XC61Xxxx39xx
P 2.2 XC61Xxxx22xx 9 4.0 XC61Xxxx40xx
R 2.3 XC61Xxxx23xx A 4.1 XC61Xxxx41xx
S 2.4 XC61Xxxx24xx B 4.2 XC61Xxxx42xx
T 2.5 XC61Xxxx25xx C 4.3 XC61Xxxx43xx
U 2.6 XC61Xxxx26xx D 4.4 XC61Xxxx44xx
V 2.7 XC61Xxxx27xx E 4.5 XC61Xxxx45xx
X 2.8 XC61Xxxx28xx F 4.6 XC61Xxxx46xx
Y 2.9 XC61Xxxx29xx H 4.7 XC61Xxxx47xx
Z 3.0 XC61Xxxx30xx K 4.8 XC61Xxxx48xx
0 3.1 XC61Xxxx31xx L 4.9 XC61Xxxx49xx
1 3.2 XC61Xxxx32xx M 5.0 XC61Xxxx50xx
2 3.3 XC61Xxxx33xx
④ Represents production lot number
0 to 9 and A to Z and inverted 0 to 9 and A to Z repeated. (G, I, J, O, Q, W expected.)
* ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111)
5/26
元器件交易网
XC6101~XC6107, XC6111~XC6117 Series
■MARKING RULE (Continued)
●USP-6C
① Represents product series
USP-6C
(TOP VIEW)
MARK PRODUCT SERIES MARK PRODUCT SERIES
3 XC6101xxxxxx 8 XC6111xxxxxx
4 XC6102xxxxxx 9 XC6112xxxxxx
5 XC6103xxxxxx A XC6113xxxxxx
6 XC6104xxxxxx B XC6114xxxxxx
7 XC6105xxxxxx C XC6115xxxxxx
3 XC6106xxxxxx 8 XC6116xxxxxx
4 XC6107xxxxxx 9 XC6117xxxxxx
② Represents release delay time
MARK RELEASE DELAY TIME PRODUCT SERIES
A 3.13msec XC61XxAxxxxx
B 25msec XC61XxBxxxxx
C 50msec XC61XxCxxxxx
D 100msec XC61XxDxxxxx
E 200msec XC61XxExxxxx
F 400msec XC61XxFxxxxx
H 1.6sec XC61XxHxxxxx
③ Represents watchdog timeout period
MARK WATCHDOG TIMEOUT PERIOD PRODUCT SERIES
0 XC61X6, XC61X7 series XC61Xxx0xxxx
1 6.25msec XC61Xxx1xxxx
2 50msec XC61Xxx2xxxx
3 100msec XC61Xxx3xxxx
4 200msec XC61Xxx4xxxx
5 400msec XC61Xxx5xxxx
6 1.6sec XC61Xxx6xxxx
④⑤ Represents detect voltage
MARK
DETECT VOLTAGE (V)
④ ⑤
3 3 3.3
5 0 5.0
PRODUCT SERIES
XC61Xxxx33xx
XC61Xxxx50xx
⑥ Represents production lot number
0 to 9 and A to Z repeated. (G, I, J, O, Q, W excepted.)
* No character inversion used.
** ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111)
6/26
元器件交易网
XC6101 ~ XC6107, XC6111~ XC6117
Series
■BLOCK DIAGRAMS
●XC6101, XC6111 Series
●XC6102, XC6112 Series
●XC6103, XC6113 Series
7/26
元器件交易网
XC6101~XC6107, XC6111~XC6117 Series
■BLOCK DIAGRAMS (Continued)
●XC6104, XC6114 Series
●XC6105, XC6115 Series
●XC6106, XC6116 Series
●XC6107, XC6117 Series
8/26
元器件交易网
XC6101 ~ XC6107, XC6111~ XC6117
Series
■ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL
V
IN
M
RB
RATINGS
Ta = 25
O
C
UNITS
V
SS
-0.3 ~ 7.0 V
Input Voltage
V
SS
-0.3 ~ V
IN
+0.3 V
V WD V
SS
-0.3 ~ 7.0
Output Current I
OUT
20 mA
CMOS Output RESETB/RESETV
SS
-0.3 ~ V
IN
+0.3
Output Voltage V
N-ch Open Drain OutputRESETB V
SS
-0.3 ~ 7.0
SOT-25 250
Power Dissipation Pd mW
USP-6C 100
O
Operational Temperature Range Topr -40 ~ +85 C
O
Storage Temperature Range Tstg -40 ~ +125 C
9/26
元器件交易网
XC6101~XC6107, XC6111~XC6117 Series
■ELECTRICAL CHARACTERISTICS
●XC6101~XC6107, XC6111~XC6117 Series
MAX.
V
DF(T)
Detect Voltage V
DF(T)
× 1.02
V 1
Hysteresis Range V
DF
V
DF
V
HYS
V 1
XC6101~XC6107 (*1) × 0.05 × 0.08
Hysteresis Range V
DF
V
DF
V
HYS
0 V 1
XC6111~XC6117 (*2) × 0.001 x 0.01
XC61X1/XC61X2/XC61X3
V
IN
=V
DF(T)
×0.9V
- 5 11
XC61X4/XC61X5 (*3)
- 10 16
(The MRB & the WD Pin:
V
IN
=V
DF(T)
×1.1V
No connection)
18 V
IN
6.0V - 12
Supply Current I
SS
µA 2
V
IN
=V
DF(T)
×0.9V
- 4 10
XC61X6/XC61X7 (*3)
(The MRB Pin:
V
IN
=V
DF(T)
×1.1V
- 8 14
No connection)
16 V
IN
6.0V - 10
Operating Voltage V
IN
1.0 - 6.0 V 1
VIN1.0V 0.15 0.5 -
V
IN
=2.0V (V
DFL(T)
> 2.0V)2.0 2.5 -
N-ch.
3
V
DS
= 0.5V
V
IN
=3.0V (V
DFL(T)
>3.0V)
V
DFL
3.0 3.5 -
mA
Output Current I
RBOUT
V
IN
=4.0V (V
DFL(T)
>4.0V)3.5 4.0 -
(RESETB)
=
CMOS,
=
V
IN
6.0V - - 1.1 -0.8 4 P-ch
V
DS
= 0.5V
N-ch
V
IN
6.0V 4.4 4.9 - 3
V
DS
= 0.5V
V
IN
=
=1.0V - - 0.08 - 0.02
V
DFH
Output Current I
ROUT
mA
V
IN
=2.0V (V
DFH(T)
> 2.0V)- - 0.50 - 0.30
=
P-ch.
(RESET)
4
V
DS
= 0.5V
V
IN
=3.0V (V
DFH(T)
>3.0V)- - 0.75 - 0.55
V
IN
=4.0V (V
DFH(T)
>4.0V)- - 0.95 - 0.75
=
Temperature △V
DF
/
O
ppm
O
-40C < Topr < 85C - +100 - 1
Characteristics △Topr・V
DF
/
O
C
2 3.13 5
13 25 38
Time until V
IN
is increased from
25 50 75
1.0V to 2.0V
Release Delay Time
T
DR
and attains to the release
60 100 140
ms 5
(V
DF
<1.8V)
time level,
120 200 280
and the Reset output pin inverts.
240 400 560
960 1600 2240
2 3.13 5
13 25 38
25 50 75
60 100 140
ms 5
120 200 280
240 400 560
960 1600 2240
- 3 30 µs 5
PARAMETER SYMBOL
V
DFL
V
DFH
CONDITIONSMIN.
V
DF(T)
× 0.98
V
DF
× 0.02
TYP.
Ta = 25
O
C
UNITS
CIRCUIT
Release Delay Time
(V
DF
>1.9V)
T
DR
Time until V
IN
is increased from
1.0V to (V
DF
x1.1V)
and attains to the release
time level,
and the Reset output pin inverts.
Time until V
IN
is decreased from 6.0V to
1.0V and attains to the detect voltage
level, and the Reset output pin detects
while the WD pin left opened.
V
IN
=6.0V, RESETB=6.0V (V
DFL
)
V
IN
=6.0V, RESET=0V (V
DFH
)
V
IN
=6.0V, RESETB=6.0V
Detect Delay Time
V
DFL
/V
DFH
CMOS Output
Leak Current
V
DFL
N-ch Open Drain
Output
Leak Current
T
DF
I
LEAK
I
LEAK
- 0.01 - µA
- 0.01 0.10
3
µA 3
NOTE:
*1: XC6101~XC6107 (with hysteresis)
*2: XC6111~XC6117 (without hysteresis)
*3: ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111)
*4: V
DF(T)
: Setting detect voltage
*5: If only “V
DF
” is indicated, it represents both V
DFL
(low when detected) and V
DFH
(high when detected).
10/26
元器件交易网
XC6101 ~ XC6107, XC6111~ XC6117
Series
■ELECTRICAL CHARACTERISTICS(Continued)
●XC6101~XC6105, XC6111~XC6115 Series
PARAMETER
Watchdog
Timeout Period
(V
DF
<1.8V)
Watchdog
Timeout Period
(V
DF
>1.9V)
Ta = 25
O
C
SYMBOL CONDITIONS . MAX. UNITS
CIRCUIT
3.136.25 9.38
25 50 75
Time until V
IN
increases form
60 100 140
1.0V to 2.0V and
ms 6
T
WD
the Reset output pin is released to go into
120 200 280
the detection state. (WD=V
SS
)
240 400 560
960 1600 2240
3.136.25 9.38
25 50 75
Time until V
IN
increases form
60 100 140
1.0V to (V
DF
x1.1V)
ms 6
T
WD
and the Reset output pin is released to go
120 200 280
240 400 560
into the detection state. (WD=V
SS
)
960 1600 2240
T
WDIN
V
WDH
V
WDL
I
WD
R
WD
V
IN
=6.0V,
Apply pulse from 6.0V to 0V
to the WD pin.
V
IN
=V
DF
x 1.1V ~ 6.0V
V
IN
=V
DF
x 1.1V ~ 6.0V
V
IN
=6.0V, V
WD
=6.0V (Avg. when peak )
V
IN
=6.0V, V
WD
=0V (Avg. when peak)
V
IN
=6.0V, V
WD
=0V, R
WD
=V
IN
/ |I
WD
|
300 - - ns 7
V
IN x
0.7
0
-
- 19
315
- 6 V 7
-
12
-12
500
V
IN x
0.3
19
-
Watchdog
Minimum Pulse Width
Watchdog
High Level Voltage
Watchdog
Low Level Voltage
Watchdog
Input Current
Watchdog
Input Resistance
V 7
µA
kΩ
8
8 880
●XC6101 ~ XC6103, XC6106 ~ XC6107, XC6111 ~ XC6113, XC6116 ~ XC6117 Series
PARAMETER
MRB
High Level Voltage
MRB
Low Level Voltage
MRB
Pull-up Resistance
MRB Minimum
Pulse Width (*3)
XC6101~XC6105
XC6111~XC6115
MRB Minimum
Pulse Width (*4)
XC6106, XC6107
XC6116, XC6117
SYMBOL
V
MRH
V
MRL
R
MR
T
MRIN
CONDITIONS
V
IN
=V
DF
x1.1V ~ 6.0V
V
IN
=V
DF
x1.1V ~ 6.0V
MIN.
1.4
0
TYP.
-
-
MAX.
Ta = 25
O
C
UNITS
CIRCUIT
V
IN
9
V
0.35 9
V
IN
=6.0V, MRB=0V, R
MR
=V
IN
/ |I
MRB
| 1.6 2.4 3.0 MΩ 10
V
IN
=6.0V,
Apply pulse from 6.0V to 0V to
the MRB pin
V
IN
=6.0V,
Apply pulse from 6.0V to 0V to
the MRB pin
2.8 - -
µs 11
T
MRIN
1.2 - -
NOTE:
*1: V
DF(T)
: Setting detect voltage
*2: If only “V
DF
” is indicated, it represents both V
DFL
(low when detected) and V
DFH
(high when detected).
*3: Watchdog function is available.
*4: Watchdog function is not available.
11/26
元器件交易网
XC6101~XC6107, XC6111~XC6117 Series
The XC6101~XC6107, XC6111~XC6117 series compare, using the error amplifier, the voltage of the internal voltage
■OPERATIONAL EXPLANATION
reference source with the voltage divided by R1, R2 and R3 connected to the V
IN
pin. The resulting output signal from the
error amplifier activates the watchdog logic, manual reset logic, delay circuit and the output driver. When the V
IN
pin voltage
gradually falls and finally reaches the detect voltage, the RESETB pin output goes from high to low in the case of the V
DFL
type
ICs, and the RESET pin output goes from low to high in the case of the V
DFH
type ICs.
* V
DFL
(RESETB) type - output signal: Low when detected.
The RESETB pin output goes from high to low whenever the V
IN
pin voltage falls below the detect voltage, or whenever the
MRB pin is driven from high to low. The RESETB pin remains low for the release delay time (T
DR
) after the V
IN
pin voltage
reaches the release voltage. If neither rising nor falling signals are applied to the WD pin within the watchdog timeout period,
the RESETB pin output remains low for the release delay time (T
DR
), and thereafter the RESET pin outputs high level signal.
* V
DFH
(RESET) type – output signal: High when detected.
The RESET pin output goes from low to high whenever the V
IN
pin voltage falls below the detect voltage, or whenever the
MRB pin is driven from high to low. The RESET pin remains high for the release delay time (T
DR
) after the V
IN
pin voltage
reaches the release voltage. If neither rising nor falling signals are applied to the WD pin within the watchdog timeout period,
the V
OUT
pin output remains high for the release delay time (T
DR
), and thereafter the RESET pin outputs low level signal.
When the internal comparator output is high, the NMOS transistor connected in parallel to R3 is turned ON, activating the
hysteresis circuit. The difference between the release and detect voltages represents the hysteresis range, as shown by the
following calculations:
V
DF
(detect voltage) = (R1+R2+R3) x Vref(R2+R3)
V
DR
(release voltage) = (R1+R2) x Vref(R2)
V
HYS
(hysteresis range)=V
DR
-V
DF
(V)
V
DR
> V
DF
* Detect voltage (V
DF
) includes conditions of both V
DFL
(low when detected) and V
DFH
(high when detected).
* Please refer to the block diagrams for R1, R2, R3 and Vref.
Hysteresis range is selectable from V
DF
x 0.05V (XC6101~XC6107) or V
DF
x 0.001V (XC6111~XC6117).
The XC6101~XC6107, XC6111~XC6117 series use a watchdog timer to detect malfunction or “runaway” of the
microprocessor. If neither rising nor falling signals are applied from the microprocessor within the watchdog timeout period,
the RESETB/RESET pin output maintains the detection state for the release delay time (T
DR
), and thereafter the
RESET/RESETB pin output returns to the release state (Please refer to the FUNCTION CHART). The timer in the watchdog
is then restarted. Six watchdog timeout period settings are available in 1.6sec, 400msec, 200msec, 100msec, 50msec,
6.25msec.
Using the MRB pin input, the RESET/RESETB pin signal can be forced to the detection state. When the MRB pin is driven
from high to low, the RESETB pin output goes from high to low in the case of the V
DFL
type ICs, and the RESET pin output
goes from low to high in the case of the V
DFH
type. Even after the MRB pin is driven back high, the RESET/RESETBpin
output maintains the detection state for the release delay time (T
DR
). Since the MRB pin is internally pulled up to the V
IN
pin
voltage level, leave the MRB pin open if unused (Please refer to the FUNCTION CHART). A diode, which is an input
protection element, is connected between the MRB pin and V
IN
pin. Therefore, if the MRB pin is applied voltage that exceeds
V
IN
, the current will flow to V
IN
through the diode. Please use this IC within the stated maximum ratings (V
SS
-0.3 ~ V
IN
+0.3)
on the MRB pin.
Release delay time (T
DR
) is the time that elapses from when the V
IN
pin reaches the release voltage, or when the watchdog
timeout period expires with no rising signal applied to the WD pin, until the RESET/RESETB pin output is released from the
detection state. Seven release delay time (T
DR
) watchdog timeout period settings are available in 1.6sec, 400msec,
200msec, 100msec, 50msec, 25msec, 3.13msec.
Detect Delay Time (T
DF
) is the time that elapses from when the V
IN
pin voltage falls to the detect voltage until the RESET/
RESETB pin output goes into the detection state.
12/26
元器件交易网
XC6101 ~ XC6107, XC6111~ XC6117
Series
■TIMING CHARTS
●CMOS Output
●T
DF
(CMOS Output)
VIN
VDFL Level
6.0V
VIN Pin Wave Form
1.0V
GND
TDF
VIN Level
VDFL Level
VIN x 0.1V
GND
0.6V
RESETB Pin Wave Form (VDFL)
13/26
元器件交易网
XC6101~XC6107, XC6111~XC6117 Series
GND
TDRTDR
RESETB Pin Wave Form (VDFL)
GND
No reaction time
(MAX 900usec)
No reaction time
(MAX 900usec)
GND
WD Pin Wave Form
TWDTWD
VIN Pin Wave Form
■NOTES ON USE
1. Please use this IC within the stated maximum ratings. Operation beyond these limits may cause degrading or permanent
damage to the device.
2. When a resistor is connected between the V
IN
pin and the input, the V
IN
voltage drops while the IC is operating and a
malfunction may occur as a result of the IC’s through current. For the CMOS output products, the V
IN
voltage drops while
the IC is operating and malfunction may occur as a result of the IC’s output current. Please be careful with using the
XC6111~XC6117 series (without hysteresis).
3. In order to stabilize the IC’s operations, please ensure that the V
IN
pin’s input frequency’s rise and fall times are more than
1 µ sec/V.
4. Noise at the power supply may cause a malfunction of the watchdog operation or the circuit. In such case, please
strength the line between V
IN
and the GND pin and connect about 0.22µF of a capacitor between the V
IN
pin and the GND
pin.
5. Protecting against a malfunction while the watchdog time out period, an ignoring time (no reaction time) occurs to the rise
and fall times. Referring to the figure below, the ignoring time (no reaction time) lasts for 900µsec at maximum.
14/26
元器件交易网
XC6101 ~ XC6107, XC6111~ XC6117
Series
■PIN LOGIC CONDITIONS
PIN NAME
V
IN
MRB
LOGIC CONDITIONS
H V
IN
>V
DF
+V
HYS
L V
IN
DF H MRB>1.40V L MRB<0.35V H When keeping W D >V WDH more than T WD L When keeping W D WDL more than T WD L → H V WDL → V WDH , T WDIN >300nsec H → L V WDH →V WDH , T WDIN >300nsec NOTE: *1: If only “V DF ” is indicated, it represents both V DFL (low when detected) and V DFH (high when detected). *2: For the details of each parameter, please see the electrical characteristics. V DF : Detect Voltage V HYS : Hysteresis Range V WDH : WD High Level Voltage V WDL: WD Low Level Voltage T WDIN : WD Pulse Width T WD : WD Timeout Period WD ■FUNCTION CHART V IN MRB WD RESETB (*2) H H Repeat detect and release (H→L→H) H L H or Open H Open H H L → H H H → L H L *1 L L ●XC6101/XC61111, XC6102/6112 Series ●XC6103/XC61113 Series V IN MRB WD RESETB (*3) H H Repeat detect and release (L→H→L) H L H or Open H Open L H L → H H H → L H L *1 H L ●XC6104/XC61114, XC6105/XC6115 Series V IN WD RESETB (*2) RESET (*3) H H Repeat detect and release (H→L→H)Repeat detect and release (L→H→L) H L H Open H L H L → H H H → L H *1 L H L ●XC6106/XC61116, XC6107/XC6117 Series V IN H H L MRB H or Open RESETB (*2) H RESET (*3) L L L H *1: Including all logic of WD (WD=H, L, L→H, H→L, OPEN). *2: When the RESETB is High, the circuit is in the release state. When the RESETB is Low, the circuit is in the detection state. *3: When the RESET is High, the circuit is in the release state. When the RESET is Low, the circuit is in the detection state. *4: V IN =L and MRB=H can not be combined for the rated input voltage of the MRB pin is Vss-0.3V to V IN +0.3V. *5: The RESET/RESETB pin becomes indefinite operation while 0.35V 15/26 元器件交易网 XC6101~XC6107, XC6111~XC6117 Series ■TEST CIRCUITS Circuit 1 Circuit 2 Circuit 3 Circuit 4 16/26 元器件交易网 XC6101 ~ XC6107, XC6111~ XC6117 Series ■TEST CIRCUITS (Continued) Circuit 5 Circuit 6 Circuit 7 17/26 元器件交易网 XC6101~XC6107, XC6111~XC6117 Series ■TEST CIRCUITS (Continued) Circuit 8 Circuit 9 Circuit 10 Circuit 11 18/26 元器件交易网 XC6101 ~ XC6107, XC6111~ XC6117 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (1.1) Supply Current vs. Input Voltage S u p p l y C u r r e n t : I S S ( µ A ) 30 S u p p l y C u r r e n t : I S S ( µ A ) 25 20 15 10 5 0 012345 Input Voltage: VIN (V) 6 Ta=-40 ℃ Ta=25 ℃ Ta=85 ℃ XC61X1~XC61X5 (1.6V) 30 25 20 15 10 5 0 012345 Input Voltage: VIN (V) 6 Ta=-40 ℃ Ta=25 ℃ Ta=85 ℃ XC61X1~XC61X5 (2.7V) XC61X1~XC61X5 (5.0V) 30 S u p p l y C u r r e n t : I S S ( µ A ) 25 20 15 10 5 0 012345 Input Voltage: VIN (V) 6 Ta=25 ℃ Ta=85 ℃ Ta=-40 ℃ (1.2) Supply Current vs. Input Voltage S u p p l y C u r r e n t : I S S ( µ A ) 30 XC61X6~XC61X7 (1.6V) XC61X6~XC61X7 (2.7V) 30 S u p p l y C u r r e n t : I S S ( µ A ) 25 20 15 10 5 0 25 20 15 10 5 0 012345 Input Voltage: VIN (V) 6 Ta=25 ℃ Ta=85 ℃ Ta=25 ℃ Ta=85 ℃ Ta=-40 ℃ Ta=-40 ℃ 012345 Input Voltage: VIN (V) 6 * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) 19/26 元器件交易网 XC6101~XC6107, XC6111~XC6117 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (1.2) Supply Current vs. Input Voltage (Continued) S u p p l y C u r r e n t : I S S ( µ A ) 30 25 20 15 10 5 Ta=-40 ℃ 0 012345 Input Voltage: VIN (V) 6 Ta=25 ℃ Ta=85 ℃ XC61X6~XC61X7 (5.0V) (2) Detect, Release Voltage vs. Ambient Temperature D e t e c t , R e l e a s e V o l t a g e : V D F , V D R ( V ) 1.70 D e t e c t , R e l e a s e V o l t a g e : V D F , V D R ( V ) XC61X1~XC61X7 (1.6V) XC61X1~XC61X7 (2.7V) 2.90 1.65 VDR 2.80 VDR 1.60 2.70 VDF 1.55 -50-250255075 Ambient Temperature: Ta ( ℃ ) 100 VDF 2.60 -50-250255075 Ambient Temperature: Ta ( ℃ ) 100 XC61X1~XC61X7 (5.0V) 5.30 D e t e c t , R e l e a s e V o l t a g e : V D F , V D R ( V ) 5.20 VDR 5.10 5.00 VDF 4.90 -50-250255075 Ambient Temperature: Ta ( ℃ ) 100 * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) 20/26 元器件交易网 XC6101 ~ XC6107, XC6111~ XC6117 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (3-1) Output Voltage vs. Input Voltage (V DFL ) (3.1) Detect, Release Voltage vs. Input Voltage (V DFL ) D e t e c t , R e l e a s e V o l t a g e : V D F L , V D R ( V ) XC6101~XC6107 (1.6V) 2.0 Rpull:100kΩ Ta=-40 ℃ 25 ℃ 85 ℃ ↓: VDF ↑: VDR D e t e c t , R e l e a s e V o l t a g e : V D F L , V D R ( V ) 3.0 2.5 2.0 1.5 1.0 0.5 0.0 012 Input Voltage: VIN (V) 3 Rpull:100kΩ Ta=-40 ℃ 25 ℃ 85 ℃ ↓: VDF ↑: VDR XC6101~XC6107 (2.7V) 1.5 1.0 0.5 0.0 01 Input Voltage: VIN (V) 2 XC6101~XC6107 (5.0V) 6.0 D e t e c t , R e l e a s e V o l t a g e : V D F L , V D R ( V ) 5.0 4.0 3.0 2.0 1.0 0.0 012345 Input Voltage: VIN (V) 6 Rpull:100kΩ Ta=-40 ℃ 25 ℃ 85 ℃ ↓: VDF ↑: VDR (3.2) Detect, Release Voltage vs. Input Voltage (V DFH ) D e t e c t , R e l e a s e V o l t a g e : V D R , V D F H ( V ) XC6103~XC6107 (1.6V) 2.0 Rpull:100kΩ Ta=-40 ℃ 25 ℃ 85 ℃ ↑: VDF ↓: VDR XC6103~XC6107 (2.7V) 3.0 D e t e c t , R e l e a s e V o l t a g e : V D R , V D F H ( V ) 2.5 2.0 1.5 1.0 0.5 0.0 012 Input Voltage: VIN (V) 3 Rpull:100kΩ Ta=-40 ℃ 25 ℃ 85 ℃ ↑: VDF ↓: VDR 1.5 1.0 0.5 0.0 01 Input Voltage: VIN (V) 2 * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) 21/26 元器件交易网 XC6101~XC6107, XC6111~XC6117 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (3.2) Detect, Release Voltage vs. Input Voltage (V DFH ) (Continued) XC6103~XC6107 (5.0V) D e t e c t , R e l e a s e V o l t a g e : V D R , V D F H ( V ) 6.0 5.0 4.0 3.0 2.0 1.0 0.0 012345 Input Voltage: VIN (V) 6 Rpull:100kΩ Ta=-40 ℃ 25 ℃ 85 ℃ ↑: VDF ↓: VDR (4) N-ch Driver Output Current vs. V DS O u t p u t C u r r e n t : I O U T ( m A ) 6 Ta=25 ℃ 5 4 3 2 1 0 01 VDS (V) 23 VIN=2.0V XC61X1~XC61X7 XC61X1~XC61X7 20 Ta=25 ℃ O u t p u t C u r r e n t : I O U T ( m A ) 16 VIN=4.0V 12 VIN=3.0V 8 4 VIN=1.0V 0 01234 VDS (V) 56 (5) N-ch Driver Output Current vs. Input Voltage XC61X1~XC61X7 O u t p u t C u r r e n t : I O U T ( m A ) 6.0 VDS=0.5V 5.0 4.0 3.0 2.0 1.0 0.0 012345 Input Voltage: VIN (V) 6 Ta=85 ℃ Ta=-40 ℃ Ta=25 ℃ * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) 22/26 元器件交易网 XC6101 ~ XC6107, XC6111~ XC6117 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (6) P-ch Driver Output Current vs. Input Voltage 1 O u t p u t C u r r e n t : I O U T ( m A ) 6.0 Ta=25 ℃ VDS=2.0V 4.0 1.5V 3.0 1.0V 2.0 0.5V 1.0 0.0 012345 Input Voltage: VIN (V) 6 5.0 XC61X1, XC61X3~XC61X7 (7) P-ch Driver Output Current vs. Input Voltage 2 XC61X1, XC61X3~XC61X7 2.0 VDS=0.5V O u t p u t C u r r e n t : I O U T ( m A ) 1.6 Ta=-40 ℃ Ta=25 ℃ Ta=85 ℃ 0.4 1.2 0.8 0.0 012345 Input Voltage: VIN (V) 6 (8) Release Delay Time vs. Ambient Temperature R e l e a s e D e l a y T i m e T D R ( m s e c ) XC61X1~XC61X7 6.0 5.0 4.0 3.0 2.0 1.0 0.0 -50-250255075 Ambient Temperature: Ta ( ℃ ) 100 XC61X1~XC61X7 300 R e l e a s e D e l a y T i m e T D R ( m s e c ) TDR=100msec 250 200 150 100 50 0 -50-250255075 Ambient Temperature: Ta ( ℃ ) 100 TDR=3.13msec XC61X1~XC61X7 3000 R e l e a s e D e l a y T i m e T D R ( m s e c ) TDR=1.6sec 2500 2000 1500 1000 500 0 -50-25 Ambient Temperature: Ta ( ℃ ) * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) 23/26 元器件交易网 XC6101~XC6107, XC6111~XC6117 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (9) Watchdog Timeout Period vs. Ambient Temperature 300 W D T i m e o u t P i r i o d T W D ( m s e c ) TWD=6.25msec 10 8 6 4 2 0 -50-250255075 Ambient Temperature: Ta ( ℃ ) 100 TWD=100msec 250 200 150 100 50 0 -50-250255075 Ambient Temperature: Ta ( ℃ ) 100 XC61X1~XC61X5 XC61X1~XC61X5 12 W D T i m e o u t P i r i o d T W D ( m s e c ) W D T i m e o u t P i r i o d T W D ( m s e c ) XC61X1~XC61X5 3000 TWD=1.6sec 2500 2000 1500 1000 500 0 -50-250255075 Ambient Temperature: Ta ( ℃ ) 100 (10) Release Delay Time vs. Input Voltage R e l e a s e D e l a y T i m e : T D R ( m s e c ) 120 110 100 90 80 70 60 123456 Input Voltage: VIN (V) 7 XC61x1~XC61x7 (11) Watchdog Timeout Period vs. Input Voltage XC61x1~XC61x5 120 W D T i m e o u t P i r i o d : T W D ( m s e c ) Ta=25 ℃ TWD=100msec Ta=25 ℃ TDR=100msec 110 100 90 80 70 60 123456 Input Voltage: VIN (V) 7 * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) 24/26 元器件交易网 XC6101 ~ XC6107, XC6111~ XC6117 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (12) Watchdog Low Level Voltage vs. Ambient Temperature(13) Watchdog High Level Voltage vs. Ambient Temperature XC61X1~XC61X5 6.0 W D H i g h L e v e l T h r e s h o l d V o l t a g e V W D H ( V ) 5.0 4.0 3.0 VIN=3.0V 2.0 1.0 VIN=1.76V 0.0 -50-25 -50 Ambient Temperature: Ta ( ℃ ) -250255075 Ambient Temperature: Ta ( ℃ ) 100 VIN=6.0V XC61X1~XC61X5 6.0 W D L o w L e v e l T h r e s h o l d V o l t a g e V W D L ( V ) 5.0 4.0 3.0 2.0 1.0 VIN=1.76V 0.0 VIN=6.0V VIN=3.0V (14) MRB Low Level Voltage vs. Ambient Temperature M R B L o w L e v e l T h r e s h o l d V o l t a g e V M R L ( V ) 1.10 1.00 0.90 VIN=3.0V 0.80 0.70 0.60 VIN=1.76V 0.50 -50-25 Ambient Temperature: Ta ( ℃ ) VIN=6.0V XC61X1~XC61X3, XC61X6~XC61X7 (15) MRB High Level Voltage vs. Ambient Temperature XC61X1~XC61X3, XC61X6~XC61X7 1.10 M R B H i g h L e v e l T h r e s h o l d V o l t a g e V M R H ( V ) 1.00 0.90 0.80 VIN=3.0V 0.70 0.60 0.50 -50-25 Ambient Temperature: Ta ( ℃ ) VIN=1.76V VIN=6.0V * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) 25/26 元器件交易网 XC6101~XC6107, XC6111~XC6117 Series 1. The products and product specifications contained herein are subject to change without notice to improve performance characteristics. Consult us, or our representatives before use, to confirm that the information in this catalog is up to date. 2. We assume no responsibility for any infringement of patents, patent rights, or other rights arising from the use of any information and circuitry in this catalog. 3. Please ensure suitable shipping controls (including fail-safe designs and aging protection) are in force for equipment employing products listed in this catalog. 4. The products in this catalog are not developed, designed, or approved for use with such equipment whose failure of malfunction can be reasonably expected to directly endanger the life of, or cause significant injury to, the user. (e.g. Atomic energy; aerospace; transport; combustion and associated safety equipment thereof.) 5. Please use the products listed in this catalog within the specified ranges. Should you wish to use the products under conditions exceeding the specifications, please consult us or our representatives. 6. We assume no responsibility for damage or loss due to abnormal use. 7. All rights reserved. No part of this catalog may be copied or reproduced without the prior permission of Torex Semiconductor Ltd. 26/26 2024年8月3日发(作者:粟芃)
元器件交易网
Preliminary
◆Manual Reset Input
◆Watchdog Functions
◆Built-in Delay Circuit
◆CMOS Voltage Detector
■APPLICATIONS
●Microprocessor reset circuits
●Memory battery backup circuits
●System power-on reset circuits
●Power failure detection
◆Detect Voltage Range: 1.6~5.0V, ± 2%
◆Reset Function is Selectable
V
DFL
(Low When Detected)
V
DFH
(High When Detected)
■GENERAL DESCRIPTION
■FEATURES
Detect Voltage Range : 1.6V ~ 5.0V, +2%
(100mV increments)
Hysteresis Range : V
DF
x 5%, TYP.
(XC6101~XC6107)
V
DF
x 0.1%, TYP.
(XC6111~XC6117)
Operating Voltage Range : 1.0V ~ 6.0V
Detect Voltage Temperature
Characteristics : +100ppm/
O
C (TYP.)
Output Configuration : N-channel open drain,
CMOS
Watchdog Pin : Watchdog input
If watchdog input maintains
‘H’ or ‘L’ within the watchdog
timeout period, a reset signal
is output to the RESET
output pin
Manual Reset Pin : When driven ‘H’ to ‘L’level
signal, the MRB pin voltage
asserts forced reset on the
output pin.
Release Delay Time : 1.6sec, 400msec, 200msec,
100msec, 50msec, 25msec,
3.13msec (TYP.) can be
selectable.
Watchdog Timeout Period : 1.6sec, 400msec, 200msec,
100msec, 50msec,
6.25msec (TYP.) can be
selectable.
The XC6101~XC6107, XC6111~XC6117 series are
groups of high-precision, low current consumption voltage
detectors with manual reset input function and watchdog
functions incorporating CMOS process technology. The
series consist of a reference voltage source, delay circuit,
comparator, and output driver.
With the built-in delay circuit, the XC6101 ~ XC6107,
XC6111 ~ XC6117 series’ ICs do not require any external
components to output signals with release delay time.
Moreover, with the manual reset function, reset can be
asserted at any time. The ICs produce two types of
output; V
DFL
(low when detected) and V
DFH
(high when
detected).
With the XC6101 ~ XC6105, XC6111 ~ XC6115 series’
ICs, the WD pin can be left open if the watchdog function
is not used.
Whenever the watchdog pin is opened, the internal
counter clears before the watchdog timeout occurs.
Since the manual reset pin is internally pulled up to the V
IN
pin voltage level, the ICs can be used with the manual
reset pin left unconnected if the pin is unused.
The detect voltages are internally fixed 1.6V ~ 5.0V in
increments of 100mV, using laser trimming technology.
Six watchdog timeout period settings are available in a
range from 6.25msec to 1.6sec.
Seven release delay time 1 are available in a range from
3.13msec to 1.6sec.
* Not necessary with CMOS output products.
■TYPICAL APPLICATION CIRCUIT
■TYPICAL PERFORMANCE
CHARACTERISTICS
●Supply Current vs. Input Voltage
XC61X1~XC61X5 (2.7V)
30
S
u
p
p
l
y
C
u
r
r
e
n
t
:
I
S
S
(
µ
A
)
25
20
15
10
5
0
012345
Input Voltage:
VIN (V)
6
Ta=-40
℃
Ta=25
℃
Ta=85
℃
* ‘x’ represents both ‘0’ and ‘1’. (ex. XC61x1⇒XC6101 and XC6111)
XC6101_07_XC6111_17 ETR0207_009
1/26
元器件交易网
XC6101~XC6107, XC6111~XC6117 Series
PIN CONFIGURATION ■
●SOT-25
XC6101, XC6102 Series
XC6111, XC6112 Series
V
IN
5
WD
4
XC6103 & XC6113 Series
V
IN
5
WD
4
XC6104, XC6105 Series
XC6114, XC6115 Series
V
IN
5
WD
4
XC6106, XC6107 Series
XC6116, XC6117 Series
V
IN
5
MRB
4
1
RESETB
2
V
SS
3
MRB
1
RESET
2
V
SS
3
MRB
1
RESETB
23
1
RESETB
23
V
SS
RESET
V
SS
RESET
SOT-25 (TOP VIEW)
SOT-25 (TOP VIEW)
SOT-25 (TOP VIEW)
SOT-25 (TOP VIEW)
●USP-6C
XC6101, XC6102 Series
XC6111, XC6112 Series
XC6103 & XC6113 Series
XC6104, XC6105 Series
XC6114, XC6115 Series
XC6106, XC6107 Series
XC6116, XC6117 Series
USP-6C (BOTTOM VIEW)
USP-6C (BOTTOM VIEW)USP-6C (BOTTOM VIEW)
USP-6C (BOTTOM VIEW)
* The dissipation pad for the USP-6C package should be
solder-plated in recommended mount pattern and metal
masking so as to enhance mounting strength and heat
release. If the pad needs to be connected to other pins, it
should be connected to the V
SS
pin.
■PIN ASSIGNMENT
PIN NUMBER
XC6101, XC6102 XC6103 XC6104, XC6105XC6106, XC6107
PIN NAME
XC6111, XC6112 XC6113 XC6114, XC6115XC6116, XC6117
SOT-25 USP-6C SOT-25 USP-6C SOT-25 USP-6CSOT-25USP-6C
R
ESETB
1 4 - - 1 4 1 4
2 5 2 5 2 5 2 5
V
SS
FUNCTION
Reset Output
(V
DFL
: Low Level When Detected)
Ground
3 2 3 2 - - 4 1 M
RB
Manual Reset
4 1 4 1 4 1 - - WD Watchdog
5 6 5 6 5 6 5 6 V
IN
Power Input
Reset Output
- - 1 4 3 2 3 2 RESET
(V
DFH:
High Level When Detected)
2/26
元器件交易网
XC6101 ~ XC6107, XC6111~ XC6117
Series
■PRODUCT CLASSIFICATION
●Selection Guide
SERIES WATCHDOG
MANUAL
RESET
Available
RESET OUTPUT
V
DFL
(RESETB)
CMOS
-
CMOS
CMOS
N-channel open drain
V
DFH
(RESET)
-
-
CMOS
CMOS
CMOS
CMOS
CMOS
XC6101 XC6111 Available Available
XC6102 XC6112 Available
XC6103 XC6113 Available
XC6105
XC6107
Available
Not Available
Available
XC6104 XC6114 Available Not Available
XC6115
XC6117
Available
Not Available
XC6106 XC6116 Not Available Available
N-channel open drain
N-channel open drain
●Ordering Information
XC61①②③④⑤⑥⑦⑧
DESIGNATOR DESCRIPTION SYMBOL DESCRIPTION
① Hysteresis Range
Functions and
Type of Reset Output
0 : V
DF
x 5% (TYP.) with hysteresis
1 : V
DF
x 0.1% (TYP.) without hysteresis
: Watchdog and manual functions, and reset
output type as per Selection Guide in the above
chart
A
B
C
: 3.13msec (TYP.)
: 25msec (TYP.)
: 50msec (TYP.)
: 100msec (TYP.)
: 200msec (TYP.)
: 400msec (TYP.)
: 1.6sec (TYP.)
: No WD timeout period for
XC6106, XC6107, XC6116, XC6117 Series
: 6.25msec (TYP.)
: 50msec (TYP.)
: 100msec (TYP.)
: 200msec (TYP.)
: 400msec (TYP.)
: 1.6sec (TYP.)
: Detect voltage
ex.) 4.5V: ⑤⇒4, ⑥⇒5
②
1 ~ 7
③ Release Delay Time *
D
E
F
H
0
1
④ Watchdog Timeout Period
2
3
4
5
6
⑤⑥ Detect Voltage 16 ~ 50
⑦ Package
⑧ Device Orientation
M : SOT-25
E : USP-6C
R
L
: Embossed tape, standard feed
: Embossed tape, reverse feed
* Please set the release delay time shorter than or equal to the watchdog timeout period.
ex.) XC6101D427MR or XC6101D327MR
3/26
元器件交易网
XC6101~XC6107, XC6111~XC6117 Series
■PACKAGING INFORMATION
●SOT-25
●USP-6C
4/26
元器件交易网
XC6101 ~ XC6107, XC6111~ XC6117
Series
■MARKING RULE
●SOT-25
① Represents product series
①②③④
SOT-25
(TOP VIEW)
MARK PRODUCT SERIES MARK PRODUCT SERIES
0 XC6101xxxxxx 7 XC6111xxxxxx
1 XC6102xxxxxx 8 XC6112xxxxxx
2 XC6103xxxxxx 9 XC6113xxxxxx
3 XC6104xxxxxx A XC6114xxxxxx
4 XC6105xxxxxx B XC6115xxxxxx
5 XC6106xxxxxx C XC6116xxxxxx
6 XC6107xxxxxx D XC6117xxxxxx
② Represents release delay time and watchdog timeout period
RELEASE RELEASE
WATCH DOG PRODUCT WATCH DOG
MARK
DELAY
MARK
DELAY
TIMEOUT PERIOD SERIES TIMEOUT PERIOD
TIME TIME
A 3.13msec XC61X6, XC61X7 series XC61xxA0xxxxE 50msec400msec
0 3.13msec 6.25msec XC61xxA1xxxxF 50msec1.6sec
1 3.13msec 50msec XC61xxA2xxxxD 100msecXC61X6, XC61X7 series
2 3.13msec 100msec XC61xxA3xxxxH 100msec100msec
3 3.13msec 200msec XC61xxA4xxxxK 100msec200msec
4 3.13msec 400msec XC61xxA5xxxxL 100msec400msec
5 3.13msec 1.6sec XC61xxA6xxxxM 100msec1.6sec
B 25msec XC61X6, XC61X7 series XC61xxB0xxxxE 200msecXC61X6, XC61X7 series
6 25msec 50msec XC61xxB2xxxxP 200msec200msec
7 25msec 100msec XC61xxB3xxxxR 200msec400msec
8 25msec 200msec XC61xxB4xxxxS 200msec1.6sec
9 25msec 400msec XC61xxB5xxxxF 400msecXC61X6, XC61X7 series
A 25msec 1.6sec XC61xxB6xxxxT 400msec400msec
C 50msec XC61X6, XC61X7 series XC61xxC0xxxxU 400msec1.6sec
B 50msec 50msec XC61xxC2xxxxH 1.6sec XC61X6, XC61X7 series
C 50msec 100msec XC61xxC3xxxxV 1.6sec 1.6sec
D 50msec 200msec XC61xxC4xxxx
PRODUCT
SERIES
XC61xxC5xxxx
XC61xxC6xxxx
XC61xxD0xxxx
XC61xxD3xxxx
XC61xxD4xxxx
XC61xxD5xxxx
XC61xxD6xxxx
XC61xxE0xxxx
XC61xxE4xxxx
XC61xxE5xxxx
XC61xxE6xxxx
XC61xxF0xxxx
XC61xxF5xxxx
XC61xxF6xxxx
XC61xxH0xxxx
XC61xxH6xxxx
③ Represents detect voltage
MARK DETECT VOLTAGE PRODUCT SERIES MARK DETECT VOLTAGE PRODUCT SERIES
F 1.6 XC61Xxxx16xx 3 3.4 XC61Xxxx34xx
H 1.7 XC61Xxxx17xx 4 3.5 XC61Xxxx35xx
K 1.8 XC61Xxxx18xx 5 3.6 XC61Xxxx36xx
L 1.9 XC61Xxxx19xx 6 3.7 XC61Xxxx37xx
M 2.0 XC61Xxxx20xx 7 3.8 XC61Xxxx38xx
N 2.1 XC61Xxxx21xx 8 3.9 XC61Xxxx39xx
P 2.2 XC61Xxxx22xx 9 4.0 XC61Xxxx40xx
R 2.3 XC61Xxxx23xx A 4.1 XC61Xxxx41xx
S 2.4 XC61Xxxx24xx B 4.2 XC61Xxxx42xx
T 2.5 XC61Xxxx25xx C 4.3 XC61Xxxx43xx
U 2.6 XC61Xxxx26xx D 4.4 XC61Xxxx44xx
V 2.7 XC61Xxxx27xx E 4.5 XC61Xxxx45xx
X 2.8 XC61Xxxx28xx F 4.6 XC61Xxxx46xx
Y 2.9 XC61Xxxx29xx H 4.7 XC61Xxxx47xx
Z 3.0 XC61Xxxx30xx K 4.8 XC61Xxxx48xx
0 3.1 XC61Xxxx31xx L 4.9 XC61Xxxx49xx
1 3.2 XC61Xxxx32xx M 5.0 XC61Xxxx50xx
2 3.3 XC61Xxxx33xx
④ Represents production lot number
0 to 9 and A to Z and inverted 0 to 9 and A to Z repeated. (G, I, J, O, Q, W expected.)
* ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111)
5/26
元器件交易网
XC6101~XC6107, XC6111~XC6117 Series
■MARKING RULE (Continued)
●USP-6C
① Represents product series
USP-6C
(TOP VIEW)
MARK PRODUCT SERIES MARK PRODUCT SERIES
3 XC6101xxxxxx 8 XC6111xxxxxx
4 XC6102xxxxxx 9 XC6112xxxxxx
5 XC6103xxxxxx A XC6113xxxxxx
6 XC6104xxxxxx B XC6114xxxxxx
7 XC6105xxxxxx C XC6115xxxxxx
3 XC6106xxxxxx 8 XC6116xxxxxx
4 XC6107xxxxxx 9 XC6117xxxxxx
② Represents release delay time
MARK RELEASE DELAY TIME PRODUCT SERIES
A 3.13msec XC61XxAxxxxx
B 25msec XC61XxBxxxxx
C 50msec XC61XxCxxxxx
D 100msec XC61XxDxxxxx
E 200msec XC61XxExxxxx
F 400msec XC61XxFxxxxx
H 1.6sec XC61XxHxxxxx
③ Represents watchdog timeout period
MARK WATCHDOG TIMEOUT PERIOD PRODUCT SERIES
0 XC61X6, XC61X7 series XC61Xxx0xxxx
1 6.25msec XC61Xxx1xxxx
2 50msec XC61Xxx2xxxx
3 100msec XC61Xxx3xxxx
4 200msec XC61Xxx4xxxx
5 400msec XC61Xxx5xxxx
6 1.6sec XC61Xxx6xxxx
④⑤ Represents detect voltage
MARK
DETECT VOLTAGE (V)
④ ⑤
3 3 3.3
5 0 5.0
PRODUCT SERIES
XC61Xxxx33xx
XC61Xxxx50xx
⑥ Represents production lot number
0 to 9 and A to Z repeated. (G, I, J, O, Q, W excepted.)
* No character inversion used.
** ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111)
6/26
元器件交易网
XC6101 ~ XC6107, XC6111~ XC6117
Series
■BLOCK DIAGRAMS
●XC6101, XC6111 Series
●XC6102, XC6112 Series
●XC6103, XC6113 Series
7/26
元器件交易网
XC6101~XC6107, XC6111~XC6117 Series
■BLOCK DIAGRAMS (Continued)
●XC6104, XC6114 Series
●XC6105, XC6115 Series
●XC6106, XC6116 Series
●XC6107, XC6117 Series
8/26
元器件交易网
XC6101 ~ XC6107, XC6111~ XC6117
Series
■ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL
V
IN
M
RB
RATINGS
Ta = 25
O
C
UNITS
V
SS
-0.3 ~ 7.0 V
Input Voltage
V
SS
-0.3 ~ V
IN
+0.3 V
V WD V
SS
-0.3 ~ 7.0
Output Current I
OUT
20 mA
CMOS Output RESETB/RESETV
SS
-0.3 ~ V
IN
+0.3
Output Voltage V
N-ch Open Drain OutputRESETB V
SS
-0.3 ~ 7.0
SOT-25 250
Power Dissipation Pd mW
USP-6C 100
O
Operational Temperature Range Topr -40 ~ +85 C
O
Storage Temperature Range Tstg -40 ~ +125 C
9/26
元器件交易网
XC6101~XC6107, XC6111~XC6117 Series
■ELECTRICAL CHARACTERISTICS
●XC6101~XC6107, XC6111~XC6117 Series
MAX.
V
DF(T)
Detect Voltage V
DF(T)
× 1.02
V 1
Hysteresis Range V
DF
V
DF
V
HYS
V 1
XC6101~XC6107 (*1) × 0.05 × 0.08
Hysteresis Range V
DF
V
DF
V
HYS
0 V 1
XC6111~XC6117 (*2) × 0.001 x 0.01
XC61X1/XC61X2/XC61X3
V
IN
=V
DF(T)
×0.9V
- 5 11
XC61X4/XC61X5 (*3)
- 10 16
(The MRB & the WD Pin:
V
IN
=V
DF(T)
×1.1V
No connection)
18 V
IN
6.0V - 12
Supply Current I
SS
µA 2
V
IN
=V
DF(T)
×0.9V
- 4 10
XC61X6/XC61X7 (*3)
(The MRB Pin:
V
IN
=V
DF(T)
×1.1V
- 8 14
No connection)
16 V
IN
6.0V - 10
Operating Voltage V
IN
1.0 - 6.0 V 1
VIN1.0V 0.15 0.5 -
V
IN
=2.0V (V
DFL(T)
> 2.0V)2.0 2.5 -
N-ch.
3
V
DS
= 0.5V
V
IN
=3.0V (V
DFL(T)
>3.0V)
V
DFL
3.0 3.5 -
mA
Output Current I
RBOUT
V
IN
=4.0V (V
DFL(T)
>4.0V)3.5 4.0 -
(RESETB)
=
CMOS,
=
V
IN
6.0V - - 1.1 -0.8 4 P-ch
V
DS
= 0.5V
N-ch
V
IN
6.0V 4.4 4.9 - 3
V
DS
= 0.5V
V
IN
=
=1.0V - - 0.08 - 0.02
V
DFH
Output Current I
ROUT
mA
V
IN
=2.0V (V
DFH(T)
> 2.0V)- - 0.50 - 0.30
=
P-ch.
(RESET)
4
V
DS
= 0.5V
V
IN
=3.0V (V
DFH(T)
>3.0V)- - 0.75 - 0.55
V
IN
=4.0V (V
DFH(T)
>4.0V)- - 0.95 - 0.75
=
Temperature △V
DF
/
O
ppm
O
-40C < Topr < 85C - +100 - 1
Characteristics △Topr・V
DF
/
O
C
2 3.13 5
13 25 38
Time until V
IN
is increased from
25 50 75
1.0V to 2.0V
Release Delay Time
T
DR
and attains to the release
60 100 140
ms 5
(V
DF
<1.8V)
time level,
120 200 280
and the Reset output pin inverts.
240 400 560
960 1600 2240
2 3.13 5
13 25 38
25 50 75
60 100 140
ms 5
120 200 280
240 400 560
960 1600 2240
- 3 30 µs 5
PARAMETER SYMBOL
V
DFL
V
DFH
CONDITIONSMIN.
V
DF(T)
× 0.98
V
DF
× 0.02
TYP.
Ta = 25
O
C
UNITS
CIRCUIT
Release Delay Time
(V
DF
>1.9V)
T
DR
Time until V
IN
is increased from
1.0V to (V
DF
x1.1V)
and attains to the release
time level,
and the Reset output pin inverts.
Time until V
IN
is decreased from 6.0V to
1.0V and attains to the detect voltage
level, and the Reset output pin detects
while the WD pin left opened.
V
IN
=6.0V, RESETB=6.0V (V
DFL
)
V
IN
=6.0V, RESET=0V (V
DFH
)
V
IN
=6.0V, RESETB=6.0V
Detect Delay Time
V
DFL
/V
DFH
CMOS Output
Leak Current
V
DFL
N-ch Open Drain
Output
Leak Current
T
DF
I
LEAK
I
LEAK
- 0.01 - µA
- 0.01 0.10
3
µA 3
NOTE:
*1: XC6101~XC6107 (with hysteresis)
*2: XC6111~XC6117 (without hysteresis)
*3: ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111)
*4: V
DF(T)
: Setting detect voltage
*5: If only “V
DF
” is indicated, it represents both V
DFL
(low when detected) and V
DFH
(high when detected).
10/26
元器件交易网
XC6101 ~ XC6107, XC6111~ XC6117
Series
■ELECTRICAL CHARACTERISTICS(Continued)
●XC6101~XC6105, XC6111~XC6115 Series
PARAMETER
Watchdog
Timeout Period
(V
DF
<1.8V)
Watchdog
Timeout Period
(V
DF
>1.9V)
Ta = 25
O
C
SYMBOL CONDITIONS . MAX. UNITS
CIRCUIT
3.136.25 9.38
25 50 75
Time until V
IN
increases form
60 100 140
1.0V to 2.0V and
ms 6
T
WD
the Reset output pin is released to go into
120 200 280
the detection state. (WD=V
SS
)
240 400 560
960 1600 2240
3.136.25 9.38
25 50 75
Time until V
IN
increases form
60 100 140
1.0V to (V
DF
x1.1V)
ms 6
T
WD
and the Reset output pin is released to go
120 200 280
240 400 560
into the detection state. (WD=V
SS
)
960 1600 2240
T
WDIN
V
WDH
V
WDL
I
WD
R
WD
V
IN
=6.0V,
Apply pulse from 6.0V to 0V
to the WD pin.
V
IN
=V
DF
x 1.1V ~ 6.0V
V
IN
=V
DF
x 1.1V ~ 6.0V
V
IN
=6.0V, V
WD
=6.0V (Avg. when peak )
V
IN
=6.0V, V
WD
=0V (Avg. when peak)
V
IN
=6.0V, V
WD
=0V, R
WD
=V
IN
/ |I
WD
|
300 - - ns 7
V
IN x
0.7
0
-
- 19
315
- 6 V 7
-
12
-12
500
V
IN x
0.3
19
-
Watchdog
Minimum Pulse Width
Watchdog
High Level Voltage
Watchdog
Low Level Voltage
Watchdog
Input Current
Watchdog
Input Resistance
V 7
µA
kΩ
8
8 880
●XC6101 ~ XC6103, XC6106 ~ XC6107, XC6111 ~ XC6113, XC6116 ~ XC6117 Series
PARAMETER
MRB
High Level Voltage
MRB
Low Level Voltage
MRB
Pull-up Resistance
MRB Minimum
Pulse Width (*3)
XC6101~XC6105
XC6111~XC6115
MRB Minimum
Pulse Width (*4)
XC6106, XC6107
XC6116, XC6117
SYMBOL
V
MRH
V
MRL
R
MR
T
MRIN
CONDITIONS
V
IN
=V
DF
x1.1V ~ 6.0V
V
IN
=V
DF
x1.1V ~ 6.0V
MIN.
1.4
0
TYP.
-
-
MAX.
Ta = 25
O
C
UNITS
CIRCUIT
V
IN
9
V
0.35 9
V
IN
=6.0V, MRB=0V, R
MR
=V
IN
/ |I
MRB
| 1.6 2.4 3.0 MΩ 10
V
IN
=6.0V,
Apply pulse from 6.0V to 0V to
the MRB pin
V
IN
=6.0V,
Apply pulse from 6.0V to 0V to
the MRB pin
2.8 - -
µs 11
T
MRIN
1.2 - -
NOTE:
*1: V
DF(T)
: Setting detect voltage
*2: If only “V
DF
” is indicated, it represents both V
DFL
(low when detected) and V
DFH
(high when detected).
*3: Watchdog function is available.
*4: Watchdog function is not available.
11/26
元器件交易网
XC6101~XC6107, XC6111~XC6117 Series
The XC6101~XC6107, XC6111~XC6117 series compare, using the error amplifier, the voltage of the internal voltage
■OPERATIONAL EXPLANATION
reference source with the voltage divided by R1, R2 and R3 connected to the V
IN
pin. The resulting output signal from the
error amplifier activates the watchdog logic, manual reset logic, delay circuit and the output driver. When the V
IN
pin voltage
gradually falls and finally reaches the detect voltage, the RESETB pin output goes from high to low in the case of the V
DFL
type
ICs, and the RESET pin output goes from low to high in the case of the V
DFH
type ICs.
* V
DFL
(RESETB) type - output signal: Low when detected.
The RESETB pin output goes from high to low whenever the V
IN
pin voltage falls below the detect voltage, or whenever the
MRB pin is driven from high to low. The RESETB pin remains low for the release delay time (T
DR
) after the V
IN
pin voltage
reaches the release voltage. If neither rising nor falling signals are applied to the WD pin within the watchdog timeout period,
the RESETB pin output remains low for the release delay time (T
DR
), and thereafter the RESET pin outputs high level signal.
* V
DFH
(RESET) type – output signal: High when detected.
The RESET pin output goes from low to high whenever the V
IN
pin voltage falls below the detect voltage, or whenever the
MRB pin is driven from high to low. The RESET pin remains high for the release delay time (T
DR
) after the V
IN
pin voltage
reaches the release voltage. If neither rising nor falling signals are applied to the WD pin within the watchdog timeout period,
the V
OUT
pin output remains high for the release delay time (T
DR
), and thereafter the RESET pin outputs low level signal.
When the internal comparator output is high, the NMOS transistor connected in parallel to R3 is turned ON, activating the
hysteresis circuit. The difference between the release and detect voltages represents the hysteresis range, as shown by the
following calculations:
V
DF
(detect voltage) = (R1+R2+R3) x Vref(R2+R3)
V
DR
(release voltage) = (R1+R2) x Vref(R2)
V
HYS
(hysteresis range)=V
DR
-V
DF
(V)
V
DR
> V
DF
* Detect voltage (V
DF
) includes conditions of both V
DFL
(low when detected) and V
DFH
(high when detected).
* Please refer to the block diagrams for R1, R2, R3 and Vref.
Hysteresis range is selectable from V
DF
x 0.05V (XC6101~XC6107) or V
DF
x 0.001V (XC6111~XC6117).
The XC6101~XC6107, XC6111~XC6117 series use a watchdog timer to detect malfunction or “runaway” of the
microprocessor. If neither rising nor falling signals are applied from the microprocessor within the watchdog timeout period,
the RESETB/RESET pin output maintains the detection state for the release delay time (T
DR
), and thereafter the
RESET/RESETB pin output returns to the release state (Please refer to the FUNCTION CHART). The timer in the watchdog
is then restarted. Six watchdog timeout period settings are available in 1.6sec, 400msec, 200msec, 100msec, 50msec,
6.25msec.
Using the MRB pin input, the RESET/RESETB pin signal can be forced to the detection state. When the MRB pin is driven
from high to low, the RESETB pin output goes from high to low in the case of the V
DFL
type ICs, and the RESET pin output
goes from low to high in the case of the V
DFH
type. Even after the MRB pin is driven back high, the RESET/RESETBpin
output maintains the detection state for the release delay time (T
DR
). Since the MRB pin is internally pulled up to the V
IN
pin
voltage level, leave the MRB pin open if unused (Please refer to the FUNCTION CHART). A diode, which is an input
protection element, is connected between the MRB pin and V
IN
pin. Therefore, if the MRB pin is applied voltage that exceeds
V
IN
, the current will flow to V
IN
through the diode. Please use this IC within the stated maximum ratings (V
SS
-0.3 ~ V
IN
+0.3)
on the MRB pin.
Release delay time (T
DR
) is the time that elapses from when the V
IN
pin reaches the release voltage, or when the watchdog
timeout period expires with no rising signal applied to the WD pin, until the RESET/RESETB pin output is released from the
detection state. Seven release delay time (T
DR
) watchdog timeout period settings are available in 1.6sec, 400msec,
200msec, 100msec, 50msec, 25msec, 3.13msec.
Detect Delay Time (T
DF
) is the time that elapses from when the V
IN
pin voltage falls to the detect voltage until the RESET/
RESETB pin output goes into the detection state.
12/26
元器件交易网
XC6101 ~ XC6107, XC6111~ XC6117
Series
■TIMING CHARTS
●CMOS Output
●T
DF
(CMOS Output)
VIN
VDFL Level
6.0V
VIN Pin Wave Form
1.0V
GND
TDF
VIN Level
VDFL Level
VIN x 0.1V
GND
0.6V
RESETB Pin Wave Form (VDFL)
13/26
元器件交易网
XC6101~XC6107, XC6111~XC6117 Series
GND
TDRTDR
RESETB Pin Wave Form (VDFL)
GND
No reaction time
(MAX 900usec)
No reaction time
(MAX 900usec)
GND
WD Pin Wave Form
TWDTWD
VIN Pin Wave Form
■NOTES ON USE
1. Please use this IC within the stated maximum ratings. Operation beyond these limits may cause degrading or permanent
damage to the device.
2. When a resistor is connected between the V
IN
pin and the input, the V
IN
voltage drops while the IC is operating and a
malfunction may occur as a result of the IC’s through current. For the CMOS output products, the V
IN
voltage drops while
the IC is operating and malfunction may occur as a result of the IC’s output current. Please be careful with using the
XC6111~XC6117 series (without hysteresis).
3. In order to stabilize the IC’s operations, please ensure that the V
IN
pin’s input frequency’s rise and fall times are more than
1 µ sec/V.
4. Noise at the power supply may cause a malfunction of the watchdog operation or the circuit. In such case, please
strength the line between V
IN
and the GND pin and connect about 0.22µF of a capacitor between the V
IN
pin and the GND
pin.
5. Protecting against a malfunction while the watchdog time out period, an ignoring time (no reaction time) occurs to the rise
and fall times. Referring to the figure below, the ignoring time (no reaction time) lasts for 900µsec at maximum.
14/26
元器件交易网
XC6101 ~ XC6107, XC6111~ XC6117
Series
■PIN LOGIC CONDITIONS
PIN NAME
V
IN
MRB
LOGIC CONDITIONS
H V
IN
>V
DF
+V
HYS
L V
IN
DF H MRB>1.40V L MRB<0.35V H When keeping W D >V WDH more than T WD L When keeping W D WDL more than T WD L → H V WDL → V WDH , T WDIN >300nsec H → L V WDH →V WDH , T WDIN >300nsec NOTE: *1: If only “V DF ” is indicated, it represents both V DFL (low when detected) and V DFH (high when detected). *2: For the details of each parameter, please see the electrical characteristics. V DF : Detect Voltage V HYS : Hysteresis Range V WDH : WD High Level Voltage V WDL: WD Low Level Voltage T WDIN : WD Pulse Width T WD : WD Timeout Period WD ■FUNCTION CHART V IN MRB WD RESETB (*2) H H Repeat detect and release (H→L→H) H L H or Open H Open H H L → H H H → L H L *1 L L ●XC6101/XC61111, XC6102/6112 Series ●XC6103/XC61113 Series V IN MRB WD RESETB (*3) H H Repeat detect and release (L→H→L) H L H or Open H Open L H L → H H H → L H L *1 H L ●XC6104/XC61114, XC6105/XC6115 Series V IN WD RESETB (*2) RESET (*3) H H Repeat detect and release (H→L→H)Repeat detect and release (L→H→L) H L H Open H L H L → H H H → L H *1 L H L ●XC6106/XC61116, XC6107/XC6117 Series V IN H H L MRB H or Open RESETB (*2) H RESET (*3) L L L H *1: Including all logic of WD (WD=H, L, L→H, H→L, OPEN). *2: When the RESETB is High, the circuit is in the release state. When the RESETB is Low, the circuit is in the detection state. *3: When the RESET is High, the circuit is in the release state. When the RESET is Low, the circuit is in the detection state. *4: V IN =L and MRB=H can not be combined for the rated input voltage of the MRB pin is Vss-0.3V to V IN +0.3V. *5: The RESET/RESETB pin becomes indefinite operation while 0.35V 15/26 元器件交易网 XC6101~XC6107, XC6111~XC6117 Series ■TEST CIRCUITS Circuit 1 Circuit 2 Circuit 3 Circuit 4 16/26 元器件交易网 XC6101 ~ XC6107, XC6111~ XC6117 Series ■TEST CIRCUITS (Continued) Circuit 5 Circuit 6 Circuit 7 17/26 元器件交易网 XC6101~XC6107, XC6111~XC6117 Series ■TEST CIRCUITS (Continued) Circuit 8 Circuit 9 Circuit 10 Circuit 11 18/26 元器件交易网 XC6101 ~ XC6107, XC6111~ XC6117 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (1.1) Supply Current vs. Input Voltage S u p p l y C u r r e n t : I S S ( µ A ) 30 S u p p l y C u r r e n t : I S S ( µ A ) 25 20 15 10 5 0 012345 Input Voltage: VIN (V) 6 Ta=-40 ℃ Ta=25 ℃ Ta=85 ℃ XC61X1~XC61X5 (1.6V) 30 25 20 15 10 5 0 012345 Input Voltage: VIN (V) 6 Ta=-40 ℃ Ta=25 ℃ Ta=85 ℃ XC61X1~XC61X5 (2.7V) XC61X1~XC61X5 (5.0V) 30 S u p p l y C u r r e n t : I S S ( µ A ) 25 20 15 10 5 0 012345 Input Voltage: VIN (V) 6 Ta=25 ℃ Ta=85 ℃ Ta=-40 ℃ (1.2) Supply Current vs. Input Voltage S u p p l y C u r r e n t : I S S ( µ A ) 30 XC61X6~XC61X7 (1.6V) XC61X6~XC61X7 (2.7V) 30 S u p p l y C u r r e n t : I S S ( µ A ) 25 20 15 10 5 0 25 20 15 10 5 0 012345 Input Voltage: VIN (V) 6 Ta=25 ℃ Ta=85 ℃ Ta=25 ℃ Ta=85 ℃ Ta=-40 ℃ Ta=-40 ℃ 012345 Input Voltage: VIN (V) 6 * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) 19/26 元器件交易网 XC6101~XC6107, XC6111~XC6117 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (1.2) Supply Current vs. Input Voltage (Continued) S u p p l y C u r r e n t : I S S ( µ A ) 30 25 20 15 10 5 Ta=-40 ℃ 0 012345 Input Voltage: VIN (V) 6 Ta=25 ℃ Ta=85 ℃ XC61X6~XC61X7 (5.0V) (2) Detect, Release Voltage vs. Ambient Temperature D e t e c t , R e l e a s e V o l t a g e : V D F , V D R ( V ) 1.70 D e t e c t , R e l e a s e V o l t a g e : V D F , V D R ( V ) XC61X1~XC61X7 (1.6V) XC61X1~XC61X7 (2.7V) 2.90 1.65 VDR 2.80 VDR 1.60 2.70 VDF 1.55 -50-250255075 Ambient Temperature: Ta ( ℃ ) 100 VDF 2.60 -50-250255075 Ambient Temperature: Ta ( ℃ ) 100 XC61X1~XC61X7 (5.0V) 5.30 D e t e c t , R e l e a s e V o l t a g e : V D F , V D R ( V ) 5.20 VDR 5.10 5.00 VDF 4.90 -50-250255075 Ambient Temperature: Ta ( ℃ ) 100 * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) 20/26 元器件交易网 XC6101 ~ XC6107, XC6111~ XC6117 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (3-1) Output Voltage vs. Input Voltage (V DFL ) (3.1) Detect, Release Voltage vs. Input Voltage (V DFL ) D e t e c t , R e l e a s e V o l t a g e : V D F L , V D R ( V ) XC6101~XC6107 (1.6V) 2.0 Rpull:100kΩ Ta=-40 ℃ 25 ℃ 85 ℃ ↓: VDF ↑: VDR D e t e c t , R e l e a s e V o l t a g e : V D F L , V D R ( V ) 3.0 2.5 2.0 1.5 1.0 0.5 0.0 012 Input Voltage: VIN (V) 3 Rpull:100kΩ Ta=-40 ℃ 25 ℃ 85 ℃ ↓: VDF ↑: VDR XC6101~XC6107 (2.7V) 1.5 1.0 0.5 0.0 01 Input Voltage: VIN (V) 2 XC6101~XC6107 (5.0V) 6.0 D e t e c t , R e l e a s e V o l t a g e : V D F L , V D R ( V ) 5.0 4.0 3.0 2.0 1.0 0.0 012345 Input Voltage: VIN (V) 6 Rpull:100kΩ Ta=-40 ℃ 25 ℃ 85 ℃ ↓: VDF ↑: VDR (3.2) Detect, Release Voltage vs. Input Voltage (V DFH ) D e t e c t , R e l e a s e V o l t a g e : V D R , V D F H ( V ) XC6103~XC6107 (1.6V) 2.0 Rpull:100kΩ Ta=-40 ℃ 25 ℃ 85 ℃ ↑: VDF ↓: VDR XC6103~XC6107 (2.7V) 3.0 D e t e c t , R e l e a s e V o l t a g e : V D R , V D F H ( V ) 2.5 2.0 1.5 1.0 0.5 0.0 012 Input Voltage: VIN (V) 3 Rpull:100kΩ Ta=-40 ℃ 25 ℃ 85 ℃ ↑: VDF ↓: VDR 1.5 1.0 0.5 0.0 01 Input Voltage: VIN (V) 2 * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) 21/26 元器件交易网 XC6101~XC6107, XC6111~XC6117 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (3.2) Detect, Release Voltage vs. Input Voltage (V DFH ) (Continued) XC6103~XC6107 (5.0V) D e t e c t , R e l e a s e V o l t a g e : V D R , V D F H ( V ) 6.0 5.0 4.0 3.0 2.0 1.0 0.0 012345 Input Voltage: VIN (V) 6 Rpull:100kΩ Ta=-40 ℃ 25 ℃ 85 ℃ ↑: VDF ↓: VDR (4) N-ch Driver Output Current vs. V DS O u t p u t C u r r e n t : I O U T ( m A ) 6 Ta=25 ℃ 5 4 3 2 1 0 01 VDS (V) 23 VIN=2.0V XC61X1~XC61X7 XC61X1~XC61X7 20 Ta=25 ℃ O u t p u t C u r r e n t : I O U T ( m A ) 16 VIN=4.0V 12 VIN=3.0V 8 4 VIN=1.0V 0 01234 VDS (V) 56 (5) N-ch Driver Output Current vs. Input Voltage XC61X1~XC61X7 O u t p u t C u r r e n t : I O U T ( m A ) 6.0 VDS=0.5V 5.0 4.0 3.0 2.0 1.0 0.0 012345 Input Voltage: VIN (V) 6 Ta=85 ℃ Ta=-40 ℃ Ta=25 ℃ * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) 22/26 元器件交易网 XC6101 ~ XC6107, XC6111~ XC6117 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (6) P-ch Driver Output Current vs. Input Voltage 1 O u t p u t C u r r e n t : I O U T ( m A ) 6.0 Ta=25 ℃ VDS=2.0V 4.0 1.5V 3.0 1.0V 2.0 0.5V 1.0 0.0 012345 Input Voltage: VIN (V) 6 5.0 XC61X1, XC61X3~XC61X7 (7) P-ch Driver Output Current vs. Input Voltage 2 XC61X1, XC61X3~XC61X7 2.0 VDS=0.5V O u t p u t C u r r e n t : I O U T ( m A ) 1.6 Ta=-40 ℃ Ta=25 ℃ Ta=85 ℃ 0.4 1.2 0.8 0.0 012345 Input Voltage: VIN (V) 6 (8) Release Delay Time vs. Ambient Temperature R e l e a s e D e l a y T i m e T D R ( m s e c ) XC61X1~XC61X7 6.0 5.0 4.0 3.0 2.0 1.0 0.0 -50-250255075 Ambient Temperature: Ta ( ℃ ) 100 XC61X1~XC61X7 300 R e l e a s e D e l a y T i m e T D R ( m s e c ) TDR=100msec 250 200 150 100 50 0 -50-250255075 Ambient Temperature: Ta ( ℃ ) 100 TDR=3.13msec XC61X1~XC61X7 3000 R e l e a s e D e l a y T i m e T D R ( m s e c ) TDR=1.6sec 2500 2000 1500 1000 500 0 -50-25 Ambient Temperature: Ta ( ℃ ) * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) 23/26 元器件交易网 XC6101~XC6107, XC6111~XC6117 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (9) Watchdog Timeout Period vs. Ambient Temperature 300 W D T i m e o u t P i r i o d T W D ( m s e c ) TWD=6.25msec 10 8 6 4 2 0 -50-250255075 Ambient Temperature: Ta ( ℃ ) 100 TWD=100msec 250 200 150 100 50 0 -50-250255075 Ambient Temperature: Ta ( ℃ ) 100 XC61X1~XC61X5 XC61X1~XC61X5 12 W D T i m e o u t P i r i o d T W D ( m s e c ) W D T i m e o u t P i r i o d T W D ( m s e c ) XC61X1~XC61X5 3000 TWD=1.6sec 2500 2000 1500 1000 500 0 -50-250255075 Ambient Temperature: Ta ( ℃ ) 100 (10) Release Delay Time vs. Input Voltage R e l e a s e D e l a y T i m e : T D R ( m s e c ) 120 110 100 90 80 70 60 123456 Input Voltage: VIN (V) 7 XC61x1~XC61x7 (11) Watchdog Timeout Period vs. Input Voltage XC61x1~XC61x5 120 W D T i m e o u t P i r i o d : T W D ( m s e c ) Ta=25 ℃ TWD=100msec Ta=25 ℃ TDR=100msec 110 100 90 80 70 60 123456 Input Voltage: VIN (V) 7 * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) 24/26 元器件交易网 XC6101 ~ XC6107, XC6111~ XC6117 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) (12) Watchdog Low Level Voltage vs. Ambient Temperature(13) Watchdog High Level Voltage vs. Ambient Temperature XC61X1~XC61X5 6.0 W D H i g h L e v e l T h r e s h o l d V o l t a g e V W D H ( V ) 5.0 4.0 3.0 VIN=3.0V 2.0 1.0 VIN=1.76V 0.0 -50-25 -50 Ambient Temperature: Ta ( ℃ ) -250255075 Ambient Temperature: Ta ( ℃ ) 100 VIN=6.0V XC61X1~XC61X5 6.0 W D L o w L e v e l T h r e s h o l d V o l t a g e V W D L ( V ) 5.0 4.0 3.0 2.0 1.0 VIN=1.76V 0.0 VIN=6.0V VIN=3.0V (14) MRB Low Level Voltage vs. Ambient Temperature M R B L o w L e v e l T h r e s h o l d V o l t a g e V M R L ( V ) 1.10 1.00 0.90 VIN=3.0V 0.80 0.70 0.60 VIN=1.76V 0.50 -50-25 Ambient Temperature: Ta ( ℃ ) VIN=6.0V XC61X1~XC61X3, XC61X6~XC61X7 (15) MRB High Level Voltage vs. Ambient Temperature XC61X1~XC61X3, XC61X6~XC61X7 1.10 M R B H i g h L e v e l T h r e s h o l d V o l t a g e V M R H ( V ) 1.00 0.90 0.80 VIN=3.0V 0.70 0.60 0.50 -50-25 Ambient Temperature: Ta ( ℃ ) VIN=1.76V VIN=6.0V * ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111) 25/26 元器件交易网 XC6101~XC6107, XC6111~XC6117 Series 1. The products and product specifications contained herein are subject to change without notice to improve performance characteristics. Consult us, or our representatives before use, to confirm that the information in this catalog is up to date. 2. We assume no responsibility for any infringement of patents, patent rights, or other rights arising from the use of any information and circuitry in this catalog. 3. Please ensure suitable shipping controls (including fail-safe designs and aging protection) are in force for equipment employing products listed in this catalog. 4. The products in this catalog are not developed, designed, or approved for use with such equipment whose failure of malfunction can be reasonably expected to directly endanger the life of, or cause significant injury to, the user. (e.g. Atomic energy; aerospace; transport; combustion and associated safety equipment thereof.) 5. Please use the products listed in this catalog within the specified ranges. Should you wish to use the products under conditions exceeding the specifications, please consult us or our representatives. 6. We assume no responsibility for damage or loss due to abnormal use. 7. All rights reserved. No part of this catalog may be copied or reproduced without the prior permission of Torex Semiconductor Ltd. 26/26